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Feb 18, 2013 - For cochlear implants [1] and retinal prostheses [2], having a miniaturized form factor and being battery-less are highly desirable. Such devices ...
ISSCC 2013 / SESSION 4 / HARVESTING & WIRELESS POWER / 4.2 4.2

A 13.56MHz Fully Integrated 1X/2X Active Rectifier with Compensated Bias Current for Inductively Powered Devices

Yan Lu, Xing Li, Wing-Hung Ki, Chi-Ying Tsui, C. Patrick Yue HKUST, Hong Kong, China Wireless power transfer has a broad range of applications ranging from mobile phone chargers to biomedical implants. For cochlear implants [1] and retinal prostheses [2], having a miniaturized form factor and being battery-less are highly desirable. Such devices require real-time power transfer in the range of 10 to 100mW [3], and as human tissue specific absorption rate (SAR) increases with frequency, inductively-coupled power links that operate at 13.56MHz or lower in ISM bands are commonly used, as shown in Fig. 4.2.1. However, lower transmission frequency means larger matching and filtering capacitors that are bulky. In addition, the received AC input amplitude VAC,Peak would fluctuate due to changes in distance and orientation between the coupling coils. Hence, comparator-controlled power switches (active diodes) are used to replace diodes so that the rectifier could work at a lower VAC,Peak and still achieve a high voltage conversion ratio (VCR) and power conversion efficiency (PCE) [4]. In this research, we present the first fully integrated 1X/2X active rectifier in the 30mW range with all capacitors fabricated on-chip, also shown in Fig. 4.2.1. This is made possible by a switching arrangement that avoids connecting the output capacitors in series in the 2X mode. Reverse current is reduced for VAC,Peak that ranges from 1.25 to 4V by a bias current that is quasi-inversely proportional to the output DC voltage, as explained later; and efficiency is carefully measured by the insertion of a sensing resistor plus an additional capacitor to reduce distortion. Active rectification suffers from reverse current caused by the comparators that turn off the power switches with delay. Comparators with unbalanced bias currents or asymmetric differential input are used to set an artificial input offset voltage to compensate for the delay and to turn the power switches on and off properly [4-7]. To achieve a high VCR and PCE, conduction time tcond of the active diodes should be maximized, and the power switches should be turned off right before reverse current sets in. Comparators with dynamic offset that turn off power switches earlier only are used in [4] and [5], while comparators with dynamic offset that turn on and off earlier at both edges are used in [6] to extend tcond. However, the latter scheme is intrinsically unstable, as the comparator hysteresis goes the opposite direction as a normal Schmitt trigger goes. The remedy is to impose a minimum tcond set by the inverter delay [6], and consequently light load PCE is degraded. A fixed offset scheme is used in [7] without timing problem, but results in a shorter tcond. In this design, only the turn-off edges of the power switches are compensated by comparator offset to maximize tcond. In [4] and [7], self-biased currents that are quadratic w.r.t. the supply voltage were used; and in [6], a simple current bias proportional to the supply voltage was used. However, the comparator and buffer delay td is approximately inversely proportional to the supply voltage VDC. The artificial offset implemented with unbalanced bias currents should follow the same relation of td w.r.t. VDC. Thus, an adaptive current source that is inversely proportional to VDC is needed. For a robust design, the bias circuit of the active rectifier should not require a startup circuit. Peaking current source (PCS) with IBias insensitive to a pre-determined VDC was used in [5]. In this design, IBias is set to be quasi-inversely proportional to VDC (QIPV) such that the comparator offset could be well-controlled over the whole AC input range. The resistor R1 in the PCS is now split into R1a and R1b, and no additional current branch is needed. The two output currents (IB1 and IB2) are set to different peak current points, as shown in the measured curves of Fig. 4.2.2. The peak current point of IB1 is set close to the lowest VDC, while the peak current point of IB2 is set close to the higher end of VDC, and IB2 is used to compensate IB1 at high VDC when IB1 drops significantly. Therefore, as VDC decreases the unbalanced bias current increases, and a larger offset is obtained. As the input sinusoidal wave has different slew rate in the 1X and the 2X mode, the offsets of CMP1 and CMP2 are set to different values in the two modes. The proposed QIPV IBias helps the rectifier to reduce the reverse current for VDC from 1.6 to 4V. For domestic electrical appliances that can use an AC supply voltage of 220/110Vrms, a reconfigurable rectifier (universal rectifier) with 1X (rectifier)

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mode and 2X (voltage doubler) mode is used. The same idea is employed in the loosely coupled inductive link in [6]. However, the two load capacitors are not utilized efficiently. Those two 1μF capacitors are connected in series and resulted in an equivalent load capacitor CL,eq of 0.5μF, and both cannot be integrated on-chip. Figure 4.2.3 shows the conventional and the proposed arrangement for CL. Assume that the total capacitance available is 4C for implementing CL, in the conventional topology, two 2C capacitors are connected in series that results in CL,eq equal to C in both the 1X and the 2X mode. In the proposed topology, Cfly=C and CL=3C are configured with an additional switch S1. In the 1X mode, S1 is turned on, the two capacitors are in parallel, and CL,eq is 4C; in the 2X mode, S1 is opened, Cfly acts as a flying capacitor to charge up CL, and CL,eq is 3C. As a result, the proposed topology increases CL,eq by 4 and 3 times compared to the universal rectifier in the 1X and the 2X mode, making it possible to integrate the capacitors on-chip. In our case, Cfly and CL are equal to 1 and 3 nF respectively. When the active rectifier starts up, VDC is 0V. The active diodes are off and the Mode pin is 0. CL is charged up by VAC the same way as a passive rectifier does. After VDC is charged up to a specified voltage to activate the bias circuit and the comparators, the rectifier will automatically change to active rectification. Latchup problem could be avoided by careful layout. The proposed 1X/2X rectifier was fabricated in a 0.35μm CMOS process, and Cfly and CL are MOS capacitors with a capacitance density of 3.2fF/μm2 that could be much higher with stacked metal capacitors in an advanced process. The coupling coils L1 and L2 for measurements are 2cm and 1.8cm in diameter, respectively. L2 is 268nH and resonates with C2 of 514pF at 13.56MHz. Figure 4.2.4 shows the AC input and the DC output voltage waveforms in both modes with RL=500Ω and CL=4nF (on-chip) at their lowest VAC,Peak points, the worst cases for VCR. VCRs under different conditions are plotted in Fig. 4.2.5. With RL=500Ω, the VCR is 0.85 to 0.9 for the 1X mode with the QIPV bias current optimized for this case, and 1.3 to 1.61 for the 2X mode. With RL=5kΩ, the VCR is 0.92 to 0.95 for the 1X mode, and 1.73 to 1.77 for the 2X mode. For PCE measurement, a 10Ω resistor is inserted in the input path to measure the AC input current IAC. C2B is used to filter the distorted VAC waveforms caused by the 10Ω resistor during large ΔI/Δt (VCR and PCE were measured with different boards). Two identical differential probes with >1GHz bandwidth are used to measure VAC and IAC. The secondary coil L2 resonates with C2A+C2B at 13.56MHz, with C2B/C2A=0.15. The measured IAC is the sum of Isin that goes through C2B and Ipulse that goes into the rectifier. To get accurate PCE results, C2B/C2A cannot be large, otherwise, the large Isin of C2B that does not dissipate power will affect the accuracy of the relatively small rectifier input current Ipulse that dissipates power. With RL=500Ω, the PCEs of the 1X and the 2X mode are measured to be 81% to 84.2% and 61% to 76%, respectively. The table in Fig. 4.2.6 compares the performance with the state-of-the-art designs. Figure 4.2.7 shows the chip micrograph of the fully integrated 84.2% PCE active rectifier. References: [1] P.T. Bhatti and K.D. Wise, “A 32-Site 4-Channel High-Density Electrode Array for a Cochlear Prosthesis,” IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 29652973, Dec. 2006. [2] M. Ortmanns, A. Rocke, M. Gehrke, H.-J. Tiedtke, “A 232-Channel Epiretinal Stimulator ASIC,” IEEE J. Solid-State Circuits, vol. 42, no. 12, pp. 2946-2959, Dec. 2007. [3] K. Chen, Z. Yang, L. Hoang, et al., “An Integrated 256-Channel Epiretinal Prosthesis,” IEEE J. Solid-State Circuits, vol. 45, no. 9, pp. 1946-1956, Sept. 2010. [4] Y.-H. Lam,, W.-H. Ki, and C.-Y Tsui, “Integrated Low-Loss CMOS Active Rectifier for Wirelessly Powered Devices,” IEEE Trans. Circuits and Systems-II, vol. 53, no. 12, pp. 1378-1382, Dec. 2006. [5] Y. Lu, W.-H. Ki, and J. Yi, “A 13.56MHz CMOS Rectifier with Switched-Offset for Reversion Current Control,” IEEE Symp. VLSI Circuits, pp. 246-247, June 2011. [6] H. Lee and M. Ghovanloo, “An Adaptive Reconfigurable Active Voltage Doubler/Rectifier for Extended-Range Inductive Power Transmission,” ISSCC Dig. Tech. Papers, pp. 286-287, Feb. 2012. [7] H.-K. Cha, W.-T. Park, and M. Je, “A CMOS Rectifier with a Cross-Coupled Latched Comparator for Wireless Power Transfer in Biomedical Applications,” IEEE Trans. Circuits and Systems-II, vol. 59, no. 7, pp. 409-413, Jul. 2012.

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ISSCC 2013 / February 18, 2013 / 2:00 PM

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Figure 4.2.1: Block diagram of an inductively powered biomedical implantable SoC alongside the proposed fully integrated 1X/2X active rectifier with bias current that is quasi-inversely proportional to VDC.

Figure 4.2.2: Schematics of the peaking current source [5] and the proposed QIPV current source, and its measured output current curves with respect to supply voltage.

Figure 4.2.3: Topologies of the conventional and the proposed 1X/2X rectifiers.

Figure 4.2.4: Measured AC input and DC output voltage waveforms and output ripple in 1X (top) and 2X (bottom) modes with RL=500Ω and 4nF on-chip CL.

Figure 4.2.5: Measured voltage conversion ratios and power conversion efficiencies versus AC input amplitude, for 1X and 2X modes with RL=500Ω and 5kΩ.

Figure 4.2.6: Comparison with previously published active rectifiers.

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Figure 4.2.7: Chip micrograph of the fully integrated 84.2% PCE active rectifier.

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