AbstractâThis paper describes a 28GHz CMOS direct conversion transceiver with packaged 2x4 patch antenna arrays for 5G communication. Test results show ...
RMO1A-3 A 28GHz CMOS Direct Conversion Transceiver with Packaged Antenna Arrays for 5G Cellular System. Hong-Teuk Kim, Byoung-Sun Park, Seung-Min Oh, Seong-Sik Song, Jong-Moon Kim, So-Hyeong Kim, Tak-Su Moon, Seung-Yeon Kim, Ji-Young Chang, Sung-Woong Kim, Woo-Seong Kang, Seung-Yoon Jung, Geum-Young Tak, Jin-Kyoung Du, Yu-Suhk Suh, and Yo-Chuol Ho System IC Center, LG Electronics Inc., Seoul, Republic of Korea Abstract—This paper describes a 28GHz CMOS direct conversion transceiver with packaged 2x4 patch antenna arrays for 5G communication. Test results show good RF performances of Rx NF 6.7dB, Maximum Tx EIRP 31.5dBm (1PA Pout_sat =10.5dBm), LO integrated phase noise -37.8dBc (0.67qq), Rx/Tx EVM around 2.2% (-33.1dB) at mid RF power, and well-fitted beam control capability. Index Terms—28GHz, CMOS, Transceiver, Direct conversion, Antenna Arrays, Beam forming, mm-wave, 5G.
I. I NTRODUCTION A Variety of 60GHz transceiver/antenna/package designs and beam forming techniques have been actively researched and developed to support wireless transmission of multi-Gb/s data such as high-definition (HD) audio/video contents over 10 years [1-4]. Recently, 28GHz wideband communication is receiving important considerations for wireless 5G communication. However, there are not many the released research references for 28GHz transceiver/ antenna arrays [5-6]. Millimeter wave wideband communication basically suffers from high free space path loss and high thermal noise power so that a RF transceiver/antenna system with good EVM and beam forming is strongly required. Moreover, packaged chip size, call coverage, and power consumption should be also necessarily reflected to design RF chip/antenna arrays for smart phone applications. This paper describes a 28GHz CMOS direct conversion transceiver with packaged 2x4 antenna arrays with good EVM and beam control capability.
Fig. 1. Block diagram of the 28GHz direct conversion transceiver, the reconfigurable 2 RFs for 2x2 MIMO, and the packaged RF.
II. 28GHZ TRANSCEIVER/ANTENNA ARCHITECTURE A 28GHz direct conversion transceiver, shown in Fig.1, was designed for achieving good NF/linearity and simple Rx/Tx full chains. Injection locked QVCO was employed for low phase noise and good I/Q balance of LO. The success design based on both approaches makes good EVM. For 28GHz RF beam forming, 8 sets of LNA/PA/Phase Shifter are binary-combined/splitted between antenna ports to an I/Q conversion port. IQ conversion circuits are almost same to general cellular transceiver except of 28GHz/TDD operations. Two transceivers are implemented together on same die
978-1-5090-4626-3/17/$31.00 © 2017 IEEE
Fig. 2. Photo of one transceiver (2.8x2.6mm2 , 28nm CMOS).
for 2x2 MIMO applications. There is a connection switch between beam forming part and I/Q conversion one. This is used for a reconfigurable transceiver with high data rate MIMO and long range SISO. In MIMO mode, 2 RF transceivers with respective 8 antenna arrays operate. In
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2017 IEEE Radio Frequency Integrated Circuits Symposium
SISO mode, 1 RF transceiver with 16 antenna arrays works, resulting in wider call coverage as much as two times but lower data rate. It can be useful for low data rate Tx mode in power-hungry device such as smart phone. Here, 8 antenna arrays were determined to meet Tx EIRP more than 24dBm (Maximum LTE Tx level). 24dBm < 20log(N) + P1-ANT (3dBm/1PA+4dBi/1Antenna) at 64 QAM where N is numbers of antenna arrays. Fig.2 shows the photo of 28GHz transceiver fabricated using TSMC 28nm RF CMOS technology. The die was packaged as Flip Chip CSP (FcCSP) with 2x4 patch arrays. Rx/Tx performances were tested on both bare die and board levels. The design of antenna arrays was done using HFSS. All passive layouts including ground planes near to transistors in RF part were EM-simulated and translated into spice models for transient and PSS simulations. III. DESIGN 28GHz front-end circuits for beam forming are shown in Fig. 3. For low insertion loss and high power handling capability, the PA and the LNA are selectively coupled to a shared antenna via switch S1 and transformer T1. In Tx mode, LNA is turned off and shunt switch S1 is connected to ground. This offers almost stand-alone PA with the transformer load. In Rx mode, PA is turned off and switch S1 is open. The secondary inductor of transformer T1 is used as a LNA input matching component. The PA load capacitor C1 is controlled to push out the in-band nulling resonance by the primary inductor of transformer T1 and the off PA output parasitic capacitor. The 4-stage LNA (inCS-CC-CC-CS-out) is designed for high gain and low noise. The input matching with minimum NF is obtained with a series inductor L1 and a degenerated inductor L3 at first stage common source amplifier. A shunt inductor L2 is for ESD protection. Gains are controlled by changing the gate bias Vg1~Vg2 at the second and third cascode stage amplifiers. The PA consists of 5-stage (out-CS-CSCC-CC-CC-in). 1~3 stages are cascde amplifiers and can control 30dB gain range with Vg3~Vg5. 4~5 stages are common source amplifiers for power handling. For simple and robust design, all stages use similar impedance matching with transformer and capacitor. The switched LC network type 3-bit phase shifter (45˚, 90˚, and 180˚ bits) is designed for bi-directional phase shift from 0˚ to 315˚[7] with losses of 8~9dB. The combiner/splitter is designed using compact L-C lumped elements with loss of 0.95dB. 3-stage Tx/Rx VGAs (CS-CC-CS) with 10dB gain control are inserted between phase shifter and combiner/splitter in order to compensate those passive component losses. Bare die test results are shown in Fig. 3. LNA has gain range from 24 to 12dB, NF 5.6dB at 28GHz. PA has gain range from 35 to 5dB at 29.5GHz (designed at 28.5GHz), Pout_sat is 10.5dBm at 28.5GHz. 3-bit phase shifter with 45˚ step has rms phase error of 7˚ from 27.5~29.5GHz.
Fig. 3. Schematics of RF front-end circuits (LNA, PA, and Phase shifter) for 28GHz beam forming and Die test results.
The LO generator for supporting the 28GHz direct conversion transceiver consists of VCO, quadrature VCO(QVCO), and LO buffers as shown in Fig.4 [8]. It employs two-step injection-locking process using external reference signal to obtain low in-band phase noise. The VCO is locked at the 3rd harmonic frequency of the signal injected by the external reference signal of about 3.1GHz. And then, the QVCO is locked at the 3 rd harmonic frequency of the VCO output signal with about 9.3GHz. The IQ phase mismatch of the QVCO output signals can be compensated by controlling the I-path and Q-path MOS varactor voltage of the QVCO. The analog voltage of the MOS varactors is applied by the 7-bit voltage digital-toanalog converters (VDAC) for I-path and Q-path that can have different code value each other. The LO buffers between QVCO output and I/Q mixer consist of threestage pseudo-differential NMOS common-source amplifiers with the LC tank load. The gate bias voltage of the LO buffers can be adjusted to generate optimal LO signal swing for I/Q mixer performance. The measured injection-locking frequency range of the QVCO is about 260MHz. The measured phase noise plot is shown in Fig. 4. The integrated phase noise from 10kHz to 250MHz is 38.7 dBc (0.67q) and the spot phase noise for the offset frequency of 100MHz is -131dBc at the 28GHz TX PA output. The phase noise degradation agrees with the frequency division ratio of 3 and 9 (20log103=9.5dB and 20log109=19dB) for the offset frequency up to 1MHz. The two-step injection-locking process works well.
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shifts. Fig. 5 shows the measured array beam patterns in azimuth direction for phase shifts of 0q, r90q, and r135q. The beam forming is well controlled by the phase shifts of the transceiver and shows a good agreement with simulation. The compared gains are normalized by 14dBi maximum gain. And then, the performances of Rx and Tx full chains (patch antenna arrays to BB IQ and vice versa) were tested. Fig. 6 shows the measured full chain gains of Rx (LNA to Rx BBIQ) and Tx (Tx BBIQ to PA) versus numbers of activated arrays (2, 4, and 8). The remaining ones were tuned off. Horn and patch antenna gains were de-embedded. In Rx mode, output power from Tx horn as input power to patch antenna arrays was fixed and Rx BBIQ output power was measured. Almost 6dB gain difference for 2 times arrays is shown. This agrees with the beam forming theory. In Tx mode, input power to Tx BB IQ was fixed and the received power into the Rx horn was measured. Almost 3dB gain difference for 2 times arrays is measured. Considering that the increase in input power entering the activated Tx beam forming circuits is proportional to the numbers of the turned off arrays, this also well agrees with the theory. Although indirect, these results surely indicate that the idea of reconfigurable transceiver with high data rate MIMO and long range SISO, as mentioned at introduction, can well operate. Fig. 7 shows the measured constellations, EVMs, and phase combined powers for 2x4 arrays at 64QAM/LTE 10MHz (our lab. condition). For test, LTE signal was up/down converted to/from 28GHz using an external passive mixer. The distance between the horn antenna and the packaged RF chip/antenna is 30cm (min. far field condition, 2D2/O). Phase combined powers and EVMs through proper phase shifts of the transceiver were measured for beam direction angles of 0q, r30q and r60q. At mid powers of Tx EIRP 0dBm and Rx Pin -70dBm (horn, patch arrays), the phase combined power decrease as beam direction angle increase where 0q is LOS. This result is similar to the HFSS simulation. Max. EVMs are 2.15% (-33.3dB) for Rx and 2.2% (-33.1dB) for Tx, and are still lower than 3% (-30.5dB) even at r60q beam direction. This is excellent results to support 256QAM, and is mainly due to good LO phase noise and IQ balance. Tx to Rx communications with two boards showed EVMs around 3.0~3.5%. Rx full chain NF is 6.7dB. Tx LO leakage and image are less than -35dBc with calibrations. Tx Max. EIRP of 2x4 arrays is 31.5dBm (1PA Pout_sat=10.5dBm, including trace loss 2.0dB). Power consumptions of 2x4 arrays are 400mW for Rx and 680mW for Tx EIRP 24dBm (eff. 36.7%, 1PA Pout=3dBm / eff. 3.1%). In conclusion, a 28GHz CMOS transceiver with packaged antenna arrays for 5G communications has been successfully developed with good performances and beam forming capability. In 2 Rxs for 2x2 MIMO,
The I/Q up-converter consists of an I/Q up-mixer based on Gilbert cell, a 1st order passive LPF, and a V/I(Voltageto-Current) converter for testing with I/Q baseband signal from instrument. The I/Q down-converter consists of an I/Q down-mixer based on Gilbert cell and a 3rd active-RC LPF with Tow-Thomas biquad for wideband characteristic of 250MHz. A DAC for compensating DC offset is implemented to Tx I/Q BB and Rx I/Q BB, respectively. Since I/Q mismatch leads to degrade SNR performance, the transistors of the switches in the up/down-mixers remain symmetrical maximally in the layout.
Fig. 4. Measured phase noises of the IL-QVCO, IL-VCO, and external ref-clock, and schematics of (28y3)GHz IL-VCO and 28GHz IL-QVCO
IV. TRANSCEIVER/ANTENNA ARRAY TEST The 2x4 patch antenna arrays with cross polarized dual feeds, shown in Fig. 5, were integrated into an FcCSP which has 3.9 Er, 8 metal layers, 800um thickness, 11.6x22mm2 area, and 86 balls. Each antenna has 500um thickness between radiator and ground, 2.35x2.35mm2 area, and average maximum gain of 5dBi in the arrays. The space between neighbor antennas is 5.25mm (O/2) and the maximum gain of 2x4 arrays is 14dBi. The bumps of a die with 2 transceivers are attached to the FcCSP. Tx/Rx ports of one transceiver are connected to vertical antenna feeds and another to horizontal ones. And then board level measurements over the air are performed to validate the packaged radio. First, S21’s between the part of 28GHz beam forming circuits/array antennas and a standard horn antenna with 20dB gain were tested using network analyzer for various horn angles and transceiver’s phase
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[6] Y. Yeh, et al., “A 28GHz 4-Channel Dual-Vector Receiver Phased Array in SiGe BiCMOS Techology,” IEEE RFIC Dig.Tech, pp. 352-355, Jun. 2016. [7] Byung-Wook Min, et al., “Single-Ended and Differential Ka-Band BiCMOS Phased Array Front-Ends,” IEEE JSSC, vol.43, no.10, pp. 2239-2250, Oct. 2008. [8] A. Musa et al., “A low phase noise quadrature injection locked frequency synthesizer for mm-wave applications,” IEEE JSSC, vol. 46, no. 11, pp. 2635–2649, Nov. 2011.
reconfigurable transceivers with high data rate MIMO and long range SISO were addressed. The performances are summarized in Table 1.
Fig. 5. 28GHz 2x4 antenna arrays (11.6x22.0mm2) and phased beam patterns for phase shifts (0q, r90q, and r135q).
Fig. 7. Measured 64QAM constellations, phase combined powers (dBm, normalized at Tx EIRP 0dBm and Rx Pin -70dBm), and EVMs (%) at 28GHz / LTE 10MHz TABLE I PERFORMANCE SUMMARY Fig. 6. Measured Rx and Tx full chain gains vs. arrays (8, 4, and 2 patches).
REFERENCES [1] J. M. Gilbert, C. H. Doan, S. Emami, and C. B. Shung, “A 4-Gbps Uncompressed Wireless HD A/V Transceiver Chipset,” IEEE Micro, pp. 56-64, March-April 2008. [2] S. Emami, et al., “A 60GHz CMOS Phased-Array Transceiver Pair for Multi-Gb/s Wireless Communications,” ISSCC Dig. Tech, pp. 164-166, Feb. 2011. [3] K. Okada, et al., “A Full 4-Channel 6.3Gb/s 60GHz Direct-Conversion Transceiver with Low-Power Analog and Digital Baseband Circuitry,” ISSCC Dig.Tech, pp. 218-220, Feb. 2012. [4] M. Boers, et al., “A 16Tx/Rx 60GHz 802.11ad Chipset with Single Coaxial Interface and Polarization Diversity,” ISSCC Dig.Tech, pp. 344-346, Feb. 2014. [5] C. Wilson, et al., “20-30GHz Mixer-first Receiver in 45nm SOI CMOS,” IEEE RFIC Dig.Tech, pp. 344-347, Jun. 2016.
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