A 4th-Order Active-Gm-RC Reconfigurable (UMTS/WLAN) - IEEE Xplore

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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 7, JULY 2006

A 4th-Order Active-Gm-RC Reconfigurable (UMTS/WLAN) Filter Stefano D’Amico, Vito Giannini, and Andrea Baschirotto, Senior Member, IEEE

Abstract—A fourth-order low-pass continuous-time filter for a UMTS/WLAN receiver of a reconfigurable terminal is presented. -RC biquad cells. A The filter uses the cascade of two Activesingle opamp is used for each biquad and its unity-gain-bandwidth is comparable to the filter cut-off frequency. Thus, the opamp power consumption is strongly reduced w.r.t. other closed-loop filter configurations. The cut-off frequency deviation due to the technological spread, aging and temperature variation is adjusted by an on-chip tuning circuit. The device in a 0.13 m CMOS technology occupies a 0.9 mm2 area and it consumes 3.4 mW and 11 4.2 mW for the UMTS and WLAN, respectively. The full chip has been designed using an automatic design tool, which is validated by the agreement between the experimental results and the expected performance. Index Terms—Analog filter, reconfigurable receiver, UMTS, WLAN.

I. INTRODUCTION HE increasing demand for a wireless networking rapidly focused a significant effort on implementing a low-power, low-cost, and highly integrated (i.e., including both RF and baseband parts) IC, capable to be reconfigured in order to allow operating with the same terminal with different communication standards. In this research field, a multi-standard terminal operating for UMTS and WLAN is under development [1]. In the reconfigurable receiver, the baseband filter features have to be adjusted to satisfy the selected standard specifications, in terms of frequency response, noise, and linearity performance, while optimizing area and power consumption [2]–[6]. The most popular approaches for the design of baseband filters in direct conversion receivers are the Active-RC ones [4]–[7] because of the high linearity performance requirements. In these design solutions, the need of opamp bandwidth much larger than the filter cut-off frequency leads to high power -C filters [8] reduce the consumption. As an alternative, power consumption at the cost of a lower linearity. -RC approach is here proposed, whose basic The Activebiquadratic cell presents a closed-loop structure that exploits the opamp frequency response in the filter transfer function. This corresponds to operate with an opamp unity-gain-frecomparable with the filter pole frequency, and, quency thus, to minimize the power consumption [9] with respect to

T

Manuscript received November 3, 2005, 2005; revised January 30, 2006. This work was supported in part by the Italian National Program FIRB under Contract RBNE01F582. The authors are with the Department of Innovation Engineering, University of Lecce, 73100 Lecce, Italy (e-mail: [email protected]; vito.giannini @ unile.it; [email protected]). Digital Object Identifier 10.1109/JSSC.2006.873676

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Fig. 1. Active-

-RC biquadratic cell.

other closed-loop structures. The proposed solution is favorably compared to other active filter implementations by means of the usual active-filter figure-of-merit. The dual-mode baseband filter for UMTS and WLAN filter proposed in this paper is made up of the cascade of two Ac-RC biquadratic cells, in order to reduce the power contivesumption. The filter shares capacitors and opamps for the two operating modes, allowing area saving with respect the case of two separates filters, while maintaining the same linearity. Furthermore, since the two standards differ considerably in their bandwidth (2.11 MHz and 11 MHz for UMTS and WLAN, respectively), the filter power consumption is optimized for each mode. At the same time, these cells allow satisfying the desired performance of high linearity and low noise required by the baseband filters integrated in direct conversion receivers. Moreover, a calibration circuit is implemented to adjust the cut-off frequency deviation w.r.t. technology, aging and temperature spread. The proposed filter is realized in a 0.13 m CMOS technology, occupies 0.9 mm , and consumes 3.4 mW and 14.2 mW for the UMTS and WLAN settings, respectively. It achieves a 21 dBm IIP3 for in-band signal, while the IIP3 for out-of-band signal (blockers) increases to 31 dBm. The full chip has been designed using an automatic design tool [10] and the experimental results agree with the expected performance. This paper is organized as follows. Section II describes -RC cell, while Section III presents the proposed Activethe proposed fourth-order baseband filter. The adopted tuning scheme is briefly described in Section IV. Section V reports the experimental results. Finally, Section VI concludes the paper.

II. THE ACTIVE-

-RC LOW-PASS CELL

Fig. 1 shows the second-order low-pass Activestructure in its single-ended form [9]–[11].

0018-9200/$20.00 © 2006 IEEE

-RC cell

D’AMICO et al.: A 4TH-ORDER ACTIVE-

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Fig. 2. Architecture of Active-

-RC RECONFIGURABLE (UMTS/WLAN) FILTER

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-RC cell.

TABLE I UMTS AND WLAN CELL PARAMETERS

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Fig. 3. The Active-RC biquad cell frequency response to the output node and to the opamp input node.

The opamp has a single-pole transfer function (in the frequency range of interest), written as

(1) where and are the opamp first-pole angular frequency and DC-gain, respectively. The opamp is assumed to present a two-stage topology as shown in Fig. 2, composed by an input stage (the input transconand the load resistance ), an output stage (the ductance and the load resistance ), and output transconductance ). a Miller compensation network (resistor RC and capacitor In addition, the load contribution ( and ) of the other circuits connected to the cell (as for the case of cascade higher order filter) is shown. . The adIn Fig. 2, an adjusting circuit sets justing circuit effect is to transfer the dependence of the filter freon the MOS device parameters quency response into a dependence on only the passive component values ( , , , and ). The low-pass filter transfer function is then given by

(2) The relative low-pass cell transfer function parameters (DCgain, pole frequency, and quality factor) are

(3)

This Active-RC cell exhibits the following features that make it preferable for the implementation of baseband filter of portable multistandard terminals. • low power consumption (key target for portable terminals): One opamp is used to synthesize a second-order transfer function, halving the power consumption compared with standard two-opamp Active-RC biquad cells. In addition, the opamp frequency response is used to synthesize the filter frequency response. Thus, the opamp unity gain bandwidth, , is comparable with the filter pole, ( is lower than 2 for this design, as shown in Table I). This reduces its power consumption with respect to a standard closed-loop structures (Active-RC or MOSFET-C), in which the opamp unity-gain bandwidth has to be much larger than the filter pole (typically is used), requiring a much larger power consumption; • high linearity: A very large linear range is achieved due to its closed-loop structure. Fig. 3 shows the frequency response to the output node and to the opamp input node, where the signal is always very low, reducing the opamp in-band distortion. Moreover, out-of-band signals are – low-pass firstly filtered by the absolutely linear filter at the input. This gives an out-of-band IP3 better than the in-band IP3, which is particularly interesting in telecom systems where the out-of-band linearity is crucial (and often more important than in-band linearity) due to the higher level of out-of-band blockers. For reference, Fig. 4 shows the UMTS input spectrum at the antenna, which is not so much filtered by the RF front-end, and then it is present (shifted in frequency around DC) at the filter input. Out-of band blockers larger than 60 dB w.r.t. the signal have to be processed by the filter [2], [3]. • frequency response accuracy: The adjusting circuit makes the opamp frequency response dependent on the passive component values (R and C) spread, which is the only spread to be compensated and this is done by the tuning system. This makes this proposal completely different from the previous proposals [12], [13], where the opamp frequency response is taken into account “as

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Fig. 4. UMTS signal spectrum.

Fig. 5. Fourth-order reconfigurable filter structure.

it is” to synthesize the desired transfer function. In this previous approach, the filter transfer function strongly suffers from the opamp frequency response sensitivity to technology, component spreading, and temperature, which is independent on the passive component spread. This is -RC filters, whose frequency not the case of the Activeresponse is completely under the tuning system control. III. RECONFIGURABLE FOURTH-ORDER FILTER Fig. 5 shows the structure of the fourth-order UMTS/WLAN -RC bireconfigurable filter. It is the cascade of two Activequad cells. The challenge of this design is the realization of an efficient dual-mode filter in terms of power and area occupation, operating with a supply voltage limited to 1.2 V, while guaranteeing the large linear range required by the UMTS/WLAN standards. The filter can be reconfigured in order to adjust the filter bandwidth to the selected standard (2.11 MHz and 11 MHz for UMTS and WLAN standards, respectively), by a single Standard-Selection (SS) bit that controls the values of the resistors for the two (this makes the overall noise proportional to modes). In addition, for the UMTS case the power consumption is reduced by controlling the input stage device MOS sizes and its current levels. For both standards, the capacitors are grounded in order to be active also for the common-mode signal, otherwise a resonance at high frequency for input commonmode signals would be present. Together with the strong noise

requirements, this causes the capacitance to dominate the die area. Sharing all the capacitors for the two standard configurations minimizes the area occupation. The capacitor values are finally adjusted by the tuning circuit to compensate the technology variation. Table I summarizes the frequency response characteristics for each cell for the synthesis of a fourth-order Bessel filter transfer function. The key feature of this structure is the use of low opamps. for both cells is lower than 2. This In fact, the ratio strongly reduces the opamps power consumption. The above value has been optimized in order to minimize the power consumption using a specifically developed automatic design toolbox [10], [11], which for a given specification set (noise, linearity, transfer function) directly synthesizes all the device sizes with the key target of the power minimization. Fig. 6 shows the fully-differential two-stage opamp implementation in CMOS technology of the scheme of Fig. 2. corresponds to the input The input transconductance differential pair (M1–M2) transconductance, while the output corresponds to the transconductance transconductance of the output stage transistors M5–M6. The common-mode feedback circuit is implemented with an additional differential and ) pair. As in Fig. 2, a Miller compensation scheme ( is used. In the scheme a number of parameters (input device , and ) are controlled by the Stansizes, current levels, dard-Selection bit, in order to minimize power consumption



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Fig. 6. Opamp structure.

Fig. 7. Adjusting circuit schematic.

for the UMTS case, while guaranteeing the desired for the synthesis of the filter transfer function. Fig. 7 shows the adjusting circuit [14]. It correlates the transconductance variations of the input transistors (due to temperature, aging, and technological process spread) to the variation of the resistances of the network around the opamp. to be proportional to by regulating the It forces current of the input stage. The matching between and – is guaranteed by the use of parallel transistors presenting the same length and the same width. Even if the switch commutates the number of parallel transistors, the matching and – is guaranteed. The proper current between – to operate with the mirror gain makes each transistor of . Thus, – same current density of the transistors of transistors transconductance is proportional to . The resistance is matched with the resistances of the opamp feedback net in order to undergo the same process variations. In this way the overall filter frequency response is controlled by the tuning circuit. IV. TUNING CIRCUIT The filter’s frequency response is correlated to the time conof the passive components that are poorly controlled stants in an integrated technology. The uncertainty on the passive components nominal value due to the fabrication process, temperature variations and aging can reach the 40%, heavily affecting the filter frequency behavior. To adjust accurately the filter transfer function, additional tuning circuits are required. Any process variation and temperature dependencies can be

compensated by tuning either the ’s or the ’s values. In this work, the tunability of the frequency response is achieved by arranging active binary-weighted capacitive elements in digitally programmable arrays. The array value is set using a digital code produced by an on-chip calibration circuit. Fig. 8 shows the basic structure of the implemented on-chip tuning circuit. The tuning scheme is based on the comparison between an and a precise external clock peisolated time-constant riod. Once that the calibration circuit has found the code for the time constant matching, this 4 bits code is stored in a register. The circuit feeds the code to each capacitor array in the filter cells. Then, the calibration circuit may be switched off, allowing power saving. In this filter implementation, a 4 bit counter guarantees a 5% accuracy in the frequency response of the filter. V. EXPERIMENTAL RESULTS The proposed fourth-order filter has been realized in a 0.13 m standard CMOS technology. Fig. 9 shows the chip photograph, where the different blocks are indicated. The active area is 0.9 mm and it is dominated by the capacitances. Therefore, the capacitance sharing for UMTS and WLAN operation modes guarantees a significant die area saving. The filter operates with a single 1.2 V supply voltage. The several possible filter transfer functions are shown in Fig. 10. Two nominal cut-off frequencies are possible: 2.11 MHz for UMTS and 11 MHz for WLAN, respectively. The curves in Fig. 10 are obtained by externally changing the 4-control-bits circuit. It has been verified that the tuning circuit performs a frequency step of 105.5 kHz and 550 kHz for UMTS and WLAN, respectively. Fig. 11 shows the in-band IM3 for the UMTS setting, for each. This two tones (at 600 kHz and 700 kHz) of 150 mV corresponds to a 21 dBm in-band IIP3 as shown in Fig. 12, where also the 31 dBm out-of-band IIP3 (the third harmonic falls in the filter band) is reported. Considering that the supply voltage is limited to 1.2 V, these results are highly performing. As expected, the out-of-band IIP3 is much larger than the in-band IIP3. On the other hand, Fig. 13 shows the in-band IM3 for the WLAN setting, for two tones at 3 MHz and 4 MHz each. This gives a 21 dB in-band IIP3. The of 178 mV IIP3 versus the central frequency of the two tones ( is equal

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Fig. 8. Calibration circuit.

Fig. 9. Filter chip photograph.

to 100 kHz and 1 MHz for UMTS and WLAN, respectively) is shown in Fig. 14. normalized to the cut-off frequency Also, this graph is a demonstration of the higher IIP3 obtained for out-of-band signals. has been used to A single tone test with measure the total harmonic distortion (THD) and the 1 dBcp. Fig. 15 shows the THD versus the input signal amplitude, while Fig. 16 shows the 1 dBcp for both modes. For the UMTS settone amplitude, ting, a 40 dB THD is achieved with a 1.8 while the 1 dBcp occurs for an 11 dBm output tone amplitude

Fig. 10. Filter transfer functions.

(i.e., within about 70 mV from the rail). Similar performance is achieved for the WLAN setting. This demonstrates the high-linearity w.r.t. the low supply voltage and low power consumption. The linearity has also been evaluated with respect the input . Fig. 17 shows the THD as a function of tone frequency for the two modes. the ratio Since the two standards use largely different bandwidths, the current consumption of the dual-mode filter is optimized separately for each mode. It is equal to 2.9 mA or 11.8 mA according to the selected UMTS or WLAN standard, respectively, plus a 0.2 mA for bias. In addition, the tuning circuit requires 1.8 mA.



Fig. 11. In-band IM3 (UMTS settings).

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Fig. 13. In-band IM3 (WLAN settings).

Fig. 14. IIP3 versus input tones central frequency for the UMTS and WLAN cases. Fig. 12. In-band and out-of-band IIP3 (UMTS settings).

The standard selection is performed by operating on the resistors and the opamp noise is negligible. Thus, the input integrated . noise is comparable for the two standards and it is 36 This gives a 81 dB DR for a 40 dB THD. Table II summarizes the filter performance. This work can be compared to other low-voltage continuoustime filters by evaluating the figure-of-merit (FOM) defined as

FOM

(4)

where is the total power consumption, is the cut-off frequency, is the number of poles, and is the dynamic range. The FOM of this filter is plotted versus the supply voltage in Fig. 18 (black x) and favorably compared to other published work (black circles) [5], [15]–[22].

Fig. 15. THD versus input power for UMTS and WLAN cases.

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TABLE II RECONFIGURABLE FILTER PERFORMANCE SUMMARY

Fig. 16.

01 dBcp for UMTS and WLAN cases.

Active-RC biquads (with low opamps) minimizes the power consumption. The area occupancy is minimized by sharing the capacitors. Furthermore, the power consumption is optimized for each mode. REFERENCES

Fig. 17. THD versus (input tone frequency)/(cut-off frequency) for UMTS and WLAN cases.

Fig. 18. Figure of merit versus supply voltage for different filters example from literature.

VI. CONCLUSION An Active-RC dual-mode (UMTS/WLAN) baseband filter for a direct-conversion receiver with an on-chip tuning system is realized in 0.13 m CMOS. Nonetheless the filter operates from a single 1.2 V supply, the required high linearity (IIP3 20 dBm and low-noise specifications are achieved. The

[1] Enabling Technologies for Wireless Reconfigurable Terminals. Italian National Program FIRB, Contract no. RBNE01F582 [Online]. Available: http://ims.unipv.it/firb/ [2] D. Manstretta, R. Castello, F. Gatta, P. Rossi, and F. Svelto, “A 0.18 m CMOS direct- conversion receiver front-end for UMTS,” in Proc. IEEE ISSCC, 2002, pp. 240, 463. [3] K. R. Rao, J. Wilson, and M. Ismail, “A CMOS RF front-end for a multistandard WLAN receiver,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 5, pp. 321–323, May 2005. [4] T. Hollman et al., “A 2.7-V CMOS dual-mode baseband filter for PDC and WCDMA,” IEEE J. Solid- State Circuits, vol. 36, no. 7, pp. 1148–1153, Jul. 2001. [5] A. Yoshizawa et al., “Anti-blocker design techniques for MOSFET-C filters for direct conversion receivers,” IEEE J. Solid-State Circuits, vol. 37, no. 3, pp. 357–364, Mar. 2002. [6] D. Chamla, A. Kaiser, A. Cathelin, and D. Belot, “A Gm-C low-pass filter for zero-IF mobile applications with a very wide tuning range,” IEEE J. Solid-State Circuits, vol. 40, no. 7, pp. 1443–1450, Jul. 2005. [7] A. M. Durham et al., “Circuit architectures for high- linearity monolithic continuous-time filtering,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 39, no. 9, pp. 651–657, Sep. 1992. [8] C.-C. Hung et al., “A low-voltage, low-power CMOS fifth-order elliptic Gm-C filter for baseband mobile, wireless communication,” IEEE Trans. Circuits Syst. Video Technol., vol. 7, no. 4, pp. 584–593, Aug. 1997. [9] S. D’Amico, “An Improved Active-gm-RC High Frequency Low-Noise Continuous-Time Biquad Cell,” U.S. Patent pending, Nov. 30, 2002. [10] V. Giannini, P. Nuzzo, F. De Bernardinis, J. Craninckx, B. Come, S. D’Amico, and A. Baschirotto, “A synthesis tool for efficient baseband filter design,” presented at the DATE 2006, Paris, France. [11] S. D’Amico and A. Baschirotto, “Active Gm-RC continuous-time biquadratic cells,” Analog Integrated Circuits and Signal Processing, vol. 45, no. 3, pp. 1–14, Nov. 2005. [12] T. Tsukutani et al., “Current-mode biquad without external passive elements,” Electron. Lett., pp. 197–198, Feb. 1, 1996. [13] K. R. Rao et al., “A bandpass filter using the operational amplifier pole,” IEEE J. Solid-State Circuits, vol. 8, no. 3, pp. 245–246, Jun. 1973. [14] S. Pavan, Y. P. Tsividis, and K. Nagaraj, “Widely programmable highfrequency continuous-time filters in digital CMOS technology,” IEEE J. Solid-State Circuits, vol. 35, no. 4, pp. 503–511, Apr. 2000. [15] D. Python and C. Enz, “A micropower class AB CMOS log-domain filter for DECT applications,” in Proc. ESSCIRC, 2000, pp. 25–28. [16] D. Python, A.-S. Porret, and C. Enz, “A 1 V 5th-order Bessel filter dedicated to digital standard processes,” in Proc. IEEE CICC, 1999, pp. 505–508. [17] M. Punzenberger and C. C. Enz, “A 1.2-V low-power BiCMOS class AB log-domain filter,” in Proc. IEEE ISSCC, 1997, pp. 56–57.



[18] ——, “A low-voltage power and area efficient BiCMOS log-domain filter,” in Proc. ESSCIRC, 1997, pp. 256–259. [19] R. H. Zele and D. J. Allstot, “Low-power CMOS continuous-time filters,” IEEE J. Solid-State Circuits, vol. 31, no. 2, pp. 157–168, Feb. 1996. [20] W. A. Serdijn, M. Broest, J. Mulder, A. C. Van Der Woerd, and A. H. M. Van Roermund, “A low-voltage ultra-low-power translinear integrator for audio filter applications,” IEEE J. Solid-State Circuits, vol. 32, no. 4, pp. 577–581, Apr. 1997. [21] H. Tanimoto, M. Koyama, and Y. Yoshida, “Realization of a 1-V active filter using a linearization technique employing plurality of emitter-coupled pairs,” IEEE J. Solid-State Circuits, vol. 26, no. 7, pp. 937–945, Jul. 1991. [22] U. Yodprasit and C. Enz, “A 1.5 V 75 dB-dynamic range 3rd-order Gm-C filter integrated ina 0.18 m standard digital CMOS process,” in Proc. ESSCIRC, 2002, pp. 647–650.

Stefano D’Amico was born in Tricase, Lecce, Italy, in 1976. In 2001 he received the degree in electronics engineering from the Politecnico di Bari, Italy. In 2005, he received the Ph.D. degree in innovative materials and technologies from the Istituto Superiore Universitario per la Formazione Interdisciplinare (ISUFI), University of Lecce. From April 2005 until October 2005, he was a researcher at the Department of Electrical Engineering, University of Pavia, Italy, in the field of reconfigurable wireless terminals. He is currently with the Department of Innovation Engineering, University of Lecce, Italy, as a researcher in the field of reconfigurable wireless terminals. Since 2002, he has participated in several research projects between the University of Lecce and different industrial partners (Infineon Technologies, STMicroelectronics, RFDomus) and research centers (University of Pavia, NNL-INFM, IMEC). He has authored or coauthored 40 papers in international journals and presentations at international conferences, and holds three patents in the field of low-power baseband circuits for telecommunications systems.

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Vito Giannini was born in Mesagne, Italy, in 1976. In 2002, he received the M.S. degree in electronic engineering from University of Pavia, Italy, after a fellowship in the Printer division of STMicroelectronics, Milan, Italy. He is currently working toward the Ph.D. degree on flexible baseband analog blocks for software defined radio at the University of Lecce, Italy. In 2004, he joined IMEC, Leuven, Belgium, as a visiting researcher. His research interests include the design of continuous-time filters and analog-to-digital converters for wireless applications.

Andrea Baschirotto (M’95–SM’01) graduated in electronic engineering (summa cum laude) from the University of Pavia, Italy. In 1994, he received the Ph.D. degree in electrical engineering from the University of Pavia. In 1994, he joined the Department of Electronics, University of Pavia, as a Researcher (Assistant Professor). In 1998, he joined the Department of Innovation Engineering, University of Lecce, Italy, as an Associate Professor. Since 1989, he has collaborated with several companies on the design of mixed signals ASIC’s. He participate to several research collaborations, also funded by National and European projects. He is now the Coordinator of a national project for the design of large-dynamic range gas sensors. His main research interests are in the design of mixed analog/digital integrated circuits, in particular for low-power and/or high-speed signal processing. He has authored or coauthored more than 190 papers in international journals and presentations at international conferences and six book chapters, and holds 25 industrial patents. In addition, he has coauthored more than 120 papers within research collaborations on high-energy physics experiments. Dr. Baschirotto was an associate editor of IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—PART II, ANALOG AND DIGITAL SIGNAL PROCESSING, for 2000–2003, and he is now serving IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—PART I, REGULAR PAPERS, as an associate editor. He was the Technical Program Committee Chairman for ESSCIRC 2002 and the guest editor for ESSCIRC 2003 for the IEEE JOURNAL OF SOLID-STATE CIRCUITS. He is a member of the Technical Program Committee of several conferences (ISSCC, ESSCIRC, DATE, etc.).