A Boost Converter with Voltage Multiplier Cells
M. Prudente
L. L. Pfitscher
R. Gules
UNISINOS – Universidade do Vale do Rio dos Sinos 88010-970 – São Leopoldo -RS- Brasil Phone: +55-51-591-1122 - Fax: +55-51-590-8172 E-mail:
[email protected]
Abstract—This paper introduces the use of the voltage multiplier technique applied to the classical non-isolated Dc-Dc converters. The major benefits obtained with the integration of voltage multipliers with classical converters are the operation with high static gain, reduction of the maximum switch voltage, zero current switch turn-on and minimization of the effects of the reverse recovery current of all diodes with the inclusion of a small inductance. The voltage multiplier also operates as a regenerative clamping circuit, reducing problems with lay-out and the EMI generation. These characteristics allows to operate with high static again, high efficiency and to obtain a compact circuit for applications where the isolation is not required. The principle of operation, the design procedure and practical results obtained from the prototype are presented.
I. INTRODUCTION There are several applications powered by batteries or others low voltage storage elements, as embedded systems, renewable energy systems, fuel cells and interruptible power supply (UPS). These applications demands the development of high performance and high step-up Dc-Dc converters. Some classical converters with magnetic coupling as flyback or current-fed push-pull converters can easily achieve high step-up voltage gain. However the transformer leakage energy can cause high voltage stress, large switching losses, EMI problems and power losses in dissipative clamping circuits, reducing the converter efficiency. Some topologies as the active clamping current-fed push-pull converter can use the leakage energy to obtain soft-commutation, reducing the losses and minimizing the EMI generation. However the voltage stress is higher than in the hard-switching structures and the cost and circuit complexity are increased. The weight, volume and losses of the power transformer is also a limitation of the isolated Dc-Dc converters for embedded applications. Some non-isolated Dc–Dc converters, as the classical boost, can provide high step-up voltage gain, but with the penalty of high voltage and current stress, high duty-cycle operation and limited dynamic response [1,2,3]. The diode reverse recovery current also can reduce the efficiency when the converter operates with high current and voltage levels. There are others non isolated topologies that can operate with large conversion ratios as the quadratic boost and with auxiliary circuits can obtain soft-switching, but the switch voltage is equal to the output voltage, increasing the losses.
0-7803-9033-4/05/$20.00 ©2005 IEEE.
The use of voltage multiplier in low frequency rectifiers is a classical solution to increase the Dc output voltage. This technique is also used in high-frequency isolated Dc-Dc converters, mainly for high output voltage (kV) applications as in Travelling Wave Tube Amplifiers (TWTA), reducing the problems presented by high frequency and high-voltage power transformer [4]. However, the voltage multiplier technique can be also integrated with non isolated Dc-Dc converters, obtaining new operation characteristics. The major benefits obtained are the operation with high static gain, reduction of the maximum switch voltage, zero current switch turn-on and minimization of the effects of the reverse recovery current of all diodes with the inclusion of a small inductance. The voltage multiplier also operates as a regenerative clamping circuit, reducing problems with lay-out and the EMI generation. These characteristics allows to operate with high static again, high efficiency and to obtain a compact circuit for applications where the isolation is not required. II. PROPOSED STRUCTURE The proposed topology is presented in Fig. 1. The voltage multiplier cell, composed by the diodes DM1-DM2, the capacitors CM1-CM2 and the resonant inductor Lr, is associated with a classic boost converter, composed by the switch S, input inductor Lin, output diode Do and capacitor filter Co. When the power switch is turned-off, the capacitor CM1 is charged with a voltage equal to the classical boost output voltage. When the power switch is turned-on, the energy stored in the capacitor CM1 is partially transferred to the capacitor CM2 and the voltage in this capacitor is approximately equal to the CM1 voltage. Therefore, the output voltage of the boost converter integrated with the voltage multiplier is twice the output voltage of the classical boost converter. However, in both structures the switch voltage are equals. Thus it is possible to obtain high static gain without increase the switch voltage. This characteristic allows to use low drain-source voltage and low RDSon MOSFETs, reducing the switch conduction losses. As in the classical voltage multipliers, the number of multiplier stages connected in series can be increased in order to obtain higher static gain.
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Lo
Voltage Multiplier Cell
Lr
C M2
L in
Do D M1
Vin
D M2
C M1
S
Vin
Voltage Multiplier Cell
Do D M2
C M2 Co
C M1
Co
D M1
Ro
Ro
Lr
S a) Buck
Fig. 1. Boost converter integrated with a voltage multiplier. Lr
Lr
L in
D 11
Vin
D21
D 12
C 11
S
C 22
C 12
V in
Co
Ro
The proposed topology with M multiplier stages is presented in Fig.2. In this case, only one resonant inductor in the first multiplier stage is necessary to ensure the adequate operation characteristics. The voltage multiplier cell increases the static gain of the classical boost by a factor (M+1), where M is the number of multiplier cells. Therefore, the output voltage is (M+1) times higher than the maximum switch voltage. The voltage multiplier cell also can operate without the resonant inductor Lr. However, the inclusion of this small inductance allows to obtain zero-current-switching (ZCS) turn-on and the negative effects of the reverse recovery current of all diodes is minimized. Thus the current transitions in all components occur in a resonant way, with low di/dt. This characteristic reduces the converter commutation losses, allowing the operation with high switching frequency, maintaining high efficiency. The multiplier capacitors connected with the negative terminal of the input voltage can be also integrated with the output capacitance, as presented in Fig. 3. With this configuration, the voltage in each output capacitor is half of the output voltage. A symmetrical output voltage can be obtained even for asymmetric loads, considering the reference in the capacitor center point. The voltage multiplier cell can be integrated with the others basics Dc-Dc converters, as presented in Fig. 4. However, as the boost converter presents the highest static gain of the basic structures, only the analysis of the boost converter integrated with the voltage multiplier is studied in this paper. But the operation characteristic presented for the boost converter is similar for the others structures. C M2
Do
L in D M2 Vin
S
Co
Ro
D M1
D M1 S
D M2
C M1
b) Buck-Boost
Fig. 4. Voltage Multiplier cell integrated with others classical Dc-Dc converters.
Fig. 2. Boost converter with “M” voltage multiplier cells.
Lr
Ro
Do
Voltage Multiplier Cell
M
2
Co
Do
DM1 DM2 C M1
C 21 1
L in
C M2
D 22
C M2
C M1 Fig. 3. Integration of the voltage multiplier capacitor with the output.
III. OPERATION ANALYSIS The operation of the proposed converter can be presented in four operation stages. Better operation characteristics are obtained when the converter operates in continuous conduction mode (CCM). Thus, the operation stages (Figs 5 to 8) and the theoretical waveforms (Fig. 9), are presented for the CCM operation. 1) First Stage ([to, t1] Fig. 5) At the instant t0, switch S is turned-off and the energy stored in the input inductor Lin is initially transferred to the multiplier capacitor CM1 through the diode DM1. The resonant inductor current (iLr) rise linearly from zero until to reach the value of the input inductor current (iLin) and the current in the diode DM1 is reduced at same proportion. The resonant inductor current charges the output capacitor Co through the diode Do. 2) Second Stage ([t1, t2] Fig. 6) At the instant (t1), the current in the diode DM1 is zero and this diode is blocked with low di/dt, minimizing the diode reverse recovery current. The resonant inductor current is equal to the input inductor current during this stage and the energy of the input inductor is transferred to the load through the diode Do. 3) Third Stage ([t2, t3] Fig. 7) At the instant (t2), the switch S is turned-on with ZCS commutation and the current in the resonant inductor Lr and in the output diode Do reduce linearly until zero, at the instant (t3). Thus the reverse recovery current of the output diode is also minimized. 4) Fourth Stage ([t3, t3] Fig.8) When output diode is blocked, DM2 conducts transferring part of the energy stored in the capacitor CM1 to the capacitor CM2, in a resonant way. When there is a balance of energy between the multiplier capacitors, the diode DM2 is blocked (t4) also with low di/dt. During the switch turn-on the input inductor stores energy as the classical boost.
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Lr
C M2
L in D M1
Vin
Vo
Do -
D M2 + -
C M1
S
+ Co
Ro is
t
Fig. 5. First Stage (to, t1) Lr
i Lin
C M2
L in
iLr
Do D M1
Vin
Vs
D M2 + -
C M1
S
t
+ Co
Ro
i DM1 -VDM1 t
Fig. 6. Second Stage (t1, t2) Lr
i DM2
C M2
L in
-VDM2
Do D M1
Vin
D M2 + -
C M1
S
+
t Co
Ro
i Do -VDo
Fig. 7. Third Stage (t2, t3) Lr L in
Vin
D M1 C M1
to
+ D M2 + -
Co
Considering the use of only one multiplier stage, the nominal duty-cycle is defined by (2). V − Vin ⋅ (M + 1) 100 − 12 ⋅ 2 D= o = = 0.76 Vo 100
The main equations to design the proposed converter are presented with a example, considering the specifications: Output power: 100W Input Voltage: 12V Output Voltage: 100V Switching Frequency: 50kHz
(2)
The static gain of the classical boost with these specifications is equal to 0.88. C. Components Voltage The maximum voltage in all diodes and power switch is equal to the CM1 voltage, calculated by:
A. Static Gain
VCM 1 = VS = VD = Vin ⋅
The static gain of the proposed converter operating in continuous conduction mode is presented in (1).
Where: M – Number of multiplier stages D – Switch duty-cycle
t4
B. Duty-cycle
Ro
IV. MAIN MATHEMATICAL ANALYSIS RESULTS
Vo (M + 1) = Vin (1 − D )
t1 t2 t3
Fig. 9. Main theoretical waveforms
Do
Fig. 8. Fourth Stage (t3, t4)
q=
t
C M2 -
S
D T
(1)
1
(1 − D )
= 12 ⋅
1
(1 − 0.76)
= 50 V
(3)
D. Input inductance The design of the input inductance is the same of the classical boost converter. Considering a current ripple equal to 45% of the nominal input current, the input inductance is equal to: ∆I L =
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Po Vin
⋅ 0.45 =
100 ⋅ 0.45 = 3.75 A 12
(4)
V ⋅D 12 ⋅ 0.76 Lin = in = = 48 µH ∆I L ⋅ f 3.75 ⋅ 50 ⋅10 3
because in this commutation the switch current is increased with the diode reverse recovery current. The commutation loss is reduced in the proposed converter because the turn-on commutation is ZCS and the effect of the reverse recovery current of all diodes is not significant due to the low di/dt.
(5)
E. Voltage multiplier capacitor The minimum capacitance of the voltage multiplier capacitor depends of the maximum output power, the multiplier capacitor voltage and the operating frequency, as shown in (6). CM1 ≥
Po max 2
VCM 1 ⋅ f
=
150 2
50 ⋅ 50 ⋅10 3
= 1.2 µF
(6)
Where: f – switching frequency VCM1 – Voltage of the CM1 multiplier capacitor Pomax- Maximum output power The maximum output power considered is equal to 150W for a nominal output power equal to 100W. This equation ensures that the energy stored in the multiplier capacitor is equal or higher than half of the energy dissipated by the load. Half of the energy consumed by the load is transferred through the multiplier capacitor and the second part is transferred directly. Thus, in an overload condition (Po>Pomax), a reduction of the output voltage will occur proportionally to the power level. The limit for the output voltage reduction is the output voltage of the classical boost converter, that is the same presented by (2). Therefore, for a small multiplier capacitance, the proposed converter will operate as a classical boost converter and the voltage multiplier cell will operates only as a non dissipative snubber.
G. Diodes conduction loss The average current in all diodes is equal to the output current. P 100 I DM1 = I DMM = I Do = o = = 1A (9) Vo 100 The conduction losses of all diodes is presented below, considering a conduction-threshold voltage equal to Vf =1.2V. P PD = 3 ⋅ o ⋅ V f = 3 ⋅1.2 = 3.6 W (10) Vo Therefore, the diodes conduction losses can be high in applications with low output voltage and high output power. Thus, the proposed converter can present an efficiency lower than the classical boost for low static gain applications (q
VS 1) C h 2:
iS
12 >
1) Ch 1: 2) Ch 2:
5 V o lt 5 us
Fig.14. Resonant inductor current.
10 Volt 5 us 2 Volt 5 us
Fig.12. Power switch voltage and current.
1>
VS
1) C h 2:
5 V o lt 5 us
Fig.15. Input inductance current.
iS Vo
12 >
1) Ch 1: 2) Ch 2:
10 Volt 1 us 2 Volt 1 us
VS
Fig.13. Switch turn-on commutation.
Figs. 16, 17 and 18 present the experimental results of the Fig. 11 prototype. Fig. 16 presents the output voltage (Vo) and the switch voltage (VS). As the structure presents two voltage multiplier, the switch voltage is equal to 100V for an output
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21 >
1) C h 1: 2) C h 2:
5 0 V o lt 1 0 us 5 0 V o lt 1 0 us
Fig.16. Power switch voltage and current.
Vo
VCM1
21 >
1) C h 1: 2) C h 2:
5 0 V o lt 1 0 us 5 0 V o lt 1 0 us
Fig.17. Output voltage and multiplier capacitor voltage.
1>
1) C h 2:
5 0 V o lt 1 0 us
Fig.18. Multiplier diode voltage.
VI. CONCLUSIONS A simple non isolated topology of a high static gain stepup Dc-Dc converter is presented in this paper. The main operation characteristics of the proposed structure are high static gain without the use of a transformer, low voltage stress, ZCS switch turn-on commutation and elimination of the reverse recovery current of all diodes. These operation characteristics allow to obtain high-efficiency and compact equipment. REFERENCES [1] R. D. Middlebrook, Transformerless, “DC-to-DC Converters with Large Conversion Ratios”, IEEE Transactions on Power Electronics, Vol. 3, Nº 4, October 1988, pp 484-488. [2] Q. Zhao and F. C. Lee, “High-Efficiency, High Step-Up DC-DC Converters”, IEEE Transactions on Power Electronics, Vol. 18, Nº 1, January 2003, pp 65-73. [3] L. L. Pfitscher, L. C. Franco and R. Gules “A New High Static Gain Non-Isolated DC-DC Converter”, IEEE Power Electronics Specialists Conference - PESC´03, Acapulco, México, 2003. [4] R. Gules and I. Barbi, “Isolated DC-DC Converters With High-Output Voltage for TWTA Telecommunication Satellite Applications”, IEEE Transactions on Power Electronics, Vol. 18, Nº 4, July 2003, pp 975-284.
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