Power Electronics Section. Chun-Shan Institute of Science & Technology. Taiwan 32500, R. 0. C. EL: 886-3-4712201 ext. 353151. FAX: 886-3-4711057.
A Built-in Input Filter Forward Converter Chmg-Shan Leu and Junn-Bin Hwang Power Electronics Section Chun-Shan Institute of Science & Technology Taiwan 32500, R. 0. C . E L : 886-3-4712201ext. 353151 FAX:886-3-4711057
Input Filter Forward Converter (BIFFC). As shown in Fig. 2(a), it is built by adding two cross-coupled capacitors to the splitting transformer windings of the TFC. Figures 2(b) and 2(c) show the improved non-pulsating input current waveform with its significantly reduced harmonic components, respectively.
ABSTRACT Employing the transformer leakage inductance and two cross-coupled capacitors, a Buili-in Input Filter Forward Converter (BZFFC) configuration is proposed to shape the input current waveform to a non-pulsating fashion. Consequently, the ripple and harmonic component of the input current can be signifwant4 reduced without adding a large input filter. Zn this paper, the circuit operation k analywd by using the PSpice sofrware and an experimental circuit on a 300 KHG 50 W converter was breadboarded for performance evaluation and comparison.
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1. INTRODUCTION Due to circuit simplicity, the forward topology has been widely used for low-to-mid power applications. Several configurations have been addressed in recent literatures, such as pulse-width modulation (PWM), quasi-resonant, multiresonant and PWM zero-voltage-transition (ZVT) [ 1,4]. However, these efforts were emphasized on reducing stress and/or losses in the main switch and rectifier diodes. Thus, higher frequency operation can be achieved to reduce the size of the output filter components and the power transformer. Yet, a large input filter is still required to alleviate the problems caused by the pulsating input current, the common characteristics of the buck family converter. Figure l(a) is the circuit diagram of the Tertiary-winding Forward converter (TFC) without input filter. The inherent &sating input current, as shown in Fig. l(b), causes additional power loss and generates undesired current harmonics in the source (Fig. l(c)).
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To reduce the ripple and harmonics of the input current, several topologies have been presented, like interleaving forward converter [ 5 ] and symmetrical push-pull converter [ 6 ] . The former is designed to cancel the ac component of the output current. Under nominal line and full load operating condition, zero-ripple output current and reducedripple input current can be achieved at the expense of increasing the complexity of the circuit. With d (duty cycle) < 0.5, input current becomes pulsating shape, though. Although the latter maintains in a non-pulsating input current waveform, the voltage waveform still has ringing during the dead-time period due to the leakage inductance energy. For a low-to-medium power application, simple circuit implementation and non-pulsating input current are preferred and can be achieved by the proposed configuration, Built-in 0-7803-1859-5/94/$4.00
1994 IEEE
917
(4 Fig. 1 (a) circuit diagram, (b) pulsating input current waveform, and (c) harmonic spectrum of the input current of the TFC.
Moreover, the circuit parasitic components are absorbed and become part of the lossless snubber circuit. Thus, the leakage inductance energy is stored and recovered via cross-coupled capacitors. Consequently, the main switch (Si)as well as the clamped diode (D,) is released from voltage spike and the efficiency of the converter is improved. In this paper, the circuit operation is analyzed by using PSpice software and an experimental circuit on a 300 KHz, 50 W converter was breadboarded for performance evaluation and comparison.
capacitance of clamped diode, CD, increases up to 2V, and remains constant during this time interval.
2. ANALYSIS AND CIRCUIT OPERATION Figure 3 shows the circuit diagram and the key waveforms of the BIFFC. The primary side of the power stage consists of a switch, S i , a clamped diod5 Dc, two cross-coupled capacitors, C1 and C2, and a transformer. The transformer comprises four identical primary windings and one tums ratio. The secondary winding with 0.5:0.5:0.5:0.5:N input filter inductor, Lin, is formed by the leakage inductance of the transformer and any stray inductance between the input source and the transformer primary winding.
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Fig. 3 The circuit diagram and key waveforms of the BIFFC
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Fig. 2 (a) circuit diagram, (b) input current waveform, and (c) harmonic spectrum of the BFFC.
(b) T I - T ~ :S I is turned off at TI. C, is linearly charged by the reflected filter inductor current, I@. When VDS reaches Vi, the forward diode, D1, is turned off. The freewheeling diode, D2, is turned on at the same time. This interval lasts until T2, when VDS ramps up to 2V,, and the clamped diode, Dc, is turned on. C1 and C2 are charged by the source LpI-CI-Lpj and Lpq-C2-Lp2, through respectively. (c) T2-T3: D, is turned on and VDS is thus clamped to 2 4 during this time interval. (d) T3-Tq: Dc is turned off at T3. This interval ends at T4, when VDS decreases and V D ramps ~ up to Vi. (e) T4-To: At T4, VDS reaches V, and keeps constant during tlus time interval. At To, S1 is turned on again, starting another switching cycle.
To simplify the analysis, the output fiter inductance is sufficiently large to be approximated by a current source with a value equal to the output current, Io. The crosscoupled capacitor is assumed sufficiently large so that the voltage across it can be assumed constant. Under steadystate operation, five operation stages exist within one switching cycle (shown in Fig. 4): (a) To-Ti: S i is turned on at To. The forward diode, Di, is turned on and the freewheeling diode, D2, is turned off. Besides the main current loop to transfer the energy to the load via Lpi-Si-Lp2, two additional circulating current loops, Cl-LpzLp3 and C2-Lp4-Lpl, are formed in a resonant fashion to recover the energy from C1 and C2 to the load. The voltage across the parasitic
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From above description, cross-coupled capacitor plays an important role in the circuit operation. Three main functions are pedormed: (1) Each capacitor operates as a voltage source with a value equal to the input voltage,Vh, under steady-state condition. During off-time period, VDs is clamped
(2) Each capacitor provides a current loop, Lpi-Ci-Lp3 and Lpq-C2-Lp~,to avoid interrupting iLpl and i ~ p 2 when S I is turned off. A built-in turn-off snubber function is thus achieved. (3) Each capacitor stores and recovers the leakage inductance energy within one cycle to improve the converter's efficiency.
to 2 V h by cross-coupled capacitors and clamped diode.
Consequently, the input current maintains in a non-pulsating shape, decreases its RMS value as well as the ripple, reduces undesired harmonic components, and transfers the energy to the load when Si is turned on thereafter. Due to the circulating current loop, the output power is contributed by all the four primary windings in the primary side when S 1 is turned on. At T2, Dc is turned on and the voltage across S1, VDS, is clamped at 2Vi. Dc operates as the voltage-clamped component instead of being a reset diode to return the energy to the source in TFC configuration.
3. SIMULATION PSpice program has been used to simulate the converter with 50 V input voltage and 5 V output voltage at 50 W of output power. The source program is listed in listl. The switching kequency is 300 KHz, and the duty cycle is 0.42. A resistor of 0.05 ohms is placed in series with each cross-coupled capacitor to improve convergence. For simplicity, S i is simulated by voltage-controlled switch, VSWITCH. Besides the Transient Analysis, the Fourier Analysis is also executed to compare the input current harmonic components between TFC and BIFFC as shown in Figs. l(c) and 2(c). List 1. The source program of BIFFC simulation ................................................... * * PSpice program for BIFFC simulation * v5.3 8/18/1993 * ................................................... t*******ttE]ementCard************t***************8
1 0 DC 50V 1 2 1 . 0 ~IC=OA ****** Transformer Model ****** LPll 2 9 90uH LP12 11 0 90uH LP13 0 6 90uH LP14 4 2 90uH LSl 14 0 40uh K1 LPll LP12 LP13 LP14 LS1 0.99999 ****** Clamping Snubber ******* C1 9 30 22u Rcl 30 6 0.05 C2 4 40 22u Rc2 40 1 1 0.05 e***** Switch M&l **t*++t**** S1 9 11 10 11 SWITCH VSWl 10 1 1 PULSE (-2 15 0 . 0 ~ ~ 00.luS . 1 ~1.3811s ~ 3.3~~) CO1 9 11 500p DSl 1 1 9 DIODE Vin Lin
Fig. 4 Equivalent circuits for different operation stages of the BIFFC.
Hence, a reset voltage across the transformer, Vt, is provided and can be expressed as
The maximum duty cycle is thus limit to 50% so that the core can be fully reset .
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D1 14 13 DIODE D2 0 13 DIODE Dc 6 4 DIODE CDl 14 13 2n CD2 0 13 2n ******Filer & si* ***** IO 13 0 DC 10A .MODEL SWITCH VSWITCH (RON=.14 ROFF=SE3 VON=lO VOFF4) .MODELDIODE D ( V J 4 . 8 R S 4 . 0 2 Is=.OlmA) .TRAN loons 9.82111s9.8m .OPTIONOPTS ACCT l T L 5 4
Fig. 7(a). Hence, a turn-off snubber circuit and a higher voltage rating MOSFET are required. On the contrary, BIFFC configuration has spike-free VDS waveform as shown in Figure 7(b) due to its built-in snubber circuit. Another concerned issue is the EM1 test. A MIL-STD-461C conducted emission interference test was taken without input and EM1 filters. Figures 8 and 9 show that EM1 filter is strongly required to meet the conducted emission specifications in both cases. However, the comparison shows that BIFFC has less conducted emission interference than that of the TFC in the whole ffequency range and an 84 dBuA improvement was achieved at 300 KHz with BIFFC configuration.
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4. EXPERIMENTAL RESULTS A 40-60 V input and 5 V output voltage at 50 W output power forward converter was implemented. It operates at 300 KHz. For the purpose of the comparison, the same breadboard is used with different allocation of C1 and C2 as shown in Figs. 5(a) and 5(b), respectively. Several circuit performance comparisons were made. Figure 6 shows the oscillograms of the input current ripple operating at full load condition. The pulsating waveform, 11, has 3.5 A (peak-
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peak) as shown in Fig 6(a). With an input filter stage added, the ac component of input current, 12, is reduced to 70 mA (peak-peak) as shown in Fig. 613). Still, the trapezoidal like waveform has higher harmonic component than that in BIFFC. As shown in Fig. 6(c), I3 has the least ripple value (50 mA peak-peak) with sinusoidal like waveform. I1
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Fig. 5 The circuit diagrams of the (a) TFC and (b) BIFFC
Fig. 7 The oscillograms of VDS: (a) TFC with 146 V voltage spike, (b) BIFFC without spike and clamped at 80 V.
Figure 7 shows the oscillograms of the voltage across SI, vDs,operating at low line and full load condition. Because the leakage inductance energy can't be absorbed in the TFC, a 146 V voltage spike happens at S1 turning-off as shown in
Finally, the efficiency of the power stage of the BIFFC is measured as the function of input voltage and load current as shown in Fig. 10. A maximum efficiency of 87.9% was obtained under low line and half load condition.
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5. CONCLUSION
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A 300 KHz, 50 W BIFFC with a 40-60 V input was implemented. The built-in input filter function is achieved by using transformer leakage inductance and cross-coupled capacitors without additional input fiter circuit. Consequently, the input current maintains in a non-pulsating shape, decreases its RMS value as well as the ripple, reduces undesired harmonic components, and transfers the energy to the load when S1 is turned on thereafter. Also, the energy stored in leakage inductance is absorbed to eliminate the voltage spike across the main switch and improve the converter's efficiency. The experimental data meet the computer simulation results quite well.
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ACKNOWLEDGMENT The authors wish to express their appreciation to Mr. JungTa Chen and Mr. Yuan Chyr of EM1 lab in CSIST QA Center for their assistance in measuring the conducted emission interference of the proposed converter.
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REFERENCES [l] K.H. Liu and F. C. Lee, "SecondaySide Resonance for High-Frequency Power Conversion," IEEE Applied Power and Electronics Conference Proc., 1986, pp. 8389. [Z] W. A. Tabisz and F. C. Lee, "A Novel Zero-VoltageSwitched Multi-Resonant Forward Converter," High Frequency Power Conversion Conference Proc., 1988, pp. 309-318. [3] H. J. Kim, C. S. Leu, R. Farrington, and F. C. Lee, "Clamp Mode Zero-Voltage-Switched Multi-Resonant Converters," IEEE Power Electronics Conference Record, 1992, pp. 78-84. [4] G.Hua, C. S. Leu, and F. C. Lee, "Novel Zero-VoltageTransition PWM Converters," IEEE Power Electronics Conference Record, 1992, pp.55-61. [SI K. K. Hedel, "High-Density Avionic Power Supply," IEEE Transactions on Aerospace and Electronics Systems, Vol. AES-16, No.5, September, 1980, pp. 615619. [6] Edward Herbert, "Analysis of the Near Zero Input Current Ripple Condition in a Symmetrical Push-pull Power Converter," High Frequency Power Conversion Conference proc., 1989, pp. 357-371.
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Fig. 10 The measured efficiency of the power stage of BIFFC.
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