Thus, binary literal C61, for instance, denotes software module. SW1 being functional. Binary random variables corresponding to the system states are defined ...
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COMPARISONS OF
AB^
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+ C COMPUTATIONS IMPLEMENTED BY
USINGPRODUCT-SUM MULTIPLIER AND POWER-SUM CIRCUIT
[12] C.-L. Wang and J.-L. Lin, “Systolic array implementation of multipliers for finite fields GF(2m), IEEE Trans. Circuits Syst., vol. CAS-38, pp. 796800, 1991.
circuit Number of cells
A Combinatorial Algorithm for Performance and Reliability Analysis Using Multistate Models
Minimum average time per computation (time unit) &mpuDtion time per cell (simulation
one 2-input AND gate delay +one 2input XOR gate delav (4.4 ns)
one 2-input AND gate delay +one 3input XOR gate delay (4.9 ns)
Decoding delay (time units) ( inputloutputdelay is also counted)
5m
5m
Number of modulowlvnomials
F(x)
F(x)
Circuit complexity per cell
Silicon arcapercelltt
2 2-input AND 2 2-input XOR 1 one-bitlatches 0.0676127 mmz
2 2-input AND 1 3-input XOR 7 one-bit latches 0.06129 m”
one 2-input AND gate delay + one 3input XOR gate delay (4.0 ns) 3m
F W . xF(x) 3
2-input AND 1 2-input XOR 1 3-inputXOR 10 one-bit latches 0.101225 m”
circuit can perform eight different types of computations. Power-sum computations of multiple different elements in GF( 2” ) are always required in decoding large t-error-correcting codes. Basically, any type of power-sum computation can be performed by using productsum multipliers. However, when we consider practical hardware implementation, there is a distinct need for a power-sum circuit to reduce the circuit complexity of the decoder. ACKNOWLEDGMENT The author would like to thank S.-C. Hsieh for her help in the chip layout and timing analyses. The author also thanks the referees for their useful suggestions. REFERENCES R. E. Blahut, Theory and Practice of Error Control Codes. Reading, MA: Addison-Wesley, 1983. A. M. Michelson and A. H. Levesque, Error-Control Techniquesfor Digital Communication. New York: Wiley, 1985. S . Lin and D. J. Costellor, Jr., Error Control Coding. Englewood Cliffs, NJ: Prentice-Hall, 1983. H. M. Shao and I. S. Reed, “On the VLSI design of a pipeline Reed-Solomon decoder using systolic arrays,” IEEE Trans. Comput., VOI.C-37, pp. 1273-1280, 1988. H. Okano and H. Imai, “A construction method of high-speed decoders using ROM’s for Bosexhaudhuri-Hocquenghem and ReedSolomon codes,” IEEE Trans. Comput., vol. C-36, pp. 1165-1171, 1987. C.-L. Wang and W.-J. Bair, “A VLSI architecture for implementation of the decoder for binary BCH codes,” in Proc. Symp. Commun., TAiwan, Dec. 9-13, 1991, pp. 36-40. S. W. Wei and C. H. Wei, “High speed decoder of ReedSolomon codes,” IEEE Trans. Commun., to appear. E. R. Berlekamp, “Bit-serial Reed-Solomon encoders,” IEEE Trans. Inform Theory, vol. IT-28, pp. 869-874, 1982. C. C. Wang ef al., “VLSI architectures for computing multiplications and inverses in GF(2m), IEEE Trans. Comput., vol. C-34, pp. 709-716, 1985. C.3. Yeh, S. Reed, and T. K. Truong, “Systolic multipliers for finite fields GF(2m), IEEE Trans. Comput., vol. C-33, pp. 357-360, 1984. B. A. Laws, Jr. and C. K. Rushforth, “A cellular-array multiplier for GF(2m), IEEE Trans. Comput., vol. C-20, pp. 1573-1578, 1971.
Malathi Veeraraghavan and Kishor S. Trivedi
Abstract-The need for the combined performance and reliability analysis of fault tolerant systems is increasing. The common approach to formulating and solving such problems is to use (semi-)Markov reward models. However, the large size of size of state spaces is a problem that plagues Markovian models. Combinatorial models have been used for modeling reliability and availability of complex systems without paying the price of large Markov models. However, assumptions of two-state behavior of components (and that of the system), independence assumptions of component state transitions, and restricfiverepair assumptions decrease the potential of combinatorial models for realistic systems. We propose a combinatorial algorithm for the combined performance and reliability analysis of coherent repairuble systems with multistate components, allowing interdependentcomponent state tmnsitions. An example illustrating the algorithm is also presented. Index’ Terms- Combinatorial methods, multistate systems, networks, performance and reliability, repairable systems, stochastic dependence.
I. INTRODUCTION Markov and Markov reward models are commonly used for performance, dependability, and performability evaluation of computer and communication systems. However, the number of states in Markov models of realistic systems tends to be rather large, creating difficulties in generation, storage, and solution of such models. Combinatorial reliability models take advantage of the system structure and avoid generation and solution of the underlying Markov model. Two terminal networks and fault trees are examples of such combinatorial models. The limitations of these combinatorial models are due to inherent assumptions of stochastic independence, two-state behavior of their components, and restrictive repair assumptions. If we consider the Markov model underlying a combinatorial reliability model, then we see that the states of the Markov model can be partitioned into two subsets: operational and failed. Likewise, each component also is in one of two states. In combinatorial models, the problem structure is then exploited to obtain expressions for the probabilities of these two subsets in terms of individual component probabilities without generating the Markov model. If we attach reward rates (measures of performance) to various states of the Markov model, then we can partition the state space into more than two subsets of states; each group being defined by states that have the same value of reward rate. These aggregate sets of Markov model states can then be thought of as multiple system states. Likewise, we may consider components to be multistate devices. If we can devise methods of computing probabilities of these aggregate Manuscript received January 2, 1992. This work was supported in part by the National Science Foundation under Grant CCR-910814 and by the Naval Surface Warfare Center under Contract N60921-92-C-0161. M.Veeraraghavan is with AT&T Bell Laboratories, Holmdel, NJ 07733. K. S. Trivedi is with the Department of Electrical Engineering, Duke University, Durham, NC 27706. IEEE Log Number 9209044.
0018-9340/94$04.00 0 1994 IEEE
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system states combinatorially from the component state probabilities, then we will have avoided the large Markov reward model. So the problem definition is as follows: model a multistate system with multistute components that can have mutually dependent state transitions; and are repairable under assumptions of a shared repair person for multiple components, using combinatorial techniques to obtain combined performance-reliability measures. The general approach to handle each italicized phrase in the above problem definition is summarized in the next paragraphs. Details of each step appear in a later section. To model multistute systems with multistute components, transform the system to a binary one with binary components. This transformation is done by assigning a binary variable to each state of each multistate component and for each state of the system. This transformation introduces dependencies among the binary variables. The dependencies can be characterized by Boolean algebraic relations [I]. To handle dependent state transitions between components, the Event-Based Reliability Model (EBRM) proposed by Lam and Li [2] is used. Binary combinatorial models often make a repair assumption of an independent repairperson per component. Hierarchical techniques are used to solve such models [3]. However, if we have a system with one repairperson for several binary components, we resort to Markov modeling. To make the component repair assumptions less restrictive in combinatorial modeling, we introduce the following approach of creating a dummy multistate component that is a combination of the binary components with the shared repairperson. This component can then be included in the multistate model, and the same hierarchical technique can be applied to model such a system. Thus we have employed the idea of multistate components to relax the independent repairperson assumption for combinatorial models. Note the repairperson can be shared between any combination of binary and multistate components. The number of states for the created dummy multistate component will be dependent on the number of state of each component that comprise it. Combinatorial techniques are used to generate a model for each system state, s k , reflecting the dependencies introduced by the multistate to binary model conversion as well as the intrinsic dependencies in the system modeled by the EBRM approach. We then employ an algorithm due to Satyanarayana and Prabhakar [4] (henceforth referred to as algorithm SP) for the two terminal reliability computation of the network. This result is interpreted as the probability of the system being in state Sk. This could be a time dependent parameter, if the probabilities of the components in the network models are time dependent. If the measures of interest for the analysis are combined performance-reliability metrics, a reward rate is assigned to each system state, and existing formulas are used for the computation. The main contribution of this brief contribution, therefore, is a combinatorial performance and reliability model algorithm that can be applied to coherent multistate systems with stochastically dependent multistate components under shared repair assumptions, i.e., one repairperson for more than one component. Work on three state device models has been done in [5] and [6]. Unlike the three state device model solutions, our algorithm allows the multistate models to be heterogeneous, Le., the components and the system can have different number of states each, with the number of states of any component or the system being any positive integer, possibly greater than three. The three commonly used solution techniques for binary combinatorial models are inclusionexclusion, sum-of-disjoint-products solutions based on pathset and cutset enumeration, and factoring. A factoring solution for multistate models is given in [7], and a solution based on pathsets and cutsets
is described by Janan [8]. In this brief contribution, we use a form of the inclusion-exclusion formula for the solution of combinatorial coherent multistate models by generating only noncancelling terms. In addition, our algorithm allows stochastically dependent repairable components, and is used for the combined analysis of performance and reliability for increased applicability. In Section 11, we define the notation and state the assumptions used in this brief contribution. In Section 111, we present a general algorithm MSMS (Multi-State Model Solution) that can be used for any heterogeneous coherent multistate system. In Section IV, we give an example to illustrate the use of this algorithm including its applicability as a combinatorial reward model solution method. 11. NOTATION AND ASSUMPTIONS
The notation used in this brief contribution is listed below:
E n3 m
c3,
total number of components in the system number of states for component j number of system states binary random variable (literal) 1, if component j is in state q 0, otherwise
={
sk
binary random variable (literal) 1, if system is in state IC 0, otherwise
={ Mk
Pk(t) rk
A(t)/R(t)
E[X(t)]
model for each system state s k probability of system being in state k at time t, k = l , . . . , m reward rate of system in state k, k = 1 , . . . , m system availabilityheliability expected systeminstantaneous reward rate
Algorithm MSMS is applicable under the assumption stated below. 1) The system is coherent. Binary coherent systems have increasing structure functions (i.e., the system reliability increases with component reliability) and each component is relevant. See [9] for definitions of multistate coherent systems.
111. ALGORITHM A system and its components may have multiple states by definition of system operation. This algorithm is applicable to such systems. Altematively, a system may consist of only binarylmultistate components, but the repair assumptions may be that several components share one repairperson. To model this, construct a dummy multistate component for the binarylmultistate components that share a repairperson. The states of this dummy component are composites of the states of the original components. The multistate models are then converted to binary models by using a literal for each state of each component and for each state of the system. This generates stochastic dependencies between the binary literals. At this point, also reflect in any inherent stochastic dependencies between components by modifying the binary combinatorial network models to EBRM's. These are then solved using algorithm SP. This algorithm has been chosen from among several network reliability modeling algorithms as it provides an efficient formula by generating only noncancelling terms while allowing the binary components to be stochastically dependent. Measures that reflect performance and reliability are computed using the state probabilities and reward rates for the system states. Other measures of interest that can be obtained using this algorithm are the probability of system failure, system state probabilities, and availability.
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Section 111-A discusses the use of multistate components to model repair assumptions more general than the “independent repairperson per component” assumption that is usually made in combinatorial modeling. Relations between literals C j , that cause the corresponding binary components in the models i u k , k = 1, 2 , . . . , m , to be mutually dependent are listed in Section 111-B. Section 111-C briefly describes the approach used to build and interpret EBRM’s. Section 111-D summarizes the main steps in the SP algorithm. The high level structure of algorithm M S M S to construct and solve models of coherent heterogeneous multistate systems is described in Section 111-E. A. Multistate Combinatorial Models f o r Repairable Systems
One way to model repair in a combinatorial model, assuming an independent repairperson per component, is using hierarchical techniques [3]. Multistate models can be used to change this restrictive repair assumption for combinatorial models. If there is one repairperson for a set of two-state components, Cj, j = 1, 2 , . . . , u, create a dummy multistate component C m that is an aggregate of these components. Component C m would then have a maximum of 2“ states. The one repairperson assumption applied to such multistate components would thus capture a more general repair assumption than the one independent repairperson per binary component assumption. The example in Section IV illustrates this approach. B. Stochastic Dependence
Three sets of relations hold between the binary literals Cj, [l]. 1 ) A component j cannot be in 2 states at the same time:
C j , . C j , = 0,
’dl
5 p, q I nj. p # q.
(1)
D. Algorithm SP Reference [4] gives a topological formula for the two terminal network reliability for coherent systems. The network could be nonseries-parallel, contain unreliable vertices or links, directed or undirected links, and possibly have s-dependent elements. We shall briefly describe the algorithm in this subsection so that a reader could follow the examples without a detailed understanding of algorithm SP itself. The algorithm generates only noncancelling terms that correspond to the p-acyclic subgraphs of the original network. A p-acyclic subgraph is an acyclic digraph (directed graph) in which every link is in at least one path from the source to the terminal vertex, and there is exactly one vertex s from which all other vertices can be reached, and exactly one vertex t which can be reached from every other vertex. The procedure used to determine the p-acyclic subgraphs of the network is to generate a rooted directed tree, details for which can be obtained from [4]. The next step in the procedure in algorithm SP is to identify the sign associated with each term, i.e., with each p-acyclic subgraph. The sign is given by ( - l ) ’ - ” + ’ , where b and TZ are the number of edges and vertices in the p-acyclic subgraph, respectively. The joint probability of the set of edges and vertices in each p -acyclic subgraph along with its sign is a contributing additive term in the resulting two terminal reliability expression.
E. Algorithm MSMS 1) Redefine components to reflect repair assumptions. This may generate multistate components, if components have shared repair. 2) Define binary random variables for each multistate com&nent and for the system:
2) A component j is necessarily in one of its states:
cj,,
Cjl + C j z + . . . + C j , , = 1 (BooleanORof thesevariables). ( 2 )
+ cj2 + . . + cj,-1 + Cj,+l + . .. + Cj,, . ’
k = 1 , 2 , . . . , m.
(4) (5)
3) Generate combinatorial binary models for all but any one state of the system’ using variables C j , :
3) The complement rule is:
cj,= C j l
Sk,
j=l,2,...,1
q = 1,2,...,nj;
(3)
4) Any dependence between the multistate components in the original system is carried over to dependencies between the binary literals in models Mk. The same relations hold between system state literals s k , k = 1 , 2 , . . . , m. C. Event-Based Reliability Models
In a binary system, component failures often are not stochastically independent. Similarly, in a multistate system, component state changes may not always be stochastically independent. One approach used in binary systems for modeling stochastically dependent failures is through conditional probabilities of failure. A problem with this approach is that the number of conditional probabilities required is exponential in the number of dependent components. To avoid this, an alternative approach using Event-Based Reliability Models (EBRM’s) is proposed in [2]. Failure causing events are modeled by “event elements” which are added to the affected links in a network model, where the affected links represent the components that have dependent failures. If the event element is “down,” then the component (link) is also down. All event elements on a link should be “up” for the component to be “up.” This strategy has been used in our algorithm after the conversion of multistate models to binary network models. An illustration of EBRM’s is provided in the example of Section IV.
VSk,
k = 1, 2 , - . . , m- 1 + M I ,
k = 1, 2 , . . - , m
- 1. (6)
4) Convert the combinatorial binary network models to eventbased reliability models to account for stochastic dependencies between components, if any. 5) Apply algorithm SP to solve each binary model Mk, k = 1, 2 , . . . ,m - 1 for Pk(t),i.e., the probability of the system being in state k at time t . System state probability for S, is given by: m-1
Pm(t) = 1-
Pk(t).
(7)
k=l
6) From system state probabilities, compute measures as needed. For example, we can compute the expected instantaneous reward rate, which captures both performance and reliability: m
where T k and Pk(t) are the reward rate for system state k, and probability of the system being in state k at time t , respectively. Availability of the system can be computed as
P3(t).
A(t)= 1 -
(9)
3e failed stales
‘Without loss of generality, we have assumed that the state for which a model is not constructed is S,.
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IV. EXAMPLE A multistate repairable array processor system with stochastically dependent multistate components is modeled for combined performance-reliability measures. A. System Description
The SRE (Successive Row Elimination) configuration of a 5 x 5 array processor system [IO] is modeled in this section. In this configuration, failure of any processor in a row leads to elimination of the whole row of processors. Each processor has two states-failed or functional. The system can be in 1 of 6 states depending on the number of functional rows. The system reward rate in each of its states is equal to the number of functional rows in the array processor system. Each processor has a constant failure rate of A. Each row of processors has an independent repairperson. Repair rate per processor, p, is assumed to be a constant. Software for these processors is developed using 2-version programming. The two versions are SWI and SW2. Software version SWI is used in the processors of rows 1 and 2, while version SW2 is used in the processors of rows 3, 4, and 5. Conservatively, we assume that a fault in software module SW1 causes all processors in rows 1 and 2 to fail. Similarly, a fault in software module SW2 is assumed to cause all processors in rows 3, 4, and 5 to fail. Each software module is also assumed to have constant failure rate 6 and a constant repair rate y.
SndC1,~~s&C55
Model M5
Fig. 1. Models for states 1 through 5 of the SRE array processor.
Fig. 2. EBRM for model M4 of the SRE system.
B. Application of Algorithm MSMS This system is coherent, and hence it can be modeled using algorithm MSMS. Step 1: As five processors in each row have shared repair, we create one multistate component per row. As all processors in a row are identical, each of these multistate components, referred to as “rows,” can be characterized by 6 states corresponding to the number of processors functional in each row. If the processors in a row are not identical, we would need Z5 = 32 states for each “row” multistate component. Step 2: The five multistate components, rows, are identified as C1, C2, C3, C4, C5. The binary literals corresponding to component (row) C, are given by:
cj, = 1, if k processors in row C j are functional,
IC = 0, 1,. . , 5 .
(10) Two components, C6 and C7, are used to represent software modules, SW1 and SW2 , respectively. These two components are binary with the functional state being denoted by 1 and the faulty state by 0. Thus, binary literal C61, for instance, denotes software module SW1 being functional. Binary random variables corresponding to the system states are defined as follows: sk
= 1,
ifkrowsarefunctional, k = 0, 1 , . . . , 5.
(11)
Step 3; Each system state is modeled with a combinatorial block diagram as shown in Fig. 1. If a row is in any state other than state 5, it implies that at least one of its processors has failed, and hence the row itself is eliminated. Step 4: Components C1 and C2 are stochastically dependent on the state of component C6. Event E1 is used to denote a functional module SWI or, equivalently, E1 = C61. Similarly, event E2 = C71 denotes that the software module SW2 is functional. To reflect these dependencies, EBRM’s are constructed for models M 4 and M3 as shown in Fig. 2 and 3, respectively. Similar EBRM’s can be constructed for the other models of the SRE system.
Fig. 3. EBRM for model M3 of the SRE system.
The EBRM for model Mq (Fig. 2) is obtained by adding events E1 and Ez to the appropriate links in model M4 of Fig. 1. Event E1 appears in links that represent binary literals and c 2 5 , and event E2 appears in links that represent binary literals (235, C45, and C55. Nodes marked A through W in Fig. 2 are perfectly reliable. Event elements are shown as small circles on the links connecting these nodes. Dashed lines are used to represent that the same event element E1 (or E z )appears on several links. Dependencies due to the conversion of multistate components to binary literals (as per Section III-B) are not shown in the EBRM of Fig. 2. Fig. 3 is generated by adding events E1 and EZ to model M B of Fig. 1. Due to the dependencies created by the software modules, SWI and SW2 , we consider the first two rows of the array system as SET I, and the latter three rows as SET 2 . There are four combinations in which exactly three rows are functional. These are: 1) both rows in SET I, one of the rows in SET 2, and both SWI and SW2 are functional; 2) one of the rows in SET 1, two of the rows in SET 2, and both SWI and SW2 are functional;
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Fig. 4. Lower level Markov model for the repair of a single row in the array processor.
Fig. 5. Lower level Markov model for the repair of a software module SWI or SW2
3) neither of the rows in SET 1, all three rows in SET 2, and both SWl and SW2 are functional; and 4) software module SWl has failed, i.e., the two rows in SET 1 are not available, and all three rows in SET 2 and software module SW2 are functional. These four combinations are shown as the four paths in Fig. 3. Step 5: A hierarchical approach is used for model solution. The hierarchy consists of models at two levels, referred to as higher-level and lower-level models. The higher-level models are the combinatorial models shown in Fig. 1 and their corresponding EBRM's. The lower-level models are Markov chains used to model repair behavior of row components and the software modules. The higher-level models M I , Mz,M3, and M4 are equivalent to networks consisting of parallel links. A network of parallel links with stochastically dependent components can be solved using algorithm SP. Model M5 consists of a series connection of five independent literals. This is hence readily solved. The resulting equations for system state probabilities are:
have an independent repairperson. The lower-level Markov model for each of the two software modules is a two-state model (Fig. 5) with rate 6 causing the UP-to-DOWN transition and the rate y causing the DOWN-to-UP transition. This model is solved for the steady state and transient probability of being in the UP state, P(C61), also equal to P(c71).Thus, the lower-level Markov models provide solutions for P(Cj5), P(C61), and P(c71). Equations (12)-( 16), obtained by solving the higher-level combinatorial models and their EBRM's, are evaluated for their numerical values using SHARPE [3]. For illustration purposes, a simpler assumption of no repair for the processors and the software modules, leads to P(cj5)= e-5Xt, P(C61) = P(c71)= e - 6 t .
(18)
Equations (12)-(16) are then solved using the results obtained from (18). Step 6: System reward rates are:
T1=1
T z = 2
T3=3
T4
=4
T5
=5
To
= 0.
(19)
The expected instantaneous reward rate is given by: 1=5
E [ X ( ~= ) I C r , P , ( t )= 5 x
+4 x
~ 5 ( t )
+3 x ~ 3 ( t )
~ 4 ( t )
1=1
+ 2 x Pz(t) + Pl(t).
(20)
The instantaneous reward rate for the system, E [ X ( t ) ] versus , time, t , for the SRE configuration with and without repair is plotted in Fig. 6. With repair, the probability of each row being in state 5, reaches steady state. So does the system being in each of its 6 states. Pi(t) = P(S1, t ) = 5P(cj5)(1- P(Cj5))4P(C61)P(C71) Hence, E [ X ( t ) ]levels off at a value greater than 0. Without repair, 3P(cj5)(1- P(cj5))2P(c7i) the probability of each row being in state 5 keeps decreasing with time. Eventually, all rows are in the failed state 0. The system with (1 - P(C61)) 2P(cj5)(1- P(cj5)) no rows has a reward rate of zero. So in the steady state, E [ X ( t ) ] ( 1 - P(C71))P(C61) (12) for an array processor system with SRE configuration without repair Pz(t) = P ( S z , t) = 10(P(cj5))2(1-P(Cj5))3P(C61)P(C71) reaches zero. Using the Markov approach instead of the multistate combinatorial (P(Cj5))2P(C61)(l - P(c7i)) method, a Markov chain with 12 states and 34 transitions is needed 3(P(c.k))2P(c7i)(1- P(C61)) for the no-repair case. With the original assumption of shared repair (1 - P(Cj5)) (13) per row of processors and repairable software modules, the Markov P3(t) = P(S3, t ) = 10(P(Cj5))3(1- P(Cj5))2P(C61)(C71) model is much more complex, since the repair transitions must reflect (P(Cj5))3(1 - P(C61))P(C71) (14) the stochastic dependencies of the processors on software modules, SWI and SW2 . The model would be even larger if all processors are P4(t) = P(S4, t ) assumed to have different characteristics. The goal of this example, = 5 ( p ( C j ~ )1) ~ (P(Cj5))P(C6i)P(C7i) however, was not to demonstrate a comparison to an equivalent Markov model, but to illustrate a new combinatorial technique of cre(15) P5(t) = P(S5,t ) = (P(Cj,))5P(C6i)P(C7i) (16) ating dummy multistate components for flexible repair assumptions. This illustration would enable a system architect/modeler to apply Po(t) = P(S0, t ) algorithm MSMS to systems that require shared repair assumptions = 1 - P l ( t ) - Pz(t) - P3(t) - P4(t) - P5(t). and yet are large enough that a Markov model would be too unwieldy.
+
+
+
+ +
(17) All rows have identical processors, and hence in the solution above, P(Cj5) is used to denote the probability of any row being in state 5, i.e., have all its processors functional. Fig. 4 shows the lower-level Markov model for the states of any row component, C j . Assuming X = 0.0001 per hour, and p = 0.33 per hour, the Markov chain shown in Fig. 4 is solved for the probability of the row being in state 5. The steady state and transient probability of being in state 5 in the Markov model P(Cj5(t)),is obtained using SHARPE. Software modules SWl and SW2 are each assumed to have constant failure rates 6 = 0.001 per hour and repair rates y = 20 per hour. Each module is assumed to
V. CONCLUSION To avoid the problem of large state spaces in Markov and Markov reward models, we described an algorithm MSMS to solve coherent combinatorial multistate models, where components can be heterogeneous (have different number of states) to obtain combined performance and reliability measures. Systems can have components whose state transitions may be stochastically dependent. Also, repair assumptions for system components are flexible, allowing several components to have shared repair. We presented an example of a multiprocessor array system with s-dependent components and shared repair, to illustrate the application of algorithm MSMS.
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[IO] J. A. B. Fortes and C. S. Raghavendra, “Dynamically reconfigurable fault-tolerant array processors,” in Pmc. IEEE Int. Symp. Fault-Tolerant Comput., vol. FTCS-14, 1984, pp. 386-392. 5.000
4.990
Two Complementary Approaches for Microcode Bit Optimization
4.996
4 I 4.994
In-Cheol Park, Se-Kyoung Hong, and Chong-Min Kyung
4.m
Absfract-In the design of microprogrammedprocessors, the minimization of microcode width is very crucial to reduce the required microcode ROM area. Tbis brief contribution suggests two different procedures which are complementary in nature: first, an integer linear programming formulation which guarantees an optimal solution for small or medium size problems; and second, a heuristic algorithm based on the graph bipartitioning to deal with large size problems. Experimental results show that the proposed heuristic algorithm yields near-optimal solutions with polynomial time complexity.
4.990
Index Terms-Microprogramming, microcode bit optimization, integer linear programming, heuristic algorithm, graph partitioning
5
I. INTRODUCTION
4
p 2
1
0 0
so0
400
600
800
lo00
1Mo
1400
1600
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ZOM)
t (in b u n )
(h) Fig. 6. Instantaneous reward rate, E[X(r)], versus time, t , for the SRE array processor.
REFERENCES L. Caldarola, “Coherent systems with multistate components,” Nucl. Eng. Des., pp. 127-139, 1980. Y.F. Lam and V.0.K. Li, “Reliability modeling and analysis of communications networks with dependent failures,” IEEE Trans. Commun., V O ~ . COM-34,
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Microprogramming [ 11 is a regular method of defining the function of controller, and has been extensively used for the controller design of most CISC(Comp1ex Instruction Set Computer)-type microprocessors. The advantages of microprogramming are well explained in the literature [1]-[3]. Since the control ROM is the heart of microprogrammed controller, optimization techniques may be used at various levels to reduce control ROM size and to increase the performance by allowing more concurrency among multiple microoperations. Microcode compaction is the process of combining microoperations into microinstructions in order to reduce the space or time necessary for the execution of a microprogram. Methods used in optimizing compilers such as code motion, dead-code elimination, and detection of possible concurrency of microoperations are also applied for microcode compaction [4]-[6]. Another optimization is to minimize the control ROM width using encoding technique. There are two extreme encoding schemes. By assigning one bit to each microoperation, maximum flexibility in the controller design can be achieved in terms of changeladdition of microinstructions. This type of encoding is known as horizontal encoding and is very wasteful of the ROM area. As the other extreme case, the ROM width becomes minimal when each microinstruction allows only one microoperation to be performed. In this case, the width of microcode becomes [log, ml , where m denotes the number of distinct microoperations. (r.1 denotes the smallest integer not less than x.) As a compromise between the flexibility for subsequent modification and the minimality of the control ROM size, Schwartz [7] proposed partitioning the microinstruction format into disjoint fields such that no two concurrent microoperations are assigned to the same field. These mutually exclusive fields are then encoded. By the encoding of these fields, subsequent modification of the Manuscript received January 6, 1992; revised November 12, 1992. The authors are with the Department of Electrical Engineering, Korea Advanced Institute of Science and Technology, Taejon 305-701, Republic of Korea. IEEE Log Number 9209045.
0018-9340/94$04.00 0 1994 IEEE
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