A Cost Driven 24GHz Doppler Radar Sensor. Development for Automotive Applications. L. Roselli(1), F. Alimenti(1), M. Comez(2), V. Palazzari(1), ...
A Cost Driven 24GHz Doppler Radar Sensor Development for Automotive Applications L. Roselli(1), F. Alimenti(1), M. Comez(2), V. Palazzari(1), F. Placentino(1), N. Porzi(2) ), A. Scarponi(1) (1) (2)
Dept. of Electronic and Information Engineering, University of Perugia, via G. Duranti 93, 06125 Perugia, Italy WiS S.r.l., via A. Vici 14, 06034 Foligno, Italy
Abstract – This paper deals with a low-cost 24GHz Doppler radar sensor for traffic surveillance. The basic building blocks of the transmit/receive chain, namely the antennas, the balanced Power Amplifier (PA), the Dielectric Resonator Oscillator (DRO), the Low Noise Amplifier (LNA) and the down conversion diode mixer will be presented underlining the key technologies and manufacturing approaches by means the required performances can be attained while keeping industrial costs extremely low.
I. INTRODUCTION Worldwide we’re experiencing an ever fast growth of traffic congestion yielding an increasing number of car accidents. Where building new highways or widening older roadways is impossible, the need for higher traffic control efficiency and increased driver safety becomes of primary importance. This state of things has raised the interest of automotive industry to develop a number of active and passive systems to enhance road safety. A Doppler radar sensor can easily measure both the true ground-speed of vehicles and the relative speed between a car and an obstacle so that it can be used to reduce reaction times in avoiding accidents or simply to monitor a high density traffic road. For these sensors the ISM 22-29 GHz frequency range is allocated, sharing the spectrum with other ultrawideband services. The use of lower millimeter-wave bands for wireless links still suffers from the problem of high design and production cost [1]. Lowering both complexity and costs of the microwave front-end is thus a key point behind the growing of such a market. This paper reports the development of a low-cost 24GHz Doppler radar sensor for automotive applications. It exploits a DRO, SMT active components, low-cost substrates and no antenna circulator, leading to a very compact, simple and quite inexpensive system. II. SENSOR ARCHITECTURE Fig. 1 shows the system block diagram. The continuous waveform signal is generated using a DRO, then a Wilkinson power divider splits such a signal in two equal parts, one feeding the transmission channel (power amplifier and transmission antenna) and another the receiving channel (local oscillator). The signal reflected back from the target, which (through the Doppler shift) contains the information about the radial velocity of the target itself, is first divided in two parts and then addressed to the RF ports of the down-conversion I and Q mixers. The I/Q configuration of the receiver is necessary in order to detect the motion versus [2]. A two antennas configuration, one for the transmitter (TX) and one for the receiver (RX), has been adopted in order to avoid the circulator, thus reducing the overall sensor cost.
Fig. 1. Architecture of the Doppler radar sensor III. KEY TECHNOLOGIES In order to reduce the industrial cost of the Doppler radar sensor as much as possible, technology and manufacturing processes have carefully been selected before beginning the design flow. As a first point, a discrete component technology, based on plastic packaged Hetero-Junction FET, SurMount™ Schottky diodes and SMT devices, has been adopted in all the active circuitry of the front-end. In this way an automated pick and place process can be used for the board assembly, with the advantages of a high production yield at a similar cost of that needed for a lowfrequency or digital PCB. The second point is the choice of a fiberglass reinforced microwave substrate, along with a single layer microstrip technology, to implement all the distributed circuits of the front-end. The cost of this kind of substrates, indeed, is less than that of PTFE materials, moreover they can be easily inserted in a consumer fabrication process, typically tuned for FR4 substrates. From the manufacturing point of view, the main advantage of fiberglass materials is that, as a consequence of a high finishing quality of the drilled-holes, a superior yield of the via-ground is achieved. Following the above approach it is apparent that the circuit design is greatly influenced by the technology selection. For example, considering that fiberglass materials are characterized by higher signal losses with respect to PTFE ones, some performance sacrifice seems to be natural. Moreover the plastic packaged HeteroJunction FET and SurMount™ Schottky diodes are all specified up to about 20GHz, thus they are used here beyond the frequency limit declared for the package. IV. BUILDING BLOCKS In this section, the design of each building block in the front-end of Fig. 1 is discussed and the experimental results are presented. All the measurements have been carried-out with a 65GHz Anritsu Vector Network
Analyzer (VNA) and with a 30GHz Rode-Schwartz Spectrum Analyzer (SA). An in-house test-fixture has been adopted to provide the necessary microstrip to coaxial connector transitions for all the board prototypes. A. Antenna system The antenna systems is shown in Fig. 2 and consists of two patch arrays composed by 10×4 elements, one for the TX and one for the RX channel. These antennas are obtained as a combination of 4 linear arrays, each formed by 10 microstrip patches, and are designed following the conventional parallel-loaded, step-impedance weighting approach, reported in [3]. Relevant microstrip impedance steps have been designed by using microwave circuit simulator. No weighting has been applied among the four linear array in order to achieve as much antenna gain as possible. Each antenna is fed from the back, by a via through crossing the ground plane.
Fig. 2. TX – RX antenna system. The measure radiation diagram of the realized antenna prototype is reported in Fig. 3. The 3dB beamwidth along the azimuth direction is less than ±4.5° and is compliant with the reference application.
Fig. 4. Balanced power amplifier. Fig. 5 shows the measured linear gain and output return loss of the PA in the 20-28GHz frequency band. At 24GHz a gain of about 7.5 dB with an output return loss better than -20dB.
Fig. 5. Measured linear gain and return loss of the PA. C. Dielectric resonator oscillator The oscillator is one of the most critical building block of the 24GHz front-end. It should feature enough output power to drive both the transmit chain as well as the down-conversion diode mixers. Moreover it should feature a low phase-noise for the autodyne Doppler detector and frequency stability over temperature. In our cost-driven design, a PLL controlled oscillator, based, for example, on the VCO proposed in [4], although feasible, would result too expensive, thus a Dielectric Resonator Oscillator (DRO) has been preferred. Fig. 6 shows the realized oscillator along with the enclosing cavity. In particular, a parallel feedback configuration has been adopted [5] since it avoids the 50Ω resistor operating at 24GHz, necessary in the series feedback configuration [6].
Fig. 3. Measured radiation diagram of the antenna. B. Balanced power amplifier In order to improve the range of the Doppler sensor, a Power Amplifier (PA) has been foreseen as a possible option in our architecture. In particular, two single-ended amplifier have been connected in parallel exploiting the balanced configuration of Fig. 4. With this approach a good output power is obtained without penalty for both the input and the output matching. The 90° hybrids have been realized using two microstrip Branch Line Couplers, while lumped capacitors have been exploited as DC blocks in order to reduce the overall PA size.
Fig. 6. 24GHz DRO with the cavity top removed. The design of this circuit starts with the measurement of the DR-cavity system. In particular the DR has been placed in the right position within the cavity and fed by two 50 Ω microstrips. These lines crosses the cavity enclosure in such a way as they can be contacted by the test-fixture. The resulting single-pole band-pass filter is
characterized by means of the VNA. From the measurement of the resonant frequency, the loaded Q factor and the signal loss, one can derive a simple circuit model based on a parallel RLC resonator coupled to the feeding microstrips by two 1:1 ideal transformers. Such a model is then inserted into a microwave circuit simulator, along with the model of the Hetero-junction FET. First, exploiting a linear analysis, the gate/drain signal delay is adjusted in order to meet the oscillation conditions. Then, using a harmonic balance simulator, the load impedance is optimized in such a way as to obtain a good compromise between output power and phase noise.
the 22-24GHz frequency range, with the device biased (VDS=2.5V, ID= 13.8mA) for the minimum noise figure. E. Down-conversion diode mixer Two equal down-conversion mixers are used in the Doppler radar sensor, one for the I channel and another for the Q channel. As illustrated in Fig. 10 a singlebalanced diode mixer, based on the well-known 180° ratrace hybrid, is adopted in the front-end [7].
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Fig. 9. Measured linear gain of the LNA.
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Fig. 7. Measured spectrum of the DRO; center 24.38GHz; span 2MHz; RBW 3kHz; VBW 300Hz. Fig. 7 reports the measured spectrum of the realized DRO prototype showing an output power of about 5dBm at 24.4GHz. A tuning range equal to 100MHz is obtained adjusting the screw on the cavity top. The estimated phase noise at 10kHz from the carrier is -65dBc/Hz, in good agreement with the simulations. Such a spectrum drops with a -20dB per decade slope up to about 1MHz frequency offset. In the figure is also clearly visible a 71kHz spurious FM modulation. This is due to the charge-capacitor device used to generate the negative gate voltage from a single 3V supply. In these conditions the current consumption of the DRO is about 30mA. From the presented results it appears that, a final tuning to 24.15GHz of the DRO, will require a second design iteration, based on a DR with slightly increased mechanical dimensions. D. Low-noise amplifier A single-ended Low Noise Amplifier (LNA) has been designed to improve the sensitivity of the receiver, mostly affected by the mixer conversion loss and noise figure. In order to optimize the LNA size, distributed DC blocks and matching networks have been designed as a whole.
Fig. 8. Low-noise amplifier. The measured performances of the LNA are reported in Fig. 9. A linear gain of about 5dB has been obtained in
This configuration has been chosen since it offers a good compromise among RF/LO isolation (provided by the hybrid), conversion loss (approaching that of a single diode mixer) and implementation simplicity.
Fig. 10. Down-conversion diode mixer. The mixer is designed around two SurMount™ silicon Schottky diodes. This innovative technology, featuring very low package parasitics, is characterized by device electrical performances as high as for beam-lead diodes, while being compatible with a pick-and-place automated assembly process. A classic design methodology is adopted. First the 180° hybrid is synthesized in microstrip technology, based on a 50Ω reference impedance. Such a circuit has been realized and measured in order to fine tune the design, and to maximize the isolation. Then a harmonic balance simulator is further adopted to adjust the design and to minimize the conversion loss. As it can bee seen from Fig. 10, the diode end not connected to he hybrid is dynamically short circuited by a proper combination of radial stubs and high impedance transmission lines. A bias is then provided to the mixer exploiting the fact that, with respect to DC, the two junctions are series connected. A preliminary measurement of the mixer has been carried-out with two laboratory sources, in such a way as the local oscillator frequency is 24.15GHz and the IF signal comes out at 180KHz. The local oscillator power is -3dBm and the input power (RF port) is -30dBm. In these conditions the conversion loss of the mixer is equal to about 12dB with a 2.5mA diode bias current, while the losses increase to 15dB without bias.
V. DISCUSSION The industrial cost for each 24GHz front-end is coarsely estimated in Tab. 1. As it can be seen the production of the whole Doppler radar sensor is expected to be feasible at a component cost less than 20 euro. Tab. 1. Industrial cost per front-end circuit elements estimated total cost n. 4 HJ FETs 3.2 € n. 4 SurMount diodes 2.8 € n. 1 dielectric resonator 3.0 € n. 1 radome 0.3 € n. 1 antenna PCB 0.5 € n. 1 transmit/receive PCB 0.5 € n. 1 mechanical housing 4.7 € n. 1 low-frequency connector 1.0 € low frequency SMT components 1.0 € total 17.0 € VI. CONCLUSIONS In this paper we have demonstrated the feasibility of a complete 24GHz Doppler radar sensor at an estimated industrial cost less than 20 euro. Such a result has been obtained with a cost-driven design flow, exploiting packaged devices, pick-and-place automated assembly and single-layer fiberglass substrates. REFERENCES [1] P. Heide et al. Proceedings of the 1995 IEEE Microwave System Conference, pp. 101-104. [2] B. Edde “RADAR: principles, technology and applications,” Prentice Hall, Englewood Cliffs (USA), 1993 , pp. 492-494. [3] R. S. Elliott, “Antenna Theory and Design,” Prentice-Hall Englewood Cliffs (USA), 1981. [4] P. Cortese et al. 34th European Microwave Conference, Amsterdam (NL), Oct. 2004, pp. 253-255. [5] O. Ishihara et al. IEEE Trans. Microwave Theory and Techniques, vol. 28, n. 8, Aug. 1980, pp. 817-824. [6] D. Kajfez et al. “Dielectric Resonators,” Noble Publishing Corporation, Atlanta (USA), 1998. [7] S. A. Maas “Microwave Mixers,” Artech House, Dedham (USA), 1986.
