A High-Power-Factor Half-Bridge Doubler Boost ... - IEEE Xplore

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 52, NO. 5, OCTOBER 2005

A High-Power-Factor Half-Bridge Doubler Boost Converter Without Commutation Losses Roberto Mendes Finzi Neto, Fernando Lessa Tofoli, and Luis Carlos de Freitas

Abstract—This paper proposes a high-power-factor half-bridge doubler boost converter without commutation losses, which provides high output voltages, i.e., from 600 to 900 V. The voltages across the semiconductor devices are low and approximately equal to the output voltage, as doubled output voltages and reduced highfrequency ripple can be achieved. A detailed mathematical analysis concerning its operation is presented, and simulation and experimental results describe the converter performance. Index Terms—Boost converters, half-bridge converters, powerfactor correction, soft switching.

I. INTRODUCTION

I

N order to meet the requirements of the proposed standards such as IEC 61000-3-2 and IEEE Std 519 on the quality of the input current that can be drawn by low-power equipment, a power-factor-correction (PFC) circuit is typically added at the utility interface of an ac–dc switch-mode power supply. The boost PFC circuit operating in continuous conduction mode (CCM) is by far the popular choice for medium- and high-power (400 W to a few kilowatts) application. This is because the continuous nature of the boost converter’s input current results in low conducted electromagnetic interference (EMI) compared to other active PFC topologies such as buck–boost and buck converters. The half-bridge boost converter is an adequate topology to obtain high dc voltages in ac–dc converters [1]–[3]. Fig. 1 shows the half-bridge boost topology with PFC, which is able to provide a power factor varying from 1.0 to 1.0 [1], as the voltage across each semiconductor device is equal to twice the output voltage. Within this context, this paper presents a soft-switched halfbridge doubler boost converter in order to obtain higher output voltages, as low voltages across the semiconductor devices are achieved. Fig. 2 shows the half-bridge doubler boost topology, which has prominent advantages. Near-unity power factor can be achieved, the voltage across each semiconductor is equal to and the voltage ripple across capacitors and is reduced. Moreover, the control circuit employed in this topology

Fig. 1. Half-bridge boost topology.

is rather simple, since the same gate signal can be applied to and . main switches Due to the advantages previously mentioned, which improves the overall performance, the topology shown in Fig. 2 has been chosen to implement a lossless commutation circuit, and it is described as follows. II. LOSSLESS HALF-BRIDGE DOUBLER BOOST CONVERTER (LHBDBC) Fig. 3 shows the proposed LHBDBC. The resonant circuit used in this converter has been adapted from [4] and [5], and it can also be used in full-bridge topologies, but this will be the scope of future work. The LHBDBC is composed of four , , , and , one resonant resonant capacitors and , and also two inductor , two auxiliary switches and , so that the zero-voltage transition (ZVT) in diodes and main switches and can be obtained. Switches are turned on under zero-current-switching (ZCS) condition. The operating stages are presented in Fig. 4, where the analysis focuses only on the positive semicycle of the input voltage, since the behavior in the negative semicycle is analogous. Fig. 5 shows the main waveforms regarding the voltages and currents of the resonant elements. A. Description of the Operating Stages

Manuscript received August 2, 2004; revised November 22, 2004. Abstract published on the Internet July 15, 2005. This paper was presented at the 2002 IEEE Power Electronics Specialists Conference, Cairns, Australia, June 23–27. R. M. F. Neto is with the Energy Processing and Power Quality Research Group, School of Computer and Electrical Engineering, Federal University of Goiás, 74605-220 Goiânia, Brazil (e-mail: [email protected]). F. L. Tofoli and L. C. de Freitas are with the Power Electronics Research Group, Department Of Electrical Engineering, Federal University of Uberlândia, 38400-902 Uberlândia, Brazil (e-mail: [email protected]; [email protected]). Digital Object Identifier 10.1109/TIE.2005.855676

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[Fig. 4(a)]—first linear stage First stage , diodes and conduct Before instant and capacitor keeps charging. the Boost current , switch is turned on under ZCS mode due At to resonant inductor . The voltage across remains increases constant and equal to , and the current in is the constant current linearly from null to , where and in the Boost inductor. The current through

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NETO et al.: HIGH-POWER-FACTOR HALF-BRIDGE DOUBLER BOOST CONVERTER WITHOUT COMMUTATION LOSSES

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Fig. 2. Half-bridge doubler boost topology.

Fig. 3.

LHBDBC.

decreases linearly as well. This stage finishes when the , what can be current in the resonant inductor equals described mathematically according to

This stage finishes when the voltage across and it can be defined according to (2)–(6)

is null, (2)

(1) •

[Fig. 4(b)]—first resonant stage Second stage The resonance involving all the resonant capacitors becomes begins when the current through inductor . The resonant current is digreater than vided equally between two resonant networks, which and are formed by two capacitor sets i.e. . The behavior of the voltages across the resonant capacitors is as follows: decreases from to null; — increases from null to ; — decreases from to ; — increases from null to . —

(3)

(4) (5) (6) where is the ratio between the resonant capacitors, defined as (7)

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Fig. 4. Equivalent circuits concerning the operating stages of the proposed ZVT-ZCS-LHBDBC. (a) First stage. (b) Second stage. (c) Third stage. (d) Fourth stage. (e) Fifth stage. (f) Sixth stage. (g) Seventh stage. (h) Eighth stage.


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Fig. 5. Operating stages of the proposed ZVT-ZCS-LHBDBC.

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Third stage [Fig. 4(c)]—second resonant stage is null and reWhen the voltage across capacitor mains clamped, switch can be turned on under ZVS constartsconducting,andthecurrentthrough dition,diode capacitor increases almost instantly. Since the curincreases, both currents through rent through and are supposed to decrease almost instantly. Once conducts the entire Boost current , resonant inductor switch is turned on in ZCS mode as well. The behavior of the voltages across the resonant capacitors is as follows: : increases from to ; — : decreases from to ; — — : increases from to . In this stage, there are low-voltage stresses across switch , and it finishes when and . • Fourth stage (Fig. 4(d))—third resonant stage is reverse biased and switch conducts Diode . The relevant resonant the current through capacitor circuit is the same one presented in the third stage. This is stage finishes when the current in resonant inductor can be turned off, and it can be null so that switch described mathematically according to (8)–(11)

(8)

(9)

(10)

(11)

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Fig. 6.

•

State planes. (a) i

versus v

. (b) i

versus v

. (c) i

versus v

Fifth stage [Fig. 4(e)]—second linear stage Since the current through the resonant inductor is null is turned off in ZCS when this stage begins, switch mode at instant . As diodes , and are reverse biased, the Boost current flows through capacitors , and . The behavior of the voltages across the resonant capacitors is s follows: decreases linearly from to ; — increases linearly from to ; — decreases linearly from to — . This stage finishes when diode starts conducting , and and the currents through capacitors become null instantly, and it can be mathematically described according to (12)–(14). (12) (13)

. (d) i

•

versus v

.

[Fig. 4(g)]—Third linear stage Seventh stage is turned off in ZVS mode, caWhen switch is charged linearly by the Boost curpacitor rent , as capacitors and discharge comand pletely. This stage finishes when , what can be mathematically described according to (15)–(17) (15) (16) (17)

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Eighth stage [Fig. 4(h)]—Second constant stage The controller defines the time interval , is turned on and and this stage finishes when switch a new switching cycle begins. The state planes shown in Fig. 6(a)–(d) can be obtained considering the theoretical analysis described previously.

(14) •

Sixth stage [Fig. 4(f)]—first constant stage In this stage, the whole variables set remains constant, as the control circuit defines the time interval . This stage finishes when switch is turned off.

B. Some Aspects Regarding the Input Current The resonant circuit employed in the LHBDBC imposes an undesirable effect to the input current, which is in discontinuous mode. In order to solve this problem, a small LC filter is applied


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TABLE I PARAMETERS SET EMPLOYED IN THE TESTS

Fig. 7. Resonant tank waveforms.

to the input of the converter, where a cutoff frequency equal to about 5%–10% of the switching frequency is set. C. Conditions for Achieving Soft Switching Main switches and and auxiliary switches and can only achieve ZVS and ZCS conditions, respectively, if two conditions are satisfied, as follows. must be at least twice the input First, the output voltage voltage , according to (18), where is about 10%–20% of the input voltage. Additional information on this statement can be found in [5] (18)

Fig. 8.

Switching detail in switches S and S .

Fig. 9.

Input voltage and input current.

must deSecond, the voltage across resonant capacitor crease to null before rad at the end of the second stage. If (7)–(18) are adequately manipulated, the condition stated in (19) results (19) Therefore, if (18) and (19) are satisfied, the LHBDBC will operate in ZCS-ZVS mode. III. SIMULATION RESULTS Simulation tests were performed on the proposed LHBDBC and using the parameters set shown in Table I. Filter inductor are the elements used in the low-pass filter filter capacitor applied to the converter. The results presented in this section were obtained for the positive semicycle of the input voltage. Fig. 7 shows the voltages across the resonant capacitors and the current through the resonant inductor. It can be seen that the maximum voltage peaks across the resonant capacitors do not exceed half of the output voltage in any circumstances. and , Fig. 8 presents the switching detail in switches is turned on and off under ZCS condition and is where turned on and off under ZVS condition. There are no voltage stresses across any of the switches and the current peak through the resonant inductor is about twice the input current. Fig. 9 depicts the input current and input voltage waveforms. It can be seen that the total harmonic distortion (THD) is significantly low and a high power factor is achieved, i.e., current THD

is 2.85% and the displacement power factor is 0.998. Fig. 10 represents the harmonic content of the input current. IV. EXPERIMENTAL RESULTS An experimental prototype of the converter was built using the same parameters set shown in Table I. Fig. 11 shows the , where it can be seen switching detail in auxiliary switch that it is turned on with zero current and turned off with zero current and zero voltage. Fig. 12 corresponds to the switching detail in main switch , rates, where the soft switching is achieved with reduced without current and/or voltage stresses. Fig. 13 evidences power factor correction, where it can be seen that the total harmonic distortion is low and a high power

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Fig. 13. Input voltage and input current. Scales: V time: 5 ms=div.

Fig. 10.

0 50 V/div; I 0 10 A/div;

Harmonic spectrum of the input current.

Fig. 11. Switching detail in switch S . Scales: V 5 A=div ; time: 1 s/div.

0 100 V/div; I

0

Fig. 14.

Harmonic spectrum of the input current.

Fig. 15.

Efficiency.

0 100 V/div; I 0

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factor is achieved, i.e., the current THD is 5.5% and the power factor is 0.990. Fig. 14 represents the harmonic content of the input current. Finally, Fig. 15 shows the converter efficiency as a function of the output power. It demonstrates that the efficiency is greater than 95% at nominal load. According to the results presented above, the following advantages can be attributed to the proposed converter. • The voltages across the semiconductor devices are reduced and approximately equal to the output voltage.

• •

Fig. 12. Switching detail in switch 5 A/div:; time: 2 s=div.

S

. Scales:

V

Doubled output voltages can be achieved. Reduced high-frequency ripple of the output voltage is and . obtained due to diodes There are no switching losses. Efficiency is considerably high. V. CONCLUSION

This paper has reported the study of a soft-switched halfbridge doubler boost converter that can be used in PFC applications. The main purpose of this work deals with the development of a lossless structure so that higher output voltages and reduced voltage stresses across the semiconductor devices can be achieved, as a high power factor and low harmonic content is


obtained. The results shows that the main advantages of the proposed topology consist in the reduced voltages on the semiconductor devices, achievement of doubled boost output voltages, reduced high-frequency ripple, and, also, lossless commutation of the switches. REFERENCES [1] R. Srinivasan and R. Oruganti, “A unity power factor converter using Half Bridge Boost topology,” IEEE Trans. Power Electron., vol. 13, no. 3, pp. 487–500, May 1998. [2] D. Maksimovic and R. Erickson, “Universal-input, high-power-factor, Boost Doubler rectifiers,” in Proc. IEEE APEC’95, Dallas, TX, 1995, pp. 459–465. [3] D. Shmilovitz, Z. Shoubou, Z. Zabar, and D. Czarkowski, “A simplified controller for a Half Bridge Boost rectifier,” in Proc. IEEE APEC’00, vol. 1, New Orleans, LA, 2001, pp. 452–455. [4] L. C. Freitas, J. B. Vieira Jr., V. J. Farias, H. L. Hey, P. S. Caparelli, and D. F. Cruz, “An optimum ZVS PWM DC to DC converter family: analysis, simulation and experimental results,” in Proc. IEEE PESC’92, Toledo, Spain, 1992, pp. 229–235. [5] L. C. Freitas, D. F. Cruz, and V. J. Farias, “A novel ZCS-ZVS PWM DC-DC Buck converter for high switching frequency: analysis, simulation and experimental results,” in Proc. IEEE APEC’93, San Diego, CA, 1993, pp. 693–699.

Roberto Mendes Finzi Neto was born in Goiânia, Brazil, in 1974. He received the B.Sc., M.Sc., and Ph.D. degrees in electrical engineering from the Federal University of Uberlândia, Uberlândia, Brazil, in 1997, 1999, and 2003, respectively. He is currently a Professor in the Department of Computer and Electrical Engineering, Federal University of Goiás, Goiânia, Brazil. He has authored several papers. His research interests include highfrequency power conversion, modeling and control of converters, power-factor-correction circuits, and new converter topologies.

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Fernando Lessa Tofoli was born in São Paulo, Brazil, in 1976. He received the B.Sc. and M.Sc. degrees in electrical engineering in 1999 and 2002, respectively, from the Federal University of Uberlândia, Uberlândia, Brazil, wher he is currently working toward the Ph.D. degree in the Power Electronics Research Group. His research interests include power-quality-related issues, high-power-factor rectifiers, and soft-switching techniques applied to static power converters.

Luiz Carlos de Freitas was born in Prata, Brazil, in 1952. He received the B.Sc. degree in electrical engineering from the Federal University of Uberlândia, Uberlândia, Brazil, in 1975, and the M.Sc. and Ph.D. degrees from the Federal University of Santa Catarina, Florianópolis, Brazil, in 1985 and 1992, respectively. He is currently with the Department of Electrical Engineering, Federal University of Uberlândia,. His research interests include high-frequency power conversion, modeling and control of converters, powerfactor-correction circuits, and novel converter topologies.