A new power-factor-corrected single-transformer UPS ... - IEEE Xplore

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filter capacitors of the PC are known. Index Terms—Bidirectional single transformer, power-factor correction, trapezoidal voltage, , uninterruptible power supply,.



A New Power-Factor-Corrected Single-Transformer UPS Design Richard Morrison, Member, IEEE, and Michael G. Egan, Member, IEEE

Abstract—Phenomenal growth in the personal computer (PC) market has fueled a corresponding growth in the need for uninterruptible power supplies (UPS’s) to back up the utility and prevent loss of data. This paper presents a new off-line UPS design suitable for PC backup applications. It is based on a novel isolated ac/dc converter derived from the integration of a nonisolated buck–boost ac/dc converter with an isolated bidirectional dual active bridge dc/dc converter. The features of the design include input powerfactor correction, a single high-frequency transformer for charging and backup, simple control, inherent current limiting, low switch voltage stresses, and zero-voltage switching of the switches over a wide operating range. The UPS output voltage is trapezoidal in shape and the transition slope can be set such that the output current crest factor is close to unity provided the values of the line filter capacitors of the PC are known. Index Terms—Bidirectional single transformer, power-factor correction, trapezoidal voltage, , uninterruptible power supply, zero-voltage switching.



APID developments in power devices and microelectronics have resulted in an increase in power-electronics-based products. In particular, growth in the use of personal computers (PC’s) has led to increased dependence on uninterruptible power supplies (UPS’s) to back up the utility supply and prevent loss of data. A typical UPS incorporates an isolated ac/dc converter for battery charging and a dc/ac inverter to supply the output load. Impending harmonic current standards will dictate ac/dc conversion incorporating power-factor correction (PFC) while increased power levels render it essential to employ a high-frequency isolating transformer and, also, ideally, soft-switching techniques. Single-stage, isolated dc/ac converters for UPS’s such as those proposed in [1]–[5] require complex control strategies and employ voltage bidirectional switches. In this paper, a two-stage strategy has been adopted. It is based on a novel isolated ac/dc converter which is obtained by the integration of a two-switch buck–boost (2SBB) ac/dc converter and a dual

Paper IPCSD 99–61 presented at the 1998 IEEE Applied Power Electronics Conference and Exposition, Anaheim, CA, February 15–19, and approved for publication in the IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS by the Industrial Power Converter Committee of the IEEE Industry Applications Society. Manuscript submitted for review November 5, 1998 and released for publication August 13, 1999. R. Morrison is with PEI Technologies, University College, National University of Ireland, Cork, Ireland (e-mail: [email protected]). M. G. Egan is with the Department of Electrical Engineering, University College, National University of Ireland, Cork, Ireland (e-mail: [email protected]). Publisher Item Identifier S 0093-9994(00)00045-1.

Fig. 1.

Two-stage dc/ac inverter.

active bridge (DAB) isolated bidirectional dc/dc converter and is designated the 2SBBDAB converter. The features of this converter include PFC, soft commutation of the switches, and low voltage stresses. The same high-frequency transformer may be used for both battery charging and backup. In this paper, first, the requirements of the UPS application are examined. The synthesis of the 2SBBDAB topology is then given and this is followed by the analysis and design of the complete UPS. Control aspects of the UPS are briefly described. Finally, experimental results are presented which validate the theory of operation of the proposed integrated UPS system. II. GENERIC UPS REQUIREMENTS A. Transformer Isolation The battery should be transformer isolated from the line to facilitate user installation. Ideally, the same high-frequency transformer would be used in both charging and backup modes of operation. B. Off-Line Configuration The UPS output electromagnetic compatibility requirements are minimal for the off-line configuration as the battery charger is the sole source of conducted electromagnetic interference (EMI). The single-phase UPS EMI standard, EN50091-2, states that the ac output of the UPS does not have to meet any conducted interference criteria if the output cable of the unit does not exceed 10 m in length. C. Trapezoidal Output Voltage The load presented by a PC power supply to the ac utility is generally an EMC filter cascaded with a full-bridge rectifier and a holdup capacitor. It can be shown that the crest factor of the current drawn by this nonlinear load can be set close to unity if the input voltage is trapezoidal shaped with a transition slope set such that the capacitor charging current drawn during transition is equal to the load current.

0093–9994/00$10.00 © 2000 IEEE




(b) Fig. 2. DAB converter.

III. TOPOLOGY SYNTHESIS A. Two-Stage DC/AC Inverter Many UPS topologies require the use of a large, utility-frequency transformer. However, the imposition of the line frequency component onto the transformer may be avoided by splitting the isolation and inversion functions into two separate power stages, as shown in Fig. 1. The dc/dc stage converts to an isolated dc bus . The inverter the battery voltage converts this bus voltage to an optimized trapezoidal ac output voltage. B. Bidirectional DC/DC Stage The DAB converter described in [1] allows isolated bidirectional power flow and, therefore, it may be used for both utility backup and charging. The configuration adopted for this application is shown in Fig. 2. Alternative bidirectional isolated dc/dc topologies for UPS systems have been proposed in [7]–[9]. However, the topology proposed in Fig. 2 has simple modeindependent control requirements, and most importantly it may be integrated with the two-switch buck–boost power-factor-corrected ac/dc stage described below. The input and output bridges switch at constant frequency and at 50% duty cycle and are phase shifted relative to each other as indicated in Fig. 2. In this case, the output current is dependent on the phase shift between the two bridges. The battery side is switched using a full-bridge circuit, while the bus side is switched using a half bridge. The half-bridge capacitors ensure that no dc voltage component is applied to the high-frequency isolation transformer.

C. AC/DC Converter In the charging mode, this converter must draw controlled current from the utility to charge the internal battery. Impending standards will impose maximum limits on the harmonic distortion content of the current drawn from the line. The ideal topology for this stage in the UPS application is the two-switch buck–boost converter of Fig. 3(a). It is capable of both voltage step-up and step-down modes of operation and voltage stresses are clamped to the input and output levels. Furthermore, it draws current with low harmonic distortion content if operated at constant duty cycle in discontinuous inductor current mode of operation. The cascade connection of the two-switch buck–boost and the DAB is shown in Fig. 3(b). D. Integrated 2SBBDAB Converter If the inductor of the two-switch buck–boost is connected to the DAB half-bridge pole, then the output switch and diode of the two-switch buck–boost can be dispensed with, as shown in Fig. 4(a). This integration results in an increase and in the rms currents of the half-bridge switches during charge mode. However, in practice, this does not cause an increase in the design current ratings of these switches because EN50091-3-1, General Performance Requirements for UPS, recommends that for a stored energy time of less than 30 min, the restored energy time should be in the range of 5–12 h. Therefore, the battery is trickle charged at a maximum level of approximately 25% of the backup power level. This new topology is referred to as the 2SBBDAB converter. The must be turned on at the same time buck–boost input switch




(b) Fig. 3. (a) Two-switch buck–boost converter. (b) Cascaded two-switch buck–boost and dual active bridge.


(b) Fig. 4. (a) 2SBBDAB converter. (b) Waveforms of buck–boost stage of 2SBBDAB.

as , as indicated by the waveforms of the buck–boost stage , of controls in Fig. 4. In this application, the duty cycle the input power and has a maximum value of 50%. must block voltage in both directions because the buck–boost output diode has been replaced by a current bidirectional switch. However, a MOSFET may be used for as the input bridge inherently provides the reverse blocking and or and must be capability. Hence, either capable of turning off at the high switching frequency of the converter.

E. Complete UPS Topology The complete UPS topology incorporating the integrated 2SBBDAB is shown in Fig. 5. The voltage-source inverter is controlled by pulsewidth modulation (PWM) with duty cycle to give a trapezoidal ac output voltage In this control is linearly swept between 0 and 1 on output voltage strategy, . polarity reversal to obtain a linear transition between The dual active bridge phase shift is controlled to keep at a fixed level.


Fig. 5.


Complete UPS design.

In addition, the buck–boost duty cycle is used to control the UPS input power and it is the only variable whose reference changes with UPS operating mode and battery charge state. Capacitors and are film capacitors which attenuate the bus voltage ripple caused by the high-frequency switching but are too low in value to affect the component of the current occurring at twice the line frequency. Therefore, the current delivered to the battery has a significant componentat twice theline frequency. The bus-side switches of the DAB are realized using MOSFET’s with series Schottky diodes and ultrafast antiparallel diodes. This combination eliminates the high turn-off losses which would be incurred by the MOSFET body diode should these switches not operate in zero-voltage switched (ZVS) mode. This is not necessary for the battery-side switches because of the low commutation voltage. In the case of the inverter, the high turn-off tail current loss of insulated gate bipolar transistors (IGBT’s) is tolerable because the devices are only commutated at the switching frequency for a short period during output voltage transitions. IV. ANALYSIS OF THE TOPOLOGY A. DC/AC Inverter The inverter gate drive, output current, and output voltage appear as in Fig. 6. The output voltage is at the peak value for

Fig. 6. Inverter gate drive, output voltage, and output current.

where is the line frequency and is the working duty cycle of the inverter. It is assumed that the rate of change in the output voltage is sufficiently low such that the impedance





Fig. 7. (a) DAB waveforms for forward operation (power transfer from battery to bus). (b) DAB waveforms for reverse operation (power transfer from bus to battery).


of the series inductor of the PC EMI filter may be neglected relative to the impedance of the shunt capacitors. The peak value of the output current is minimized if the duof the linear voltage transition is ration chosen such that the transition capacitive current is equal to the current drawn while the voltage is at its peak value


(1) is the PC input power, and are the PC input where is the UPS output capacitance as in filter capacitors, and Fig. 5. The inverter output capacitors should be chosen such that their contribution to the transition current is not significant, . thus,

For the purposes of this analysis, it is assumed that the transformer magnetizing current is negligible. The inductor current peak values are given by

B. DAB DC/DC Converter


The waveforms of the DAB dc/dc converter appear as in Fig. 7(a) for forward power transfer (power transfer from the battery to the bus) and Fig. 7(b) for reverse power transfer (power transfer from the bus to the battery).





(a) Fig. 8.


(a) ZVS boundary for battery-side switches. (b) ZVS boundary for bus-side switches.

where is half the primary to secondary turns ratio, is the battery-side inductance, including transformer leakage, is the switching frequency. and is the current drawn from the bus voltage The bus current . The average bus current can be shown to be

From (2) and (3), ZVS occurs for all MOSFET’s of the DAB for all loads provided . The integration of the two switch buck–boost with the DAB serves to aid ZVS of the bus high-side MOSFET while having no effect on the ZVS range of the bus low-side MOSFET. The rms current of the inductor is related to the average bus current by

(4) (6) Note that (4) predicts that the average bus current is independent of the output voltage. The control range of the phase shift is radians because the absolute value of the output limited to current is decreased if it is taken outside of this value. An advantage of the converter is that it is inherently current limited with the maximum possible bus current value occurring rad. Consequently, dedicated bus overat a phase shift of load protection circuitry is not required. If the MOSFET’s of the DAB are turned off while current is flowing from drain to source, the other MOSFET connected to the pole is turned on at zero voltage, i.e., for ZVS of battery-side MOSFET's for ZVS of bus-side MOSFET's



This expression for

is at a minimum for


C. AC/DC Converter The input power, averaged over a line cycle, is half the peak power, therefore, with reference to Fig. 4 (7)


Normalized rms current in the resonant inductor L of the DAB I versus battery voltage E , operating in forward mode. The normalization factor is V I =E . Bus current 0:83 A. Fig. 9.



Fig. 10. Normalized turn-off current in the battery-side switches of the DAB, i(0) versus battery voltage, E , operating in forward mode. The normalization factor is V I =E . Bus current = 0:83 A.

From an analysis of the inductor current waveform, the following inequality must be satisfied to ensure discontinuous inductor current operation of the buck–boost converter: (8) This is a necessary condition to ensure PFC. V. CONTROL STRATEGY One of the converters must control the intermediate dc-link . The only converter which exchanges energy with voltage during all three modes is the dc/dc converter, hence, this stage is the only one capable of controlling it on a continuous would be mode dependent basis. Otherwise, the control of and, therefore, more complex. The input and output parameters of the UPS must comply with the following equation in steady-state operation during each of its operating modes: (9) The system may be regarded as completely controlled if there is only one undetermined variable in(9). The output voltage must be independently controlled as it must emulate the line voltage source. It can only be continuously controlled by the dc/ac stage as the dc/dc stage is already used to control and the load does not exchange energy with the line during line , and are independent, leaving failure. The sources and . Control must be imtwo undetermined variables: is chosen as the controlled posed on one of these variables. variable because it must in any event be shaped for high input power factor. The ac/dc converter, being the only converter not committed to the control of a variable, must be used to perform this control.

Fig. 11. DAB waveforms. 5 s/div. 1: V 3: I , 2 A/div; 4: V 100 V/div. V 22.48 V; I = 14.16 A; V = 0 V.

, 10 V/div; 2: I

= 285 V; I

, 10 A/div;

= 0.96 A; E =

The control strategy of the UPS is summarized in Table I. The strategy applies for all the operating modes of the UPS. The changeover relay must also be controlled to transfer the UPS output from the line to the inverter output under conditions of brownout or line dropout when the line voltage drops below its minimum specified level VI. DESIGN AND EXPERIMENTAL RESULTS The specifications of the prototype and the parameters used in the design procedure are given in Table II. The details of the principal power components are given in Table III. Using (2)–(5), the trajectories of boundaries for ZVS operation of battery and bus-side MOSFET’s of the DAB have been plotted in Fig. 8(a) and (b). The switches revert to hard commutation for operation in the area between the two curves. Figs. 9 and 10 show the normalized resonant inductor rms



(a) Fig. 13. 2SBBDAB input and output current, nominal line voltage, battery uncharged. 2 ms/div. 1: V , 100 V/div; 2: I , 0.2 A/div; 3: I , 2 A/div. E = 22:3 V; I = 4 A; V = 230 V.




0 0

Fig. 12. 2SBBDAB waveforms. 5 s/div. 1: V , 200 V/div; 2: I ,2 A/div; 3: I , 2 A/div; 4: V , 100 V/div. (a) Nominal line voltage, full charge to battery . V 296:8 V; I = 1:0 A; E = 22:54 V; I = 2:25 A; V = 230 V; I = 2:168 A; P F = 0:77. (b) Line voltage low. V = 287 V; I = 1:0 A; E = 22:3 V; I = 8:86 A; V = 150 V; I = 0:756 A; P F = 1.


current and the battery-side switch turn-off current , respectively, as predicted by(2) and(6). In Figs. 9 and 10, . Equations the currents have been normalized to (2)–(6) assume ideal, lossless switches which accounts for the offsets between the measured and predicted results in Figs. 8–10. All prototype testing has been carried out with a rectifier–capacitor nonlinear load of power factor 0.67. The DAB waveforms under battery charged conditions are shown in Fig. 11. The 2SBBDAB waveforms under conditions of battery uncharged and brownout are shown in Fig. 12. Fig. 13 shows the 2SBBDAB line input current and battery current with the line voltage present and the battery uncharged. The parallel resonant circuit composed of the buck–boost inin Fig. 5 and its winding capacitance causes a voltage ductor

Fig. 14. UPS operating in backup mode with the Wang Microsystems PC350/33C as load. 2 ms/div. 1: V , 100 V/div; 2: I , 0.5 A/div.

Fig. 15.

UPS efficiency at 200-W output power.


overshoot across after the inductor current drops to zero bekeeps it connected to the bus voltage, hence, must cause be rated to at least twice the bus voltage. Fig. 14 shows the UPS output current and voltage while operating in backup mode with an actual PC load. Fig. 15 shows the measured UPS efficiency operating from battery backup.


[8] M. Ehsani, L. Laskai, and M. O. Bilgic, “Topological variations of the inverse dual converter for high power dc-dc applications,” in Conf. Rec. IEEE-IAS Annu. Meeting, 1990, pp. 1262–1266. [9] M. Jain, P. K. Jain, and M. Daniele, “A bidirectional dc/dc converter topology for low power application,” in Proc. IEEE PESC’97, 1997, pp. 804–810.

VII. CONCLUSION A novel UPS design optimized for the application of PC backup has been presented. The UPS peak power rating has been minimized by the generation of a trapezoidal output voltage and the introduction of the new 2SBBDAB topology has resulted in minimal switch voltage stresses and commutation losses and has enabled the charging and backup functions to be realized in a single high-frequency transformer. The prototype test results indicate that a high-performance practical UPS may be realized using this design. A patent application has been filed for the 2SBBDAB topology presented here.

Richard Morrison (M’98) was born in Cork, Ireland, in 1967. He received the B.E. degree in electrical engineering from the National University of Ireland, Cork, Ireland, in 1988. From 1988 to 1990, he was a Design Engineer with Hewlett-Packard, South Queensferry, U.K., working in the area of radio frequency instrumentation, and from 1990 to 1992, he was a Design Engineer with Computer Products, Cork, Ireland, where he specialized in the development of low-power high-density dc/dc converters. In 1992, he joined PEI Technologies, Department of Electrical Engineering, National University of Ireland, Cork, Ireland, where he is currently a Senior Research Engineer. His research activity and interests are primarily in the area of power converter design. Mr. Morrison is a member of the Institute of Engineers (Ireland).

REFERENCES [1] K. Harada, H. Sakamoto, and M. Shoyama, “Phase-controlled dc–ac converter with high-frequency switching,” IEEE Trans. Power Electron., vol. 3, pp. 406–411, Oct. 1988. [2] I. Yamato, N. Tokunaga, Y. Matsuda, H. Amano, and Y. Suzuki, “New conversion system for UPS using high frequency link,” in Proc. IEEE PESC’88, 1988, pp. 658–663. [3] H. Yonemori , Y. Nishida, and M. Nakaoka, “Instantaneous voltage control-based sinusoidal CVCF inverter with high-frequency resonant ac link and its UPS application,” in Proc. EPE’89, 1989, pp. 341–346. [4] D. L. R. Vidor and A. J. Perin, “A soft commutation constant high frequency link dc/ac converter operating with sinusoidal output voltage,” in Proc. IEEE PESC’94, 1994, pp. 637–643. [5] T. H. Abdelhamid, M. K. Darwish, P. Mehta, A. L. Mohamadien, and M. S. Abo-Elela, “A new flexible and compact high-frequency link on-line UPS system,” EPE J., vol. 5, no. 2, pp. 7–12, Sept. 1995. [6] R. W. De Doncker, D. M. Divan, and M. H. Kheraluwala, “A three-phase soft-switched high power density dc/dc converter for high power applications,” in Proc. IEEE-IAS Annu. Meeting, vol. 1, 1988, pp. 796–805. [7] H. G. Langer and H.-Ch. Skudelny, “DC to dc converters with bidirectional power flow and controllable voltage ration,” in Proc. EPE’89, 1989, pp. 1245–1250.

Michael G. Egan (M’83) received the B.E., M.Eng.Sc., and Ph.D. degrees from the National University of Ireland, Cork, Ireland, in 1977, 1979, and 1985, respectively. From 1977 to 1979, he was a Research Engineer with the Centre d’Etude Nucleaires de Grenoble, Grenoble, France. Following this, he joined the staff of the Department of Electrical Engineering, University College, National University of Ireland, lecturing in power electronics, power systems, and electrical machines. He is currently a Statutory Lecturer. In 1990, he founded PEI Technologies-UCC, a government-funded research center specializing in the area of power conversion and motion control systems. He is also currently Director of that center. His research interests are in the analysis and practical applications of power electronic converters. His present research activities concern high-frequency fully resonant topologies for both ac/dc and dc/dc power conversion. Dr. Egan is a member of the Institution of Electrical Engineers (U.K.) Professional Group P6.