1
A Post-matching Doherty Power Amplifier Employing Low-order Impedance Inverters for Broadband Applications Jingzhou Pang, Songbai He, Member, IEEE, Chaoyi Huang, Zhijiang Dai, Jun Peng, Fei You, Member, IEEE,
Abstract—This paper presents a modified Doherty configuration with extended bandwidth. The narrow band feature of the conventional Doherty amplifier is discussed in the view of the broadband matching. To extend the bandwidth, the postmatching architecture is employed in the proposed design. Meanwhile, broadband low-order impedance inverters are adopted to replace the quarter-wavelength transmission lines. Low-pass filter topologies are used to realize both the post matching network and the impedance inverters. A modified Doherty Power amplifier was designed and fabricated based on commercial GaN HEMT devices to validate the broadband characteristics of this configuration. 6 dB back-off efficiencies of 47%-57% are obtained from 1.7 to 2.6 GHz (41.9% fractional bandwidth) and the measured maximum output power ranges from 44.9 to 46.3 dBm in the designed band. In particular, more than 40% efficiencies are measured at 10 dB back-off throughout the operation band. Index Terms—Doherty, broadband, post matching, low-order impedance inverter, low-pass filter.
I. I NTRODUCTION N order to save the rare and expensive spectrum resources, the high order modulation schemes are widely adopted in the modern communication systems. The accompanying signal characteristics with large peak-to-average power ratio (PAPR) create a demand for transmitter architectures with high efficiency performance at output power back-off (OBO). A wide variety of transmitter architectures have been presented to meet this demand. In the past, architectures like envelope elimination and restoration (EER) [1], envelope tracking (ET) [2], [3], polar transmitters [4], linear amplification with nonlinear components (LINC) [5] and Doherty techniques [6] have been proven to be useful to enhance the efficiency performance for large PAPR applications. It is interesting that all these architectures adopt two-way structures. From the perspective of the signal transmission, these architectures can be divided into two different types. The first type includes EER, polar transmitters and LINC, they change the signal characteristics by transferring the high PAPR signals to constant envelope ones. The other type includes ET and Doherty transmitters, which keep the signal characteristics unchanged. With the development of the wireless communication systems, wider and wider signal bandwidths are adopted
I
This work was supported by the National Natural Science Foundation of China under grant nos 61271036 and 61001032 and by the Fundamental Research Funds for the Central Universities under project ZYGX2010Z005. The authors are with the School of Electronic Engineering, University of Electronic Science and Technology of China, Chengdu 611731, China. (email:
[email protected];
[email protected];
[email protected]).
Vgs1
Z 0 50 Output matching
Load modulation networks
RFout
Carrier PA RFin
Load Modulation point
Vgs2 Output matching
Peaking PA
Fig. 1.
The block diagram of the conventional Doherty amplifier.
to meet the increasing demand of high data transmission rates. Unfortunately, the bandwidths of the separated signals in the former type systems will be tremendously extended [7], making the design of these kinds of systems difficult. Relatively, Doherty and ET are more able to adapt to the future wireless applications. Meanwhile, wider operation bands are also required to support multi-band/multi-mode standards. During the narrow band era, the Doherty configuration was the most widely used architecture for the base-station applications. By employing Class E, F and saturation mode amplifiers, Doherty power amplifiers (DPAs) show excellent efficiency performance [8]–[10]. Recently, broadband PA design techniques have been discussed in many published papers [11]–[15]. However, it is still difficult to design broadband DPAs because of the load modulation. Some efforts to extend the DPA’s bandwidth have been done. Extending the bandwidth of the conventional load modulation networks (λ/4impedance inverter) [16], [17], exploiting compensation stages to reduce the bandwidth restrictions from the λ/4-impedance inverter [18] or using wideband harmonics-tuning to match the required loads in a wide operation band [19], different kinds of techniques have been used to improve the bandwidth performance of DPAs. However, without changing the conventional structure shown in Fig. 1, these efforts can not keep a good Doherty operation over their entire operation bands. Real frequency technique was used to modify the original Doherty structure [20], while resulting in a complicated design method. Postmatching architecture was introduced in some modified structures, achieving good bandwidth performance [21]–[23]. In fact, the conventional Doherty structure has its inherent defects
2
g 3 2.60724
g1 0.93094
Z0 / n
g 5 4.11980
Z 0 =5
Z0
g 4 0.52144
g 2 0.82396
g 6 0.18600
Z Match
(a)
Z0 / n
Z1
Z2
ZN
(a) Z0
5
Z0
(b)
Z0 / n
Z0
Real Part of ZMatch
4
The original matching band
Z0/2
3 2
Target ZMatch
1 0
(c)
0.0
0.2
0.4
0.6
0.8
1.0
1.2
Normalized frequency
Fig. 2. Summaries of broadband matching networks:(a) Multistage lowpass matching network(b) Stepped transmission-line transformer(c) Multistage band-pass matching network
1.4
1.6
1.8
2.0
(b) 3
in broadband applications, while employing the post-matching configuration is a good way to extend the bandwidth. Moreover, modified impedance inverters with broadband characteristics are required to adapt to the post-matching architecture. In this paper, we present a modified Doherty configuration which includes the post-matching architecture and low-order impedance inverters. In section II, the bandwidth limitation of the conventional Doherty configuration is discussed again in the view of broadband matching and the necessity of the post-matching is pointed out. Then, we use the low-order filter topologies to expand the category of impedance-inverters in section III. In section IV, the implementation of the modified Doherty amplifier is explained and all the measured results are presented in section V. With the modified configuration, an overall operation band of 1.7-2.6 GHz was measured with 6 dB back-off efficiency of 47%-57% and kept higher than 40% at 10 dB back-off. II. P OST M ATCHING D OHERTY A RCHITECTURE A conventional DPA’s output network normally includes output matching networks (OMNs) of the carrier and peaking PAs and a load modulation network (LMN), as shown in Fig. 1. The output current of the peaking PA changes in different input power levels, making the LMN ports present different impedance values. The Doherty operation is realized through the impedance-inverter in the LMN [6]. To get a broadband Doherty configuration, it seems like employing broadband OMNs and LMNs is the most direct method. However, simply extending the bandwidths of these two networks can not achieve the goal. In a broadband PA design, the OMN normally employ high-order topologies to realize a certain impedance ratio in the operation band. For high power amplifiers, high-order topologies are necessary because of the high impedance ratio. Meanwhile, these high-order topologies are often constructed
Imaginary Part of ZMatch
Z0 2
Z0/2 1 0
Target ZMatch
-1 -2
The original matching band
-3 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Normalized frequency
(c) Fig. 3. A 40% bandwidth 5:1 6-order low-pass impedance transformer in a normalized system with 1 Ω impedance and 1 rad/s angular frequency [24]: (a) schematic (b) real part of impedances in different load conditions (c) imaginary part of impedances in different load conditions
with filter structures, providing an appropriate pass band with impedance ratio and enough out-of-band rejection to ensure the transmission of the power. For a conventional DPA, the matching impedances are supposed to follow the variation of the LMN ports. Because of the use of the high-order filter matching networks, this assumption can not be simply generalized in the broadband DPA designs. Fig. 2 shows the most common filter topologies to realize the broadband matching networks, including stepped transmission-line (TL) impedance transformers and two kinds of multistage filter networks. The attenuation functions of these kinds of networks are described based on the same class of formulas (for example Butterworth and Chebyshev), resulting in similar characteristics although they employ different circuit topologies. In the conventional Doherty operation, the impedance of the load modulation point (LMP) shown in Fig. 1 will change from Z0 to Z0 /2 (assuming that the impedance inverter can work at any frequency), but this variation can not be transferred
3
Vgs1 Phase Compensation Line 50
Carrier Device
2 Z @ PEP ZC L Z L @ BO
Low-order Inverter
LMP Ic
Iout
Post Matching
Z 0 50
RFout
RFin Ip
Z L Z0 / n
Vgs2
2Z L
Peaking Device
Offset Line
Low-order Inverter
Fig. 4.
LMN
2 Z @ PEP ZP L @ BO
The block diagram of the post-matching DPA.
by the matching networks. This phenomenon is shown in Fig. 3. A 6-order low-pass Chebyshev matching network with impedance ratio of 5:1 and 40% matching band is presented in Fig. 3(a), the corresponding parameters are calculated based on the method introduced in [24]. The center frequency of the pass-band is normalized to 1. When the load of the network changes from Z0 = 5 to Z0 /2 = 2.5, the matching impedance ZM atch does not follow the variation trend over the matching band. This feature tremendously limits the bandwidth of the conventional DPA. Because of the similar characteristics mentioned above, this phenomenon widely exists for the highorder topologies. In order to avert this restriction, the post-matching architecture shown in Fig. 4 is presented. In this modified configuration, all of the high-order matching topologies mentioned above can be employed as the post matching networks, providing an appropriate impedance ratio in a broadband design. How to decide the impedance ratio n of the post-matching network is illustrated in Section III. In the proposed post-matching DPA, the modulated impedances at LMP can be calculated as ZC = ZL ×
Iout Ic + Ip = ZL × Ic Ic
(1)
ZP = ZL ×
Ic + Ip Iout = ZL × Ip Ip
(2)
In these equations, Iout is the output current transferred to the post-matching network. Ic and Ip are the output currents of the carrier and peaking branches, respectively. Like the conventional DPA, the carrier device is biased for class-AB operation and the peaking device for class-C operation. For the symmetrical Doherty operation, we have Ip = 0 at BO region and Ip = Ic at saturation, which means the corresponding modulated impedances at BO and saturation are ( 2ZL @ Saturation ZC = (3) ZL @ BO ( ZP =
2ZL @ Saturation ∞
@ BO
(4)
At saturation, the carrier and peaking devices are now required to generate equal power to keep this operation.
This means, the inverters in the carrier and peaking branches should provide appropriate matching from 2ZL to the required impedances. On the other hand, at BO region, in order to achieve high efficiency performance, the carrier low-order impedance inverter is required to match ZL to appropriate impedances which can make the carrier device saturated in advance. The power level of this saturation in advance is suggested to be 3 dB less than that at saturation region compared to conventional symmetrical Doherty PAs, which means the proposed DPA will also achieve high efficiency performance at 6 dB OBO region. The detailed design method of the impedance inverters are discussed in section III. In the proposed DPA, the post-matching network would not limit the DPA’s bandwidth anymore, because it is in the rear of the load modulation point, avoiding the influence of the load modulation. The LMN becomes the critical part limiting the post-matching DPA’s bandwidth. Broadband impedance inverter is needed for the carrier branch to provide appropriate matching impedances at both saturation and back-off regions. Moreover, the output impedance of the peaking branch has big influence on the carrier matching at the back-off region. An off-set line might be needed to reduce the bad influence from the peaking branch. On the other hand, the peaking inverter is required to provide appropriate impedance matching for the class-C biased peaking device at saturation. This also means the characteristic impedance of the off-set line is suggested to be set as 2ZL . III. L OAD M ODULATION N ETWORKS BASED ON L OW-O RDER I MPEDANCE I NVERTERS Quarter-wave TLs are used to realize the conventional impedance inverters. Because we employ the post-matching structure, the characteristic impedances of the λ/4-impedance inverters would become small if they were still used, sometimes making these TLs too wide to implement. Meanwhile, the λ/4-impedance inverters also restrict the bandwidth of the Doherty operation, many published papers have already illustrated this defect(e.g. [16]–[18]). Moreover, impedance inverters are directly connected to the transistors in the proposed DPA, which means they should provide not only impedance inverse but also appropriate matching. However, the λ/4impedance inverters can only realize real to real impedance transfer. Additional offset lines are needed to provide appropriate matching impedances, which would make the DPA system more complex and restrict the bandwidth more. In order to find other structures to realize the applicable impedance inverters, we should discuss the optimal impedances of the power transistors in different output power levels. Fig. 5 shows the load-pull simulation results of Cree’s GaN HEMT CGH40025F at 2.15 GHz (the centre frequency of a 40% bandwidth from 1.7 to 2.6 GHz). It can be seen that different matching conditions should be set at saturation and 3 dB output back-off, which corresponds to the required matching impedances of the carrier amplifier in the two different power levels of the Doherty operation. The two shadow areas are the overlapping regions of the Pout and PAE contours. In order to show the changing trend of the impedance
4
L C
PAE_contours_scaled Pdel_contours_scaled
Z tr
Z 0 / n =R
(a) 2.0
R
Real Part of Ztr
1.6
2R
40% bandwidth 1.2 0.8
Ztrc= (2/3)R
0.4 0.0 0.0
Fig. 5. Simulated load-pull results (PAE and Pout contours) of CGH40025F in different output power levels at 2.15 GHz.
0.2
0.4
0.6
0.8
1.0
1.2
1.4
Normalized frequency
1.6
1.8
2.0
(b) TABLE I O PTIMAL IMPEDANCES FROM LOAD - PULL SIMULATIONS IN DIFFERENT
2.0
Device Frequency Zopt (Ω) OBO Zopt (Ω) saturation Device Frequency Zopt (Ω) OBO Zopt (Ω) saturation
CGH40025F 1.7 GHz
1.9 GHz
2.4 GHz
2.6 GHz
11.4+j*18.2
10.4+j*15.6
7.9+j*12.7
7.0+j*10.6
11.5+j*9.9 CGH40010F 1.2 GHz
9.7+j*7.2
8.1+j*6.2
7.5+j*4.8
1.4 GHz
1.6 GHz
1.8 GHz
24.1+j*40.5
22.1+j*37.6
19.8+j*34.7
17.2+j*30.9
25.2+j*23.6
22.3+j*21.6
19.4+j*19.9
16.9+j*18.3
in different power levels clearly, the reference impedance for the smith chart in Fig. 5 is chosen to be 10 Ω. The blue arrow exhibit the variation trend of the optimal impedances required by the carrier PA when the input power increases. In this case, the optimal impedance changes from the area around 10.2+j*14.6 to 9.6+j*6.9 Ω. This indicates that the Doherty operation requires a kind of impedance transformation which keeps the real part nearly invariant while making the value of the imaginary part decrease. This phenomenon is observed over a wide frequency range (more than 40% bandwidth), Table I shows the optimal impedances in different power levels over the 1.7-2.6 GHz band. This feature is caused by the nonideal parasitic and packaging parameters of the transistors. Load-pull results from Cree’s CGH40010F in 1.2-1.8 GHz band are also presented in Table I showing similar feature. All the load-pull simulations are on the condition of open harmonic loads. The above discussion only indicates the needed features of the impedance inverters in the proposed DPA, but what structure can be used to realize those inverters is still unknown. The two-point matching technique provided in [25] presents a way for designing a matching network for changing loads, in which the conventional narrow band LMN can be removed. In the proposed DPA, we introduce a kind LMN based on loworder impedance inverters, which have simple topology to run
Imaginary Part of Ztr
INPUT POWER LEVELS
1.5
40% bandwidth 1.0 0.5
R 0.0
2R
-0.5 0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
Normalized frequency
1.6
1.8
2.0
(c) Fig. 6. Normalized low-order low-pass impedance transformer:(a) schematic (b) real part of impedances in different load conditions (c) imaginary part of impedances in different load conditions
the broadband Doherty operation. Fig. 6(a) shows the schematic of a normalized low-order low-pass impedance transformer. The transformed impedance Ztr is expressed as Ztr = jωL +
1 jωC + 1/R
(5)
And this expression can be expanded to its real and imaginary parts as Ztr =
R ωC + j(ωL − 2 2 ) 1 + R2 ω 2 C 2 ω C + 1/R2
(6)
From expression (6), we can know that the imaginary part of Ztr will become smaller as R become larger and the real part will not change in a certain frequency ω0 . Considering when R changes to 2R and it is required that the real part of Ztr does not change at ω0 , we have R 2R = 1 + R2 ω02 C 2 1 + (2R)2 ω02 C 2
(7)
5
L=2.1 nH PAE=45 % @
(8)
1.7 GHz
therefore, the real part of the matching impedance at ω0 is computed as 2R (9) 3 Fig. 6(b) and 6(c) shows the variations of the Ztr impedance values when R becomes 2R. In these figures, the abscissa ω 0 = ω/ω0 and we normalize ω0 and R to 1. We can find that the real part values of Ztr changed a little (less than 16%) in a 40% bandwidth, and all the imaginary part values become smaller. These trends are just the same as the impedance conditions which are needed for running the Doherty operation mentioned above. Besides, the imaginary part of Ztr can be easily adjusted by changing the value of the inductor L. From what has been discussed above, we can summarise the basic method to design a low-order low-pass impedance inverter. Besides, because R is determined by the impedance inverter, the impedance ratio of the post matching networks can be calculated as n = Z0 /R, Z0 is normally the 50 Ω load of the whole DPA system. The main steps to design the proposed DPA are described as follows. Step 1: First of all, determine the basic parameters ω0 and Ztrc . ω0 is determined by the center frequency of the preconceived DPA system while Ztrc comes from the loadpull data of the active devices. Ztrc is normally an average value of the load-pull results over the expected band. Step 2: Secondly, calculate all the parameters of the postmatching network and impedance inverters. These parameters are: the impedance value of the load modulation point R, the impedance ratio of the post-matching network n, the parameters of the inverters L and C. R is calculated from equation (9) and then n is decided by Z0 /R. For the carrier impedance inverter, C is determined by equation (8) and L should be tuned to an appropriate value based on the load-pull data. For the inverter in the peaking branch, the design method is different. The Ztrc should be recalculated from the load pull data of the peaking device and R has been already decided by the carrier branch, so equation (9) is not correct anymore. Because the main feature of the peaking inverter is to provide the required matching impedances for the peaking device at saturation, so C for the peaking inverter can be calculated from equation (6) and L should also be tuned to an appropriate value based on the load-pull data for the peaking device. The tuning procedure of design L is to change its value to ensure that the final matching impedances are all in the load-pull contours. We will present the tuning method in detail in section IV. Step 3: Thirdly, An off-set line with characteristic impedance of 2R is required to be added to the peaking inverter, reducing bad influence from the output impedances of the peaking branch on the carrier matching. Step 4: At last, design a high-order network to realize the post-matching network in the expected band and transfer the low-pass prototypes of the impedance inverters to physical circuits. Ztrc =
Fig. 7.
PAE_contours_p (Zin1-50)/(Zin1+50)
from equation(7), ω0 is calculated as r 1 ω0 = 2R2 C 2
2.15 GHz 2.6 GHz L=1.6 nH Ztr @ R L=1.1 nH
Tuning procedure of design L for the carrier branch. 1.6 nH
3.74 pF Z tr freq R= 54.000) 14 freq (1.700GHz (1.700GHz to to 2.600GHz) 2.600GHz) indep(PAE_contours_p) (0.000 to 48.000) 72.000)
PAE_contours_p (Zin1-50)/(Zin1+50)
PAE_contours_p (Zin1-50)/(Zin1+50)
(a)
(b)
freq (1.700GHz to 2.600GHz) indep(PAE_contours_p) (0.000 to 48.000) 72.000) 54.000)
(c)
Fig. 8. Simulated results of the low-pass impedance inverter:(a) schematic of the proposed impedance inverter (b) simulated matching impedances and load-pull results plotted in smith chart in the operation band at 3 dB output back-off (c) at saturation
IV. PA I MPLEMENTATION freq (1.700GHz to 2.600GHz) (0.000 to 70.000) 48.000) indep(PAE_contours_p) 58.000) A. Carrier Impedance Inverter Design In the proposed design, low-pass structures are chosen to realize both the post-matching network and the low-order impedance inverters. A 41.9% bandwidth from 1.7 GHz to 2.6 GHz is set as the basic goal to achieve. Cree’s GaN HEMTs CGH40025F are chosen as the active devices. From the simulated load-pull results shown in table I, optimal impedances are observed within a range of 7-11.4 Ω. Therefore, we set Ztrc to the average value 9.2 Ω. The impedance value of the load modulation point R and parameters of the low-order impedance inverters are calculated using the method illustrated in section III. The calculated parameters of the proposed DPA are presented as follows: R =14 Ω, C = 3.74 pF. The next step
6
Z 0 50
Ztr LMP
(Zin2-50)/(Zin2+50)
2.6 GHz 1.7 GHz
PAE=60 % Pout=42.6 dBm 1.7 GHz 2.15 GHz 2.6 GHz Ztr_p
Carrier Inverter
Vgs2 Peaking Device
50
30 / 450
35 / 250 Zpm
30 / 450
2 Z 0 / n 28
Fig. 10.
RFout
Z L 14
28 / 600
Peaking Inverter
35 / 250
Ztr_p
Post Matching
Off-set Line
Zpo
Characteristic impedance/ electrical length @ 2.15 GHz
Schematic of the LMN.
Characteristic impedance/ electrical length @ 2.15 GHz
Zpo freq (1.700GHz to 2.600GHz)
is tuning L to an appropriate value based on the load-pull data. As shown in Fig. 7, different values of L have direct influence on the matching results. To ensure a balanced performance for the DPA at back-off region, L in the carrier branch was finally set as 1.6 nH. Fig. 8 shows the simulated load-pull results and matching impedances of this low-pass impedance inverter over the designed band. The results at 3 dB output back-off and saturation are presented in Fig. 8(b) and Fig. 8(c), respectively. The imaginary part of Ztr can not match the optimal impedance over the entire band, resulting in efficiency decrease in the proposed design. Despite this mismatch, the matching impedance curves are still in the 45% and 60% PAE contours’ region at the two different power levels as shown in Fig. 8(b) and Fig. 8(c). B. Peaking Impedance Inverter and Off-set Line Design For the peaking impedance inverter design, the load-pull data of the peaking device need to be refreshed because of the different gate bias condition. The load-pull results for CGH40025F with Class-C operation are shown in Fig. 9. An average value of 11 Ω is chosen as the matching goal of the peaking inverter at the center frequency ω0 . So the peaking inverter is required to realize the real part matching from 2Z0 /n = 28 Ω to 11 Ω at 2.15 GHz. As presented in equation (6), C for the peaking inverter can be calculated p as (28/11) − 1/(28ω0 ) = 3.2 pF and L for the peaking inverter is tuned to 1 nH. The tuning method is just the same as the carrier branch L tuning design. These parameters are then transferred to a TL structure shown in Fig. 9. The matching results are also shown in Fig. 9. Fig. 10 presents the schematic of the proposed LMN. As mentioned in section II, the output impedance of the peaking branch (Zpm shown in Fig. 10) has crucial influence on the carrier matching at back-off region. As shown in Fig. 11, Zpm is now close to the zero point. An off-set line should be added to the peaking inverter, providing large output impedances to avoid this influence. Meanwhile, in order not to affect the peaking matching at saturation, the characteristic impedance of the off-set line is suggested to set as 28 Ω.
(Zin1-50)/(Zin1+50)
Fig. 9. Simulated peaking matching impedances and load-pull results plotted in smith chart.
Frequency Increase Zpm
1.7 -2.6 GHz
freq (1.700GHz to 2.600GHz)
Fig. 11. Simulated output impedances of the peaking branch with and without the designed off-set line.
It is difficult for the off-set line to provide large output impedances for a broadband design. In practice, the off-set line’s length should be set to keep the carrier PA’s highperformance running at the back-off region. In this design, a 60 degree off-set line has been chosen. The simulated impedance Zpo of the peaking branch with a 60 degree off-set line is shown in Fig. 11. It can be seen that the output impedance in the lower operation band is small (the value of the imaginary part at 1.7 GHz is only 19). Fortunately, the post-matching topology can reduce the bad influence from the peaking output impedance. That is because the post-matching network provide a small ZL , while the Zpo is parallel with it. Fig. 12 shows the simulated carrier matching impedances in smith chart with and without the impact from peaking output impedance, the load-pull results are also plotted. It can be seen that the matching impedance curves are still in the 45% PAE contours at the back-off region. C. Entire DPA Implementation Fig. 13(a) shows the schematic of the entire DPA, which was realized on the Rogers Duroid 5880 substrate with εr =2.2 and H=0.508 mm. To realize the impedance matching from 50 Ω to 14 Ω in the 1.7-2.6 GHz band, a 6-order lowpass chebyshev matching network, which is designed through the method introduced in [26], is used as the post-matching
freq (1.700GHz to 2.600GHz) indep(PAE_contours_p) (0.000 to 48.000) 72.000) 54.000)
7
-0.03
-20 S11
-25
S12
-0.04
-35
S12 (dB)
S11 (dB)
-30
-40 -45
-0.05
-50 -55 -60 1.7
Fig. 14.
W/L mm
Low-order 3.0/14.4 impedance inverter
50
Post-matching network
1.8/6.2
-0.06 2.6
-2.8
-15
-2.9
-23
-3.0
-31
-3.1
-39
-3.2
S31 S21
S23 S11
-47
S22 S33
-55
Fig. 15. 3.0/12.6
2.5/7.5
3.0/4.4
Low-order impedance inverter
(a) Vg R1
1.5/20.0 R2
15.0/14.0
2.5/23.0 8.0/17.3
4.0/7.3
C1
(b) 900 / 60
900 / 82.7
Port2
Port1 100
300
900 / 72.8
900 / 57
1.9
2.0
2.1
2.2
2.3
2.4
2.5
-63 2.6
S-parameters of the broadband power divider.
Z 0 50
28 / 600
3.0/12.0
1.8
Frequency (GHz)
RFin
RFin
2.5
S-parameters of the post-matching network.
-3.4 1.7
1.8/14.0
14
W/L mm
2.4
-3.3
RFout 1.8/6.2
Input matching networks
2.0 2.1 2.2 2.3 Frequency (GHz)
3.0/14.6
2.0/7.5
phase Compensation line
1.9
S11 S22 S33 & S23 (dB)
S21 & S31 (dB)
Fig. 12. Simulated carrier matching impedances and load-pull results plotted in smith chart with and without the impact from peaking output impedance.
1.8
Port3
Electrical length @ 2.15 GHz / Characteristic impedance
(c) Fig. 13. Schematics:(a) schematic of the proposed DPA (b) schematic of the input matching network (c) schematic of the uneven broadband power divider
network. Meanwhile, the lumped components(C, L) in the impedance inverters are transferred to distributed circuits using the same method. The input matching networks(IMNs) of the carrier and peaking PAs are designed with three-stage TL networks, and they have similar topologies. The electrical length and impedance of each TL are calculated based on the synthesis theory in [24]. High-impedance TLs are used as the supply lines to keep the low-order inverters’ characteristics. Stabilization networks consisting of an RC-tank and a resistor at the gate bias are included in the IMNs. The resulting circuit is depicted in Fig. 13(b). Besides, in order to divide the input power in the designed operation band, a 2-stage broadband power divider is designed based on the method introduced in [27]. Moreover, because the gain of the peaking PA is less than the carrier PA’s, this power divider is optimized to an uneven one to compensate the peaking PA’s gain using the method illustrated in [28]. Fig. 13(c) shows the resulting schematic of this power divider. This uneven power divider is not necessary for the modified DPA system, while employing it would improve the DPA performance in the author’s opinion. In the proposed design, the designed gain of the peaking branch is lower than that of the carrier branch at saturation, which means keeping an equal power input can not drive the peaking device to saturation while the carrier device has already been driven to. This means the load-modulation is imperfect at this situation. Increasing the input power can drive the peaking device to saturation also, but this means the gain will compress more, making the
8
14 13
Gain (dB)
12 11 10 9 8
Fig. 16.
Fabricated DPA circuit. 20
1.7 GHz 1.9 GHz 2.1 GHz 2.3 GHz 2.4 GHz 2.6 GHz
24
28
32 36 Pout (dBm)
40
44
48
50 1.7 GHz 1.9 GHz 2.1 GHz 2.3 GHz 2.4 GHz 2.6 GHz
40 30 20 30
33
36
39
42
45
48
Pout (dBm)
30
50
25
45
20
40
15
35
10
30
5
Fig. 17. Measured efficiency versus single-tone output power of the Doherty PA over 1.7-2.6 GHz.
Gain_37 dBm Smal-signal Gain
Gain_Peak Pout_Peak
0
Pout（dBm）
Fig. 18. Measured gain versus single-tone output power of the Doherty PA over 1.7-2.6 GHz.
60
Gain（dB）
Drain Efficiency (%)
70
25 20
1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 Frequency (GHz)
linearity deteriorate. By using the uneven power divider, more power can be transferred to the peaking device, which can release this defect. All the above mentioned circuits are simulated using Agilent ADS. In order to get the optimum performance, all the circuit parameters were optimized to a certain extent. Fig. 14 shows the simulated amplitude of the S-parameters of the postmatching network. This network is nearly symmetrical which means |S11| ≈ |S22| and |S12| ≈ |S21|, so |S22| and |S21| are not plotted. From Fig. 14, we can see that |S12| is very close to zero and |S11| is below -20 dB which implies the matching from 50 Ω to 14 Ω is realized successfully. The S-parameters of the uneven broadband power divider are shown in Fig. 15, only the amplitudes are plotted versus the frequency. There is 0.4 dB difference between |S21| and |S31|. The reflections (|S11|, |S22| and |S33|) and the isolation(|S23|) are all below -25 dB. The fabricated DPA circuit is shown in Fig. 16, all the testing ports (RF input, output and dc supplies) use the SMAs. The size of the entire DPA is 12 cm × 8 cm. V. MEASUREMENT RESULTS A. Continuous Wave testing Single-tone large-signal measurements were first performed over the designed band from 1.7 to 2.6 GHz. In the measurement, the gate of the carrier PA was biased at -2.8 V and the peaking PA at -6 V, while the drain biases were both 28 V. Fig. 17 presents the measured drain efficiency with respect to the output power and the measured gain on dependence of the output power is presented in Fig. 18. It is obvious that the Doherty operation is successfully realized over the entire
Fig. 19.
Measured Gain and max output power over the entire band.
band. The gain of the carrier and peaking PA changes with the frequency, making the peaking PA turn on in different output power levels at different operation frequencies. This frequency-dependent turn-on timing results in different backoff efficiency performances. Meanwhile, although the gain presents different compressions as frequency changes, a gain fluctuation within ±1 dB was still obtained at the 6 to 9 dB back-off region. The DPA’s performance on dependence of frequency is also presented. Fig. 19 shows the measured maximum output powers from 1.7 to 2.6 GHz, which ranges from 44.9 to 46.3 dBm. The measured power gain of this DPA is also plotted in Fig. 19, which is within the range of 10.2-11.6 dB at 8-9 dB back-off and 8.6-10.5 dB at saturation. Fig. 20 shows the drain efficiency at the saturation and different back-off levels measured in 100 MHz steps in the operation band. A good back-off efficiency performance was achieved showing 47% 57% drain efficiency from 1.7 to 2.6 GHz at 6 dB back-off. In the deep output power back-off region(10 dB back-off), the measured drain efficiency was still kept above 40%. B. Modulated signal testing To evaluate the performance of the DPA in modern wireless communication systems, modulated signal measurements have been performed in the operation band. Signals with different bandwidths and PAPRs were used to measure the DPA performance in different conditions.
9
70
-25
65
50
40 6 dB-Backoff
8 dB-Backoff
10 dB-Backoff
Peak
30
-28
ACPR
45
-31
35
-34
25
-37
15
1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 Frequency (GHz)
-40 30 31 32 33 34 35 36 37 38 39 40 41 42 43 Pout (dBm)
Fig. 20. Measured efficiency performance at different output power levels over the entire band.
Fig. 22. Measured drain efficiency and ACPR levels using a single-carrier 5MHz WCDMA signal with PAPR=6.5 dB at 2.3 GHz.
-10.0
70 Pout
Drain Efficiency
ACPR -15.0
60 50
-20.0
40
-25.0
30
-30.0
20
-35.0
ACPR (dBc)
Pout（dBm）& Drain efficiency (%)
55
ACPR (dBc)
Drain Efficiency (%)
60
-40.0
10 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 Frequency (GHz)
Fig. 21. Measured output power, efficiency and ACPR levels over the operation band, using a single-carrier 5 MHz WCDMA signal with PAPR=6.5 dB.
The DPA was first tested using a 5-MHz WCDMA signal with PAPR of 6.5 dB. In the experiment, the bias condition was the same as that used in the single-tone measurements. Fig. 21 shows the measured average output power and drain efficiency(higher than 45%) , as well as the adjacent channel power ratio(ACPR)(-28 to -34 dBc) across the entire band. The ACPRs in upper and lower bands are exactly similar to each other, so only one of them is plotted. Fig. 22 shows the drain efficiency and ACPR at 2.3 GHz when the output power is swept from 31 to 42 dBm. Digital pre-distortion (DPD) technique has been performed to evaluate that the DPA has the potential to be linearized. The measured DPA output spectrum at 2.3 GHz, for an average output power of 40 dBm, with and without DPD, are shown in Fig. 23. Better than -50 dBc ACPR was obtained after DPD, more than 15 dB improvement was achieved compared to the original ACPR. In the above measurements, the modulated signal is generated by the Vector Signal Generator (VSG) while the output spectrum and ACPRs are measured by the Vector Signal Analyzer (VSA). Indirect learning approach is used to realize the DPD function. A memory polynomial model with nonlinear order 9 and memory depth 3 is chosen to build the DPD structure. All the model parameters are estimated through the Least Mean Square (LMS) algorithm. A 20-MHz long term evolution (LTE) signal with 10.5 dB PAPR was also used in the experiment, to evaluate the
Power spectrum density (dBm/Hz)
Drain Efficiency(%)
Drain Efficiency
30 w DPD w/o DPD
20 10 -33.8 dBc
0
-50.3 dBc
-10 -20 -30 -40 2.285
2.29
2.295 2.3 2.305 Frequency (GHz)
2.31
2.315
Fig. 23. Measured DPA output signal spectrum of a 5-MHz WCDMA signal at 2.3 GHz with and without DPD.
DPA performance when driven by high PAPR and wide-band signals. The high PAPR implies that the DPA operates in deep back-off state, and the wide signal bandwidth results in linearization deteriorating. Fig. 24 shows the measured performance on dependence of frequency with drain efficiency still higher than 40% and ACPR from -25 to -32 dBc. The corresponding output powers are also plotted in this figure. The upper and lower ACPRs become asymmetric as the signal bandwidth extends. A summary of state-of-the-art broadband DPAs performances is shown in Table II. In Table II, BW, ηpeak and η6dB represent the bandwidth, peak drain efficiency and 6 dB backoff drain efficiency of these PAs, respectively. From Table II we can see that the proposed DPA presents good performance on all the indicators. VI. C ONCLUSION A new configuration for designing broadband doherty power amplifiers by employing the post-matching network and loworder impedance inverters is presented in this paper. By employing the proposed architecture, a broadband Doherty PA with good performance can be easily designed. Calculation method of the circuit parameters is illustrated in this paper. A modified Doherty power amplifier using this configuration is designed and implemented with commercial GaN transistors. An overall 41.9% bandwidth (1.7-2.6 GHz), around 11 dB gain and higher than 47% efficiencies at 6 dB output power
50
-15.0
40
-20.0
30
-25.0
20
-30.0
10
Pout ACPR_L
Drain Efficiency ACPR_U
ACPR (dBc)
Pout（dBm）& DE (%)
10
-35.0 -40.0
0 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 Frequency (GHz)
Fig. 24. Measured output power, efficiency and ACPR levels over the operation band, using a single-carrier 20 MHz LTE signal with PAPR=10.5 dB. TABLE II P ERFORMANCE OF R ECENTLY P UBLISHED B ROADBAND DPA S BW
Pout
Gain
ηpeak
η6dB
(GHz)
(dBm)
(dB)
(%)
(%)
[18]
3-3.6
43-44
8-11
55-66
38-56
[20]
2.2-3.0
40-42
6-8.5
50-67
40-48
[22]
0.7-1
48.5-50.8
>15.3
62-75
53-68
[23]
1.5-2.4
42
7-12
52-67
49-60
This work
1.7-2.6
44.6-46.3
10.2-11.6
57-66
47-57
back-off are measured. In the deep output power back-off region (10 dB back-off), the measured drain efficiency still keeps above 40% over the entire operation band. Moreover, the modulated measurements using WCMDA and LTE signals show good potential for applications in non-constant-envelope communication systems. VII. ACKNOWLEDGEMENT The authors would like to thank Qianhua Wei, Yanhui Wang and Qiang Wang from the Huawei Technologies Company for providing measurement support. The authors would also like to thank Gideon Naah from our laboratory for helping us with the grammatical checking. R EFERENCES [1] F. Wang, D. F. Kimball, J. D. Popp, A. H. Yang, D. Y. Lie, P. M. Asbeck, and L. E. Larson, “An improved power-added efficiency 19-dBm hybrid envelope elimination and restoration power amplifier for 802.11g WLAN applications,” IEEE Trans. Microw. Theory Techn., vol. 54, no. 12, pp. 4086-4099, Dec. 2006 [2] F. Wang, A. H. Yang, D. F. Kimball, L. E. Larson and P. M. Asbeck, “Design of wide-bandwidth envelope-tracking power amplifiers for OFDM applications,” IEEE Trans. Microw. Theory Techn., vol.53, no. 4, pp. 1244-1255, April. 2005 [3] F. You, B. Zhang, Zhebin Hu and S. He, “Analysis of a Broadband High-Efficiency Switch-Mode ∆-Σ Supply Modulator Based on a ClassE Amplifier and a Class-E Rectifier,” IEEE Trans. Microw. Theory Techn., vol. 61, no.8, pp. 2934-2948, Aug. 2013 [4] M. R. Elliott, T. Montalvo, B. P. Jeffries, F. Murden, J. Strange, A. Hill, S. Nandipaku and J. Harrebek, “A polar modulator transmitter for GSM/EDGE,” IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 21902199, Dec. 2004
[5] D. C. Cox, “Linear Amplification with Nonlinear Components,” IEEE Trans. Commun., vol. COM-22, pp. 1942-1945, Dec. 1974. [6] W. H. Doherty, “A new high efficiency power amplifier for modulated waves,” Proc. IRE, vol. 24, pp. 1163-1182, Sep. 1936. [7] M. S. Alavi, R. B. Staszewski, L. C. N. de Vreede, A. Visweswaran, and J.R.Long, “All-digitalRF modulator,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 11, pp. 3513-3526, Nov. 2012. [8] Y. S. Lee, M. W. Lee, and Y. H. Jeong, “Highly efficient Doherty amplifier based on class-E topology for WCDMA applications,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 9, pp. 608-610, Sep. 2008. [9] P. Colantonio, F. Giannini, R. Giofr, and L. Piazzon, “Theory and experimental results of a class F - Doherty power amplifier,” IEEE Trans. Microw. Theory Techn., vol. 57, no. 8, pp. 1936-1947, Aug. 2009. [10] J. Kim, J. Son, J. Moon, and B. Kim, “A saturated Doherty power amplifier based on saturated amplifier,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 2, pp. 109-111, Feb. 2010. [11] P. Saad, C. Fager, H. Cao, H. Zirath, and K. Andersson, “Design of a Highly Efficient 2-4-GHz Octave Bandwidth GaN-HEMT Power Amplifier,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 7, pp.16771685, Jul. 2010. [12] C. Huang, S. He, F. You, and Z. Hu, “Design of broadband linear and efficient power amplifier for long-term evolution applications,” IEEE Microw. Wireless Compon. Lett., vol. 23, no. 12, pp. 653-655, Dec. 2013. [13] Z. Dai, S. He, F. You, J. Peng, P. Chen and L. Dong, “A New Distributed Parameter Broadband Matching Method for Power Amplifier via Real Frequency Technique,” IEEE Trans. Microw. Theory Techn., vol.63, no.2, pp.449-458, Feb. 2015. [14] N. Tuffy, L. Guan, A. Zhu, and T. J. Brazil, “A simplified broadband design methodology for linearized high-efficiency continuous class-F power amplifiers,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 6, pp. 1952-1963, Jun. 2012. [15] T. Canning, P. J. Tasker, and S. C. Cripps, “Continuous mode power amplifier design using harmonic clipping contours: Theory and practice,” IEEE Trans. Microw. Theory Techn., vol. 62, no. 1, pp. 100-110, Jan. 2014. [16] A. Grebennikov and J. Wong, “A Dual-Band Parallel Doherty Power Amplifier for Wireless Applications,” IEEE Trans. Microw. Theory Techn., vol.60, no.10, pp. 3214-3222, Oct. 2012 [17] K. Bathich, A. Z. Markos, G. Boeck, “Frequency Response Analysis and Bandwidth Extension of the Doherty Amplifier,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 4, pp. 934-944, April 2011 [18] J. M. Rubio, J. Fang, V. Camarchia, R. Quaglia, M. Pirola and G. Ghione, “3-3.6 GHz Wideband GaN Doherty Power Amplifier Exploiting Output Compensation Stages,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 8, pp. 2543-2548, Aug. 2012 [19] K. Bathich and G. Boeck, “Wideband harmonically-tuned GaN Doherty power amplifier,” in IEEE MTT-S Int. Microw. Symp. Dig., Montreal, QC, Canada, Jun. 2012, pp. 1-3. [20] G. Sun and R. H. Jansen, “Broadband Doherty power amplifier via real frequency technique,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 1, pp. 99-111, Jan. 2012. [21] D. Kang, D. Kim, Y. Cho, B. Park, J. Kim, and B. Kim, “Design of Bandwidth-Enhanced Doherty Power Amplifiers for Handset Applications,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 12, pp. 3474-3483, Dec. 2011 [22] D. Y.-T. Wu and S. Boumaiza, “A Modified Doherty Configuration for Broadband Amplification Using Symmetrical Devices,” IEEE Trans. Microw. Theory Techn., vol.60, no.10, pp.3201-3213, Oct. 2012 [23] D. Gustafsson, C. M. Andersson, C. Fager, “A Modified Doherty Power Amplifier With Extended Bandwidth and Reconfigurable Efficiency,” IEEE Trans. Microw. Theory Techn., vol. 61, no. 1, pp. 533-542, Jan. 2013 [24] G. L. Matthaei, “Tables of Chebyshev impedance-transformation networks of low-pass filter form,” Proc. IEEE, vol. 52, no. 8, pp. 939-963, 1964 [25] M. Akbarpour, M. Helaoui and F. M. Ghannouchi, “A Transformer-Less Load-Modulated (TLLM) Architecture for Efficient Wideband Power Amplifiers,” IEEE Transactions on Microwave Theory and Techniques, vol. 60, no. 9, pp. 2863-2874, Sep. 2012. [26] K. Chen and D. Peroulis, “Design of Highly Efficient Broadband ClassE Power Amplifier Using Synthesized Low-Pass Matching Networks,” IEEE Trans. Microw. Theory Techn., vol. 59, no. 12, pp. 3162-3173, Dec. 2011. [27] S. B. Cohn, “A class of broadband three-port TEM-mode hybrids,” IEEE Trans. Microwave Theory Techn., vol. MTT-16, pp. 110-116, Feb. 1968.
11
[28] J. Kim, J. Cha, I. Kim, and B. Kim, “Optimum operation of asymmetrical-cells-based linear Doherty power amplifiers- uneven power drive and power matching,” IEEE Trans. Microw. Theory Techn., vol. 53, no. 5, pp. 1802-1809, May. 2005.
Jun Peng received the B.S.degrees in electronic information engineering from the University of Electronic Science Technology of China (UESTC), Chengdu, China, in 2013. And he is currently working toward the M.S. degree at the University of Electronic Science Technology of China. His interests are in the area of RF power amplifier linearization techniques. He is currently engaged in research on digital pre-distortion techniques of Strong nonlinearity systems.
Jingzhou Pang received the B.S. degree in electrical engineering from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 2010, and is currently working toward the Ph.D. degree at the University of Electronic Science and Technology of China, Chengdu, China. He is currently with the Smart Hybrid Radio Laboratory, UESTC. His interests include high efficiency transmitter systems, broadband power amplifier design techniques and analog linearization techniques. He is now engaged in research on ultra wideband high efficiency power amplifier designs and bandwidth extension techniques for traditional transmitter architectures.
Songbai He received the B.S., M.S., and Ph.D. degree in electronic engineering from the University of Electronic Science and Technology of China, Chengdu, China, in 1995, 1998, and 2003, respectively. In 2004, he visited Chiba University in Japan, where he worked on the research of high-efficiency switch-mode power amplifiers. In 2005, he returned to the University of Electronic Science and Technology of China, Chengdu, China, where he is now a Professor. His current research plan of broadband high-efficiency linear transmitter is supported by the Hi-tech Research and Development Program of China. His research interests include RF/MW circuits and systems, frequency synthesis, wireless communication, and nonlinear dynamic systems.
Chaoyi Huang received the B.S.degrees in electronic information engineering from the University of Electronic Science Technology of China (UESTC), Chengdu, China, in 2011, where he is currently working toward the Ph.D. degree. He is currently with the Smart Hybrid Radio Laboratory, UESTC. He is now engaged in research on design techniques for wide-band high-efficiency linear power amplifiers.
Zhijiang Dai received the B.S. degree in electrical engineering from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 2011, where he is currently working toward the Ph.D. degree. He is currently with the Smart Hybrid Radio Laboratory, (UESTC). His interests lie in the area of automatic matching techniques of PA and wideband and linear RF PA design.
Fei You was born in Chongqing, China, in 1982. He received the B.S. degree in electronic engineering and Ph.D. degree in circuits and systems from the University of Electronic Science and Technology of China, Chengdu, China, in 2004 and 2009, respectively. His research interests include high-efficiency power amplifier design and its application in linearization transmitters. Now, his research plan is to build a digital polar transmitter for the broadband communication systems. The design method of class-E power amplifier at microwave band, the high-efficiency broadband dc modulator, and the digital pre-distortion linearization method for the digital polar transmitter are the current key research points.
