A Simple and Accurate Model for RFID Rectifier - Semantic Scholar

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IEEE SYSTEMS JOURNAL, VOL. 2, NO. 4, DECEMBER 2008

A Simple and Accurate Model for RFID Rectifier Ahmed Ashry, Khaled Sharaf, Member, IEEE, and Magdi Ibrahim

Abstract—In this paper, a simple model for the UHF low power rectifier circuit is proposed. Using a novel approach to model the rectifier current waveform, simple analytical equations are derived. The output dc voltage and the efficiency of the rectifier are derived analytically. Simulation results of the rectifier using actual models are very close to those predicted by the proposed model. The derived formulas for the output dc voltage and the efficiency are simple and physically meaningful and can be used to optimize the performance of the rectifier.

Fig. 1. Diode connected transistor. (a) Diode connected PMOS. (b) Equivalent diode.

Index Terms—CMOS, micropower, model, rectifier, RFID, wireless power transmission.

I. INTRODUCTION FID is one of the top technologies for this century [1]. With its countless applications (object identification, contact-less smart cards, medical implants, and more) [2], RFID has revolutionized the life style. For most of these applications, passive RFID tags that are powered using the RF signal are the best choice. For these passive RFID tags, high conversion efficiency and low power operation are the main concerns [3]. The rectifier is the main block in the passive RFID tag as it provides the dc voltage to the other blocks of the system. The needed dc voltage is generated by converting the received RF signal into dc power. The efficiency of the rectifier is a challenge, as the amplitude of received RF signal voltage amplitude is usually small compared to the threshold voltage of the ordinary CMOS transistors [4]. Most of the RFID research is directed towards enhancing the efficiency of the rectifier by using Schottky diodes [5], silicon-on-sapphire technology [6], or low threshold transistors [7]. However, there are some publications discussing and modeling the rectifier circuit to optimize its performance, but they are either numerical models as in [8], or too complicated as in [9]. In this paper, a simple model for the rectifier circuit is introduced. By appropriate modeling of the transistor current, and applying suitable approximations, simple equations are derived. The simplicity of derivations and equations makes them more suitable for the design and optimization of the rectifier circuits. This paper is organized as follows. Section II provides the model and the equations of the diode connected transistor. In Section III, the existing rectifier models are briefly discussed. In Section IV, the proposed approach is used to approximate the rectifier waveforms, and derive the equations of the output dc voltage and the efficiency of the rectifier. In Section V, the

R

Fig. 2. I-V characteristics of the diode connected transistor.

proposed model is verified by comparing the derived equations to the simulation results. II. DIODE MODEL As the diode connected transistor shown in Fig. 1 is the basic rectifying element, the I-V characteristics of this element will be discussed in this section. PMOS transistor is chosen, because its bulk effect can be eliminated by connecting its source to the bulk terminal [7]. The characteristics of the diode connected transistor are very similar to ordinary p-n junction diode. As shown in Fig. 2, the I-V characteristics of the diode-connected transistor can be divided into the following four regions. , where is the voltage across 1) Forward region is the threshold voltage of the tranthe transistor and sistor. In this region the transistor is in saturation and a relatively large current can flow in the forward direction. The current in this region is given by [10] (1)

Manuscript received March 22, 2008; revised August 27, 2008. First published December 09, 2008; current version published December 31, 2008. The authors are with the Integrated Circuits Laboratory, Ain-Shams University, Cairo 11571, Egypt (e-mail: [email protected]). Digital Object Identifier 10.1109/JSYST.2008.2009206

is the mobility of where holes, and is the gate capacitance per unit area, are the width and the length of the transistor, respectively.

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Fig. 3. Basic rectifier circuit.

Fig. 5. Modeling transistor current as triangular pulses.

the model is sufficiently accurate, it is just a collection of empirical equations. The model does not give analytical equations, and does not give sufficient design insight. Recently, a model was introduced in [9] that is based on analytical equations. The model is accurate but the equations are still too complicated to be used in the design. Fig. 4. Waveforms of the rectifier circuit.

IV. PROPOSED RECTIFIER MODEL

2) Subthreshold region . In this region a small current flows in the forward direction. , where is the break3) Reverse region down voltage of the transistor. The equation of the current in this region can be approximated by [10] (2) is the reverse saturation current, is the subwhere threshold channel length modulation parameter. . In this region, a large cur4) Breakdown region rent flows in the reverse direction. The transistor should not be operated in this region to avoid degradation in efficiency. III. EXISTING RECTIFIER MODELS Almost all the rectifier circuits are based on the basic circuit is added to smooth the shown in Fig. 3. A large capacitor rectified output and remove high frequency ripples. For a suf, the output voltage can be ficiently large load capacitance approximated as a perfect dc voltage . As shown in Fig. 4, a large current spike flows from the input when the input voltage is higher than . In the reverse region, i.e., when , a small current leaks to the input. The exact equation of the current can be derived from (1) and (2). There are some publications that discuss the modeling of the rectifier circuit to optimize its performance. In [8], a model for the rectifier was introduced. The model was based on numerical analysis and extraction from simulation results. Although

Dealing with the exact equations of the output waveforms shown in Fig. 4 will lead to a very complicated model. On the other hand, over simplification will give inaccurate results. A smart approximation is needed to provide both accurate and simple model. In conventional high power rectifiers, the forward current spike is approximated as a rectangle pulse, while the reverse current spike is neglected. Although the rectangle pulse approximation is simple and valid for high current rectifiers, it is a very poor approximation for ultra low power rectifiers, because the forward current is significantly variable, and the reverse current spike is comparable to the forward current spike. In the proposed model, the current spikes in both forward and reverse regions are approximated as triangular pulses as shown in Fig. 5. The next step is to derive the main rectifier characteristics based on this model. The main parameter of the rectifier is the output dc voltage which can be derived by applying the principle of charge conservation (3) and are the input and the output charge transwhere ferred to the rectifier circuit in one cycle. The input charge is the integration of the input current . It is given by (4) where are the peak values of the positive and negative curare the widths of the positive rent pulses, respectively. and negative current pulses, respectively. It can be concluded from Fig. 4 that the area of the positive pulse is much larger

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than that of the negative pulse. So the input charge can be approximated as

is the output dc power, and where power in the transistor, which is given by

is the dissipated (14)

(5) From (1),

can be derived as

where and are the dissipated powers in the positive and is given by the negative current pulses, respectively.

(6) where is the peak of the input voltage signal. From Fig. 4, is given by (7)

(15) Unlike the derivation of the output dc voltage, the negative current pulse cannot be ignored, because the voltage across the is transistor in reverse is much higher than in forward. So and is given by comparable to

where is start angle of the positive current pulse which is given by

(16)

(8) where

The output charge from the rectifier in one cycle is given by

is given by (17)

(9) where is the output dc current, and is the period of the input signal. By substituting (5)–(9) into (4), it can be shown that (10) By applying some approximations,

Integrations in (15) and (16) can be solved analytically and it can be shown that is given by (18) and

is given by (19)

can be written as where

is given by

(11) (20)

and the output dc voltage is given by

Substituting from (6), (17), (18), and (19) in (14), we can get (12) The derived formula is simple and physically meaningful. It can be interpreted as follows. The output dc voltage is equal to the peak of the input signal minus the drop across the transistor. The drop across the transistor consists of a constant part which is the threshold voltage, and a variable part corresponding to the overdrive voltage of the transistor. The second important parameter of the rectifier to be derived is the conversion efficiency, which is defined as the ratio between the output power and the input power, and is given by (13)

(21) and finally the efficiency is given by (22), shown at the bottom of the page. V. MODEL VERIFICATION To verify the proposed model, a rectifier cell was designed in 130-nm standard CMOS technology. Circuit-level simulations were performed and compared to the results predicted by the model. Spectre RF was used as the circuit simulator. A single RF tone was used as the input to the rectifier. The

(22)


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Fig. 6. Output dc voltage versus the input signal amplitude.

Fig. 8. Rectifier efficiency versus the peak of the input signal.

Fig. 7. Output dc voltage versus the output dc current.

Fig. 9. Rectifier efficiency versus the output dc current.

input RF power, the output dc power, and the output dc voltage were measured at each point of each parametric sweep. The circuit-level simulation results were then exported to MATLAB. The proposed model equations were implemented in MATLAB. Then, they were plotted and compared. The output dc voltage as a function of the input signal amplitude, and the output dc current is shown in Figs. 6 and 7, respectively. Fig. 6 shows a good agreement between the simulation and the proposed model. For large input signal, the transistor gets into breakdown region and the reverse current increases dramatically. Consequently, the approximation in (5) is no longer valid. The conversion efficiency as a function of the input signal amplitude and the output dc current is shown in Figs. 8 and 9, respectively. For small values of input signal amplitude, Fig. 8 shows a good agreement between the simulation and the proposed model. For large input signal, the transistor gets into breakdown region increasing the reverse current, and hence the efficiency of the rectifier decreases drastically. The maximum efficiency can be achieved when the amplitude of the input signal is equal to or slightly lower than the value that causes the transistor to get into breakdown region. Fig. 9 suggests that there is an optimum value for the load current that gives

maximum efficiency. The rectifier should be designed such that the optimum load current is the actual desired current. This can be achieved by proper sizing of the rectifier transistor. VI. CONCLUSION A simple and physical model for the low power rectifier circuit was derived. By approximating the forward and reverse current spikes in the rectifier as triangular pulses, a simple model was obtained. The proposed model was used to derive the output dc voltage and the conversion efficiency of the rectifier as functions of the main circuit parameters. The derived equations are simple and suitable for the design especially in the early design stages. A rectifier circuit was designed in 130-nm standard CMOS technology to validate the model. The designed rectifier was simulated on the transistor level. The simulation results were then compared to the derived equations. The results show good agreement between the derived model and the simulation results which justifies the use of the proposed model. REFERENCES [1] C. K. Harmon, “Basics of RFID technology,” RFID J., 2003. [2] B. Hardgrave and R. Miller, “The myths and realities of RFID,” Int. J. Global Logistics Supply Chain Manag., vol. 1, no. 1, pp. 1–16, 2006.


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[3] A. Ashry, K. Sharaf, and M. Ibrahim, “Ultra low power UHF RFID tag in 0.13 m CMOS,” in Proc. IEEE Int. Conf. Microelectron. (ICM), 2007, pp. 283–286. [4] T. Umeda, H. Yoshida, S. Sekine, Y. Fujita, T. Suzuki, and S. Otaka, “A 950-MHz rectifier circuit for sensor network tags with 10-m distance,” IEEE J. Solid-State Circuits, vol. 41, no. 1, pp. 35–41, Jan. 2006. [5] U. Karthaus and M. Fischer, “Fully integrated passive UHF RFID transponder IC with 16.7 uW minimum RF input power,” IEEE J. Solid-State Circuits, vol. 38, no. 10, pp. 1602–1608, Oct. 2003. [6] J.-P. Curty, N. Joehl, C. Dehollain, and M. J. Declercq, “Remotely powered addressable UHF RFID integrated system,” IEEE J. Solid-State Circuits, vol. 40, no. 11, pp. 2193–2202, Nov. 2005. [7] F. Kocer and M. P. Flynn, “A new transponder architecture with on-chip ADC for long-range telemetry applications,” IEEE J. Solid-State Circuits, vol. 41, no. 5, pp. 1142–1148, May 2006. [8] J.-P. Curty, N. Joehl, F. Krummenacher, C. Dehollain, and M. J. Declercq, “A model for u-power rectifier analysis and design,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 52, no. 12, pp. 2771–2779, Dec. 2005. [9] J. Yi, W.-H. Ki, and C.-Y. Tsui, “Analysis and design strategy of UHF micro-power CMOS rectifiers for micro-sensor and RFID applications,” IEEE Trans. Circuits Syst. I., Reg. Papers, vol. 54, no. 1, pp. 153–166, Jan. 2007. [10] J. M. Rabaey, A. Chandrakasan, and B. Nikolic, Digital Integrated Circuits: A Design Perspective, 2nd ed. Upper Saddle River, NJ: Prentice-Hall, 2001.

Ahmed Ashry received the B.Sc. and M.Sc. degrees in electrical engineering from Ain Shams University, Cairo, Egypt, in 2004 and 2008, respectively. He is currently pursuing the Ph.D. degree in RF/analog IC design from Paris VI University, Paris, France. Between 2006 and 2008, he was an Analog Design Engineer with Si-Ware Systems, Egypt. His research interests include frequency synthesizers, Sigma Delta A/Ds, and RFID systems.

Khaled Sharaf (M’00) received the B.Sc. and M.Sc. degrees in electrical engineering from Ain-Shams University, Cairo, Egypt, in 1984 and 1989, respectively, and the Ph.D. degree from Waterloo University, Waterloo, ON, Canada, in 1994. Since 1996, he has been with the Department of Electronics and Communication Engineering, Ain-Shams University, where he is now a Professor. His current research interests include RF and high-speed mixed-signal ASIC design.

Magdi Ibrahim received the B.Sc. and M.Sc. degrees in electrical engineering from Ain-Shams University, Cairo, Egypt, in 1965 and 1969, respectively, and the Ph.D. degree from the University of Nebraska, Lincoln, in 1971. In 1972, he became a member of the faculty of the Department of Electrical Engineering, Ain-Shams University, Cairo, Egypt, where he is now a Professor. His recent work has centered on optimization of optical communication systems.
