Keywords: organic field-effect transistor, insulator, contact resistance, ... electronics, but also enlightening guidance, motivation and continuous support during ..... Unfortunately, the efforts were not rewarded by success until 1975, when it was found .... Note that in transistors there is no injection from the drain (see text).
Alternative Gate Insulators for Organic Field-Effect Transistors by
Leszek Artur Majewski
A thesis submitted to the University of Sheffield for the degree of Doctor of Philosophy in the subject of Physics
Sheffield, April 2005
The University of Sheffield Department of Physics and Astronomy Photonics Group
L. A. Majewski, “Alternative Gate insulators for Organic Field-Effect Transistors”, The University of Sheffield, Department of Physics and Astronomy, Photonics Group, Sheffield, April 2005
Abstract Field-effect transistors manufactured with organic materials (OFETs) promise cheap, flexible and disposable “plastic” electronics. A major problem that remains on the way towards practical OFET devices is high operational voltage (~ 30 V - 50 V), which will not be available in a typical “low-end” applications. The key to low voltage operation is reduction of threshold voltage, and inverse subthreshold slope. These transistor parameters are largely controlled by the gate insulator, rather than the semiconductor. Consequently, the aim of this work was to develop high-quality (i.e. durable, low leakage and high breakdown field strength), high capacitance (i.e. thin and high permittivity) and reliable gate dielectrics that are consistent with cheap, basic manufacturing methods. As the technique of choice for cheap oxide formation, in this work anodisation has been proposed. However, to completely take the advantage of “flexible electronics” and realize “all plastic” mobile computing, necessary organic data storage has to be quickly developed and implemented. Therefore, the operation of OFET with ferroelectric gate dielectric was also investigated. Accordingly, this work presents the invention and optimization of high performance non-volatile single transistor memory device with extended, comparatively long retention times.
I
Additionally, to maintain high performance of p-channel OFETs, here, advances in contact engineering via electrochemical reactions (i.e. electroplating and electropolymerisation) compatible with cheap OFET manufacturing are described. Finally,
this
work
demonstrates
that
the
mobility
improvements
of
poly(crystalline) organic semiconductors, both low order and high order, are different in nature when compared to that of amorphous organic semiconductors. While amorphous semiconductors benefit from a modified surface if modification reduces the interface dielectric constant, partially or crystalline organic semiconductors benefit from a modified surface via a change in interface morphology. This does not exclude the possibility that the same interface modification may benefit both types of organic semiconductors.
Keywords: organic field-effect transistor, insulator, contact resistance, anodisation, electrodeposition, transport.
I
Acknowledgements The work presented in this thesis has been carried out at the Photonics Group of The Department of Physics and Astronomy, The University of Sheffield, from May 2002 to April 2005. During this time I am indebted to many people for friendliness, help, encouragement and support. First and foremost, I would like to thank my dear supervisor Martin Grell, who not only gave me an opportunity to study the fascinating field of carbon-based electronics, but also enlightening guidance, motivation and continuous support during my PhD study. I am very much grateful to Drs. Raoul Schroeder and MonikaVoigt for their help, fruitful and inspirational discussions, as well as, for our very successful co-operation and their company in the department and during many scientific meetings. I would like also to thank Prof. Mike L. Turner, Dr. Paul. A. Glarvey and Jonathan Maunoury from The Department of Chemistry, The University of Manchester, for fruitful discussions, help and valuable advice during our collaboration. I am very much indebted to Drs. Janos J. Veres and Simon Ogier from Avecia of Manchester (now a part of Merck UK) for sharing their great experiences in experimental physics, assistance and advice with experimental setup and interpretation of experimental results, as well as, their support and friendliness. I am also grateful to Chris Vickers and Peter Robinson for helping me with clean room and laboratory equipment, as well as, for their companion in the early mornings. Thanks go to Liam G. Conolly, Ali Adawi and Farhad A. Boroumand, who helped me with clean room and laboratory equipment in the early stages of my studies, as well as, for their companion, sense of humour and optimism during those years in the
II
department. Thanks also to all PhD students in the department, especially the residents of our shared office, for their companionship. And finally, I would like to thank my family, and express the deepest gratitude to my mother, who has supported my scientific interests from the very begining - during my MSc studies in Poland, as well as, during my PhD studies in Sheffield. I sincerely dedicate this PhD thesis to my parents, whom I respect and owe much more than words can describe.
Sheffield, April 2005 Leszek Artur Majewski
II
Table of contents
Abstract.............................................................................................................. Acknowledgements............................................................................................ Table of contents................................................................................................
I II III
Chapter 1 – Background................................................................................
1 2 8 14 19 21
1.1 Organic electronic materials...................................................................... 1.1.1 Charge injection and transport properties.............................................. 1.1.2 Charge carrier transport: Mobility......................................................... 1.1.3 Charge carrier transport: Traps.............................................................. 1.2 Thin-film transistor (TFT)......................................................................... 1.2.1 Geometry and operation principles of organic field-effect transistor (OFET)................................................................................................... 1.3 Organic electronic materials for OFETs................................................... 1.3.1 Semiconductors...................................................................................... 1.3.1.1 Pentacene......................................................................................... 1.3.1.2 Poly(3-hexylthiophene) (rr-P3HT).................................................. 1.3.1.3 NTCDI - C8H6F3.............................................................................. 1.3.1.4 Poly(triarylamine)s (PTAAs)........................................................... 1.3.2 Conductors............................................................................................. 1.3.3 Insulators................................................................................................ 1.4 Outline of this thesis.................................................................................... References...........................................................................................................
24 34 34 36 38 41 42 43 45 53 55
Chapter 2 – Alternative gate insulators for low voltage organic field-effect transistors................................................. 63 2.1 Low-voltage OFETs: insulator of minimum thickness............................ 64 2.1.1 Experimental.......................................................................................... 64 2.1.2 Results and discussion........................................................................... 67 2.2 Low-voltage OFETs: anodised Al2O3 and TiO2 as gate insulators......... 76 2.2.1 The process of anodisation..................................................................... 78 2.2.2 Anodisation of aluminium (Al).............................................................. 80 2.2.2.1 Anodisation of aluminium: barrier-type film formation.................. 82 2.2.3 Anodisation of titanium (Ti).................................................................. 84 2.2.4 Experimental.......................................................................................... 86 2.2.5 Results and discussion........................................................................... 88 2.2.5.1 Anodised Al2O3 as a gate insulator in OFETs................................. 91 2.2.5.2 Anodised TiO2 as a gate insulator in OFETs................................... 100
III
2.3 Low-voltage OFETs: high-ε nanoparticles............................................... 2.3.1 Experimental.......................................................................................... 2.3.2 Results and discussion........................................................................... 2.4 Low voltage n-channel OFETs: NTCDI on anodised, OTS-modified Al2O3.................................................................................... 2.4.1 Experimental.......................................................................................... 2.4.2 Results and discussion........................................................................... References...........................................................................................................
109
Chapter 3 – All organic permanent memory device...................................
134 135 146 146 148 154
3.1 Properties of ferroelectrics......................................................................... 3.2 Non-volatile single transistor memory device: FerrOFET...................... 3.2.1 Experimental.......................................................................................... 3.2.2 Results and discussion........................................................................... References...........................................................................................................
110 113 119 121 123 129
Chapter 4 – contact resistance in OFETs: modifications of contacts and charge injection improvements........................................ 4.1 Origin of contact resistance: injection barriers........................................ 4.2 Au on pentacene interface: doping with Iron-III Chloride (FeCl3)........ 4.2.1 Experimental.......................................................................................... 4.2.2 Results and discussion........................................................................... 4.3. Platinum electroplating.............................................................................. 4.3.1 Principles of electroplating.................................................................... 4.3.2 Experimental.......................................................................................... 4.3.3 Results and discussion........................................................................... 4.4 Electropolymerisation of PEDOT.............................................................. 4.4.1 Experimental.......................................................................................... 4.4.2 Results and discussion........................................................................... References...........................................................................................................
157 158 162 162 164 169 170 172 174 179 180 182 188
Chapter 5 – charge carrier transport in organic semiconductors……….
192
5.1 Investigations of charge carrier transport mechanisms in organic semiconductors……………………………………………………………….. 5.1.1 Experimental………………………………………………………….. 5.1.2 Results and discussion………………………………………………... References……………………………………………………………………...
195 196 199 210
Summary…………………….………………………………………………...
213
List of published papers……………………………………………………… List of symbols…...………………..……………………….……………….....
IV V
III
Chapter 1
Background The very high switching speed and integration density of monocrystalline silicon devices makes possible nowadays the development of high performance integrated circuits (IC) which are widely used in communication systems, personal computers, robots and portable devices. However, many electronic devices are still designed to interface the human being with electronic systems. Displays and identification systems like smart cards or radio frequency identification tags (RFIDs), intelligent post stamps and badges or wearable computers are typical examples of such applications, which are likely to gain more and more market share in the near future. For these kinds of products good mechanical properties, large area coverage and inexpensive manufacturing are much more desirable than high-speed performance or integration density. An answer to the demand of an extremely cheap, possibly slower and large area compatible electronics was the discovery of organic conjugated molecules - short and small molecular weight oligomers, as well as, long and high molecular weight polymers. The conductivity of these materials can be easily tuned through chemical manipulation giving materials ranging from conductors, through semiconductors to insulators, which are all the components of modern electronics. Additionally, organic molecules are relatively cheap to synthesise, lightweight and bendable. They can be processed at ambient conditions on plastic substrates using a variety of inexpensive deposition techniques that will further reduce the production costs of the organic devices or their integrated circuits well below the costs of silicon based ICs.
1
Remarkable progress in “carbon based” electronics, especially in the field of organic thin-film transistors (OTFTs) (or organic field-effect transistors, OFETs), has been achieved during the last two years. However, despite the huge progress in understanding what hinders the performance of OFETs, before the commercialisation and integration of these devices in cheap, disposable and mobile products, many problems have yet to be resolved. In the following chapters, methods to answer the problems of operational voltage, non-volatile single transistor memory devices, charge carrier injection and advances in understanding of transport mechanisms in organic semiconductors are all described. In this chapter, the characteristic properties of organic semiconductors, both small molecules and polymers, are explained and compared with their inorganic counterparts. The use of organic materials in field-effect transistors is discussed from the perspective of practical applications as well as for the fundamental insight in the transport properties. In the end, the outline of this thesis is presented.
1.1 Organic electronic materials Until the 1970s, the majority of polymers were classified and used as insulating materials [1]. However, in 1973 the discovery of the synthetic polymeric material, possessing inherently metallic conductivity, polythiazyl (SN)x, took place [2] and intense research on materials displaying similar properties was initiated [3]. Unfortunately, the efforts were not rewarded by success until 1975, when it was found that electrons could be added or subtracted via chemical doping from unsaturated polymers allowing the flow of current [4]. Subsequently, in 1977, Shirakawa et al.
2
Semiconductors
Synthetic metals
pentacene
*
S
S
S
n
polyacetylene (PA)
S
S
S
*
hexathiophene (6T) n
*
* n
*
poly(diacetylene) PDA
*
poly(para-phenylene vinylene) PPV S
*
n *
n
C8H17
*
O
N
N C8H17
*
O
S
poly(9, 9-dioctylfluorene-alt-
poly(3, 4-ethylenedioxythiophene) (PEDOT)
benzothiadiazole) F8BT
NH
N
N
S
NH
n
poly(3-hexylthiophene) (P3HT)
polyaniline (PAni)
Fig. 1.1.1. The chemical structure of some conjugated oligomers and polymers.
[5, 6] successfully demonstrated an increase of conductivity up to 103 S/cm on the example of the semiconducting trans-polyacetylene (CH)x upon doping the material with iodine. At the present time, doping is a standard procedure to control the electrical properties of organic conductors, although (SN)x has remained the only synthetic material showing intrinsically metallic conduction. However, since the revolutionary finding of Shirakawa et al. numerous other conducting and semiconducting (conjugated) organic materials have been synthesised - short, compact and low molecular weight oligomers, as well as, long, large and high molecular weight polymers (Fig. 1.1.1).
3
sp3
sp2
sp1
Fig. 1.1.2. Hybrid configurations of the carbon atom [8].
To understand the conjugation mechanism of these molecules a closer look at the properties of the carbon atom is necessary. The nucleus of the most common carbon isotope
12
C includes 6 neutrons and 6 protons. Using the standard chemical
nomenclature of the atomic orbitals, the electronic configuration for an isolated C can be written as 1s22s22p2 [7]. During interactions with other atoms, the orbitals of the second shell undergo mixing and a combination of the 2s with the 2pxyz orbitals takes place. This process is called hybridization. The hybridization gives new sp orbitals [8] (Fig. 1.1.2). If all three 2pxyz orbitals are involved in the hybridization, the new configuration is marked as sp3. In this case, only single bonds can be created
4
Fig. 1.1.3. sp3 hybridisation of orbitals and the structure of ethane (C2H6) [8].
Fig. 1.1.4. sp2 hybridisation of orbitals and the structure of ethylene (C2H4) [8].
5
Fig. 1.1.5. sp1 hybridisation of orbitals and the structure of acetylene (C2H2) [8].
and are formed by overlapping the sp3 orbitals along their axes of symmetry. The resulting molecular orbitals are the bonding orbitals σ, fully occupied by the sp3 electrons, and the anti-bonding orbitals σ*, which are empty. The energy separation between σ and σ* orbitals is often higher then the ionization potential thus most of the polymers in this configuration of carbon atoms are insulators. The sp2 and sp1 hybrids are formed when two or only one of the p orbitals mixes with the s orbital, respectively. As shown above, the sp2 and sp1 hybridizations allow the formation of double and triple bonds. The overlap of hybrid sp orbitals gives rise to σ and σ* bonds, while the pz orbitals can overlap keeping their axes parallel to each other and form π and π* bonds. Due to that orbital overlaps, π-electrons are delocalized within the molecule, whereas σ electrons are strongly bound and localized. The examples of these hybridizations are shown above (Fig. 1.1.3, Fig. 1.1.4 and Fig.1.1.5). The typical example of sp3 orbital hybridisation shows the structure of ethane, and sp2 the structure of ethylene, whereas sp1 can be represented by the structure of acetylene. 6
Conjugated organic molecules (oligomers and polymers) are characterized by alternation of single-double or single-triple bonds which gives rise to formation of a π-conjugated system. The π bonds, resulting from the combination of atomic orbitals, give molecular orbitals - the highest occupied molecular orbital (HOMO) and the lowest unoccupied molecular orbital (LUMO), which belong to the entire molecule. The energy gap Eg between HOMO and LUMO in organic conjugated molecules, due to limiting factors of effective conjugation length like conformational disorder or to the coherence length of π-systems, is normally between 1.4 and 4 eV. Peierls et al. [8], considering the existence of a one-dimensional metal, proposed an explanation for this phenomenon (i.e. the existence of Eg even in infinitely long polymers). They showed that a one-dimensional metal would be instable against a metalsemiconductor transition and atoms had to move closer to each other pair-wise, leaving a wider distance to the next pair, rather than remaining spaced equally (so-called Peierls distortion). Accordingly, in a long, carbon-based molecule, the σ and the π bonds have different lengths - the distance between two C atoms linked by a single bond is 1.54 Å whilst it is only 1.33 Å for the double bond. Hence, the periodicity of a polymer chain, e.g. polyacetylene (for the chemical structure see Fig. 1.1), changes from one to two CH repeat units and a gap opens which separates a fully occupied π orbitals from a completely empty π*. Therefore, similarly as in the inorganic materials, organic conjugated molecules, due to the existence of the band gap Eg ≤ 4 eV are classified as semiconductors. Consequently, the metallic properties in these materials have to be induced by chemical “doping” with a substance that is either highly redox active, or an acid/base. Figure 1.1.6 shows a chemical way to obtain highly conductive poly(3,4-ethylenedioxythiophene) (PEDOT) by the introduction of poly(styrene sulfonic acid) (PSS).
7
*
n
*
Na 2 S 2 O 8 O
O
SO 3 H
SO 3 H
SO 3 H
SO 3 -
SO 3 -
SO 3 H
H2O S
n O
O
SO 3 H
*
C O
S +
S S O
S O
O
O
O
O
O
S C + O
S
* n
O
Fig. 1.1.6. The synthesis of PEDOT from EDOT in aqueous medium in the presence of poly(styrene sulfonic acid) and Na2S2O8 [9].
In the chemical formulas shown in Fig. 1.1.1 and Fig.1.1.6, π-electrons are represented as double bonds and they are alternated with single bonds along the main chain of each molecule. Conjugated oligomers and polymers possess the ability to acquire high conductivity upon doping, therefore these materials can be investigated in various, completely different applications, e.g. as electrodes/contacts or active materials in electronic devices. Nowadays, the skilful control of their conductivity allows fabrication of “all-plastic” electronics, and in the near future, will establish completely new trends in the design and use of electronic devices.
1.1.1 Charge injection and transport properties From the practical point of view, charge injection from a metallic electrode into a semiconductor is a very important issue. When an electron is taken away from the HOMO or added to the LUMO of a molecule, molecular orbitals and the positions of nuclei will respond by a relaxation to a new position of minimum energy. Due to the
8
strong coupling between the charge carrier and the local lattice relaxation, removing an electron costs somewhat less in energy than the HOMO suggests, and an electron joining the molecule gains somewhat more energy than the LUMO suggests. Instead, the required energies are called the ionisation potential Ip, and electron affinity Ea, respectively. Typical transistors (OTFTs) require the injection of one type of carrier from an electrode and rather fast mobility of that carrier; light-emitting diodes (OLEDs) require the injection of carriers of both types from different electrodes and photovoltaic devices need to separate excitons and transport the resulting carriers to opposite electrodes (i.e. an additional organic layer has to be introduced and EExciton > ΔIp, ΔEa for OLEDs, whereas EExciton < ΔIp, ΔEa for photovoltaic devices, where ΔIp, ΔEa are the differences between ionisation potentials and electron affinities of both, hole and electron transporting, materials, respectively). The characteristics of carrier injection from a metal electrode into a semiconductor is controlled by the work function Φ of the metal relative to the Ip of the semiconductor for hole injection (p-type semiconductor) , and relative to the Ea of the semiconductor for electron injection (n-type semiconductor). Simplified energy level diagrams, as in Fig. 1.1.7 and Fig. 1.1.8, illustrate carrier injection into the semiconductor in an organic thin-film transistor (OTFT). Both figures show the positions of the HOMO and LUMO of a p-type (left panel), and an n-type (right panel) organic semiconductor relative to the work functions of the two electrodes source and drain. In the ideal case, the work function of the source contact matches the Ip or Ea of the p-, n-type organic semiconductor, respectively. There is then no injection barrier for charge carriers, and if there is an applied drain bias, the injected charges can be relatively easily collected at the drain contact. The collection of charge
9
Energy Fig. 1.1.7. Energy level diagrams of an organic semiconductor and work functions of ideal
Energy
source and drain electrodes. Note that in transistors there is no injection from the drain (see text).
Fig. 1.1.8. Energy level diagrams of an organic semiconductor and work functions of real source and drain electrodes. Note that in transistors there is no injection from the drain (see text).
carriers at the drain contact is easier than injection at the source contact (i.e. essentially, the collection of charge carriers at drain contact is the injection of charge carriers from semiconductor into drain contact) and even materials with significantly lower work functions (e.g. Al) than semiconductor orbitals can be used. Nevertheless, usually both contacts are made of the same metal unless an organic light-emitting
10
field-effect transistor (OLEFET) is considered [10, 11]. However, in real structures (Fig. 1.1.8) there are often injection barriers due to mismatches between electrode work functions and the semiconductor orbitals. To minimise barriers for injection of holes (h+), high work-function metallic contacts are required (e.g. Au, PAni, PEDOT, Pt), whereas for injection of electrons (e-) low work-function metals are necessary (e.g. Ca, Mg). In the case shown in Fig. 1.1.8, there would be a relatively larger barrier for effective hole injection from Al than from Au into a p-type semiconductor. On the contrary, in the case of an n-type material electrons can be very efficiently injected from Ca, whereas the injection from Au or Al would be severely limited. In the case of a work function that is matched to the respective semiconductor level (ΔV → 0) current density will be controlled by carrier transport across the film, rather than by injection, and the metal-semiconductor contact is termed ohmic. Practically, a contact can be considered ohmic whenever carrier transport is a more restrictive limit on current density than carrier injection. Generally, ohmic contacts are highly desirable. When the injection barrier ΔV > 0.5 eV, the current density in a device will be controlled rather by the injection of carriers across the barrier (injection limited current) than by the transport of carriers across a device (bulk limited or space charge limited current, SCLC) [12]. However, the exact value of ΔV for a given material is determined by many diverse factors (cf. Chapter 4). The problem of injection barriers in organic devices was addressed by Bässler et al. [13]. In general, to avoid fabrication of contact-limited devices, ΔV should lessen (i.e. ΔV → 0) with increasing mobility. Nevertheless, carriers can overcome injection barriers by tunnelling or by thermionic injection.
11
The tunnelling current density j vs. applied voltage characteristic j(VBias) is described by the Fowler-Nordheim equation (F-N tunnelling):
jF − N =
C ΔV
2
⎡ dΔV 3 / 2 ⎤ ⎛ VBias ⎞ exp − B ⎜ ⎟ ⎢ ⎥ VBias ⎦ ⎝ d ⎠ ⎣
(eq. 1.1.1),
where B = 8π√(2m*)/(2.96eh). jF-N depends on applied voltage VBias and film thickness d only in the combination VBias/d, i.e. jF-N scales with the applied field E. Thermionic injection is described by the Richardson-Schottky equation (R-S injection):
jR − S = AT 2 exp[− (ΔV − Vm ( E ) / kT )]
(eq. 1.1.2),
with A = 4πemkb2/h3, and Vm(E) = √(eE/4πεε0) describing the field-dependent lowering of the injection barrier by the attraction of the injected carrier to its mirror charge. From the practical point of view, in organic devices, relatively large fields are present (E > 1 MV/m) and the injection will be governed by F-N tunnelling, whereas R-S injection, dominating at low fields (E < 1 MV/m), will not play any important role in the process [12, 13]. The presence of injection barriers in organic transistors was confirmed when Bürgi et al. [14] directly mapped the lateral potential distribution in the channels of working transistors. They found that a substantial part of the externally applied drain voltage might drop across the metal-semiconductor contact, rather than the transistor channel. The injection barriers can exist even when the work function of source electrode exactly equals or slightly mismatches the respective transport level of organic
12
semiconductors. The barriers arise as a consequence of a different morphology of organic semiconductors at the contacts [15, 16], quality of the contacts [17] and lowering of the effective work function of contacts due to formation of interfacial dipole [18]. Therefore, extensive efforts have been devoted to find a way to improve contacts in organic devices. Recently, ITO in OLEDs is routinely coated by a thin layer of PEDOT/PSS [19, 20]. More recently, doping of contacts [21], electropolymerisation of PEDOT [22] and electroplating of Pt on low work function metals [23] in OTFTs have been explored. Chapter 4 contains more details in the matter of the successful OTFT-contacts improvements. Nevertheless, low work-function materials such as Ca or Mg are still commonly used for effective electron injection. These require protection from ambient atmosphere, otherwise, they would rapidly degrade. This can be provided by encapsulation, or by capping with a more stable metal such as Al.
13
1.1.2 Charge carrier transport: Mobility
After injection, charge carriers in a semiconductor will on average move in the direction of the applied field. Significantly simplifying the problem, the directed motion of charge carriers under an applied field can be considered in a fashion similar to the motion of a solid sphere in a viscous medium under the influence of a constant force (e.g. gravity). The sphere (or the carrier) will rapidly accelerate up to a steadystate velocity ν, at which the friction exerted by the viscous medium balances the constant force. This velocity is given by:
ν = μE
(eq. 1.1.3),
wherein E is the electrical field E = VBias/d, and µ the charge carrier mobility in cm2/Vs. There can be two types of motion, namely, coherent (band-like) motion that is described by a wavevector k and incoherent (hopping-type) motion. The band-like transport describes very well the extremely high electron and hole mobility in inorganic covalently bound semiconductors, while the hopping-type transport explains relatively low mobility in disordered materials with localised excitations, such as organic semiconductors. In a classical paper, Anderson et al. [24] have shown that disorder in a solid may result in a localization of the states and the charge transport will occur via tunnelling (hopping) between localized states. In Fig. 1.1.9, the states between EV and EC are localized states. In the case of the localized states, the tunnelling (hopping) of carriers from one site to the next is assisted by phonons and mobility is thermally activated (increases with rising temperature). Interestingly, phonon-activated hopping can also occur in well-ordered crystals, where strong
electron-phonon interaction results in the formation of self-localized states
14
(a)
Energy, E [eV]
Band gap, Eg [eV]
(b)
Fig. 1.1.9. (a) Density-of-states diagram of a disordered semiconductor, (b) Schematic of hopping-type transport mechanism [25].
15
called polarons. In contrast to inorganic semiconductors, the additional injected charge in organic semiconductors does not “jump” to the conduction band. Due to the weaker intermolecular bonds, the charge-lattice interaction is larger and the monomer chain accommodates the induced charge within the electronic energy gap by adjusting the elastic energy. The deformation of the lattice around the electron or hole (a polaron) is similar to charge with a phonon cloud around it. Therefore, a polaron results from the deformation of the conjugated chain under the action of charge (Fig. 1.1.10).
S
S
S
S
S
S
S
S
S
Hole injection (oxidation) S
S S
S
S
S S
S
S
Fig. 1.1.10. A polythiophene segment and the derived polaron (change in the chemical structure) [26].
CB
VB
Fig. 1.1.11. Energy band diagrams for polarons (P) and bipolarons (B) [27].
16
The addition of more charges to polymer causes accumulation of charges and subsequent creation of other polarons. When the density of charges is high enough, two polarons can exist in close vicinity and an energetically more favourable charge-lattice interaction (bipolaron) is created. A schematic of the energy band diagrams for polarons and bipolarons are depicted in Fig. 1.1.11. The charged polarons (P-, P+) have charge ± 1 and spin ½, like the free electron. The bipolarons (B2-, B2+) are characterised by twice the charge and spin 0.
The “default” model for a thermally activated process is the Holstein model, which predicts a linear (Arrhenius) relationship of ln(µ) with 1/T [28]. Holstein assumed that transport of charge carriers in organic materials is caused by small polaron hopping in a one-dimensional crystal with an excess of one electron. The mobility of the charge carriers is described by the Arrhenius equation:
Eb ⎞ ⎟⎟ ⎝ 2k B T ⎠ ⎛
μ ∝ μ 0 exp⎜⎜ −
(eq. 1.1.4),
where T is temperature, kB is the Boltzmann constant, µ0 is the mobility for T → ∞ , and EA = Eb/2 is the activation energy, with Eb the polaron binding energy. An alternative model has been devised by Bässler specifically for disordered organic semiconductors [29]. In his model, he assumes that HOMO (LUMO) levels are not equal in energy, but display a Gaussian distribution around the average HOMO (LUMO). This energetic distribution is termed diagonal disorder and is ˆ = σ / k B T . Hopping rate is also characterized by variance σ2, or the dimensionless σ
affected by positional or off-diagonal disorder that is quantified by another variance, Σ2 .
17
Bässler arrives at the following equation:
[( [(
)
]
⎡ ⎛ 2σˆ ⎞ 2 ⎤ ⎧⎪exp σˆ 2 − Σ 2 E , Σ < 1.5 ⎟ ⎥⎨ 2 ⎢⎣ ⎝ 3 ⎠ ⎥⎦ ⎪⎩ exp σˆ − 2.25 E , Σ ≥ 1.5
μ ( E , T ) = μ 0 exp ⎢− ⎜
)
]
(eq. 1.1.5).
Bässler’s model predicts a linear relationship between ln(µ) and 1/T2 with the slope ⎛2 σ ⎞ ⎟⎟ − ⎜⎜ ⎝ 3 kB ⎠
2
, wherein σ is the standard deviation of the assumed Gaussian distribution
of transport states (level of energetic disorder), and µ0 with the same meaning as in the Arrhenius model. It is worth noting that in the Bässler model (eq. 1.1.5) the mobility µ depends on E. The effect becomes measurable at high fields exceeding 104 V/cm. The problem of the field-dependent mobility was resolved numerically [30] assuming a Poole-Frenkel (P-F) type dependency of µ on E:
(
μ ( E ) = μ0 exp β E
)
(eq. 1.1.6).
P-F model assumes that the Coulomb potential near a charged localized level is modified by the applied field in such a way that the transfer rate between sites increases. In Bässler’s model, Σ (level of positional disorder) accounts for the local variation of the intersite distance, which takes place in a disordered medium. Thus, the Poole-Frenkel equation is equivalent to the Bässler model of µ(E) if one assumes constant temperature, and chooses β appropriately. In addition, there are a number of further models to account for the effects of trapping [31], bipolaron generation [32] and variable range hopping [33, 34]. Empirically, it is sometimes found that both the Bässler and Holstein models fit µ(T) data well for T in the range room temperature (RT) to RT-100 K [33, 34].
18
The carrier mobility µ is one of the most important characteristics of an organic semiconductor and can span a wide range of orders of magnitude, around (10-7 to 1) cm2/Vs within the regime of hopping-type transport [35]. Considerably higher mobilities > 10 cm2/Vs, or more, can be observed for coherent motion in organic single crystals [36]. However, applications based on organic single crystals are not the subject of this work and are not described in detail.
1.1.3 Charge carrier transport: Traps
Even when carrier injection is ohmic, still in many cases significant deviations from the expected shape of transistor I(V) curves (i.e. low output currents, hysteresis or shifted characteristics) are observed. This is caused by the presence of traps that are very common in real semiconductors. A trap is defined as a site with an ionisation potential lower than the ionisation potential of the bulk material (hole trap), or with electron affinity higher than that of the bulk material (electron trap) (Fig. 1.1.9). The fact that most real organic semiconductors transport only one type of carriers (holes or electrons) is thought to be the result of charge-carrier specific deep traps. However, even for the carrier type that is transported, there will be traps. In a trap, a carrier is immobilised and will screen the externally applied field EExt (i.e. a carrier will contribute to a space charge). This leads to a reduction of EExt (i.e. the local field ELoc < EExt = VBias/d) [29, 30]. In organic transistors, traps reduce the effective field-effect mobility of charge carriers (e.g. decrease output currents) and cause unfavourable increase of all transistor parameters, which control the operational voltage of these devices.
19
In thin films of organic semiconductors the amount of traps is increased via formation of grains (as in the case of vacuum deposited oligomers), or defects in the semiconductor itself (as in the case of solution-processed polymers). Generally, the reduction of traps in thin films of organic semiconductors is rather challenging, and waits to be fully resolved. Summarizing, charge transport is relatively easy within a molecule, but due to the disordered molecular structure of most organic semiconductors, charge transport between molecules is much more difficult. The more ordered is the intermolecular structure, the easier will be the hopping between molecules. This means that mobility will be better in semiconductors that have well organised molecular structure. Apart from liquid crystals, organic semiconductors have rather poor selforganising properties, due to their weak London or van der Waals intermolecular bonds. The final structure that they assume is then strongly dependent on the method used to deposit the semiconductor film. Although self-assembly is one of the typical properties of organic molecules, the inexpensive methods like processing from solution yield rather “poorly ordered” films, while well-organized and even monocrystalline films can be obtained by deposition in high vacuum, or with other expensive techniques. A more precise analysis of the relationship between morphology and charge transport can be obtained by considering the characteristics of a thin-film transistor based on organic semiconductors (OTFTs). As a matter of fact, the mode of OTFT operation involves only charge injection and transport. The two processes can be clearly distinguished and analyzed separately. It gives an opportunity to understand much easier and better the electrical properties of organic semiconductors.
20
1.2 Thin-film transistor (TFT) The principle of the thin-film transistor (TFT) used in logic circuits, displays or memory devices, was first proposed by Lilienfeld in 1930 [37], but not used in a practical application until 1960 when Weimer et al. started making TFTs on glass substrates [38]. In the early devices gold source and drain contacts were deposited first, then a semiconductor, and finally on the top, a gate electrode. However, proper transistor characteristics could not be obtained until they placed an insulator between the semiconductor and gate electrode (Fig. 1.2.1). Since then, TFTs have continued to improve and subsequently have proven their adaptability with low performance materials, particularly in the case of hydrogenated amorphous silicon (a-Si:H), and at the present time they are the most important part of almost every complicated and advanced flat panel displays.
Fig. 1.2.1. Top-gate TFT investigated by Weimer et al. [38].
In the late seventies, the discovery of conjugated polymers took place and the TFT structure appeared as a perfect tool to test the properties of those materials. Nowadays,
TFTs
based
on
organic
semiconductors
are
referred
to
as
organic field-effect transistors (OFETs). The first operational OFET based on
polyacetylene was shown in 1983 [39]. However, the early device displayed extremely poor performance. Only the fabrication of well working polythiophene 21
transistors four years later, with much improved performance, started to arouse the real interest in organic semiconductors as active layers in OFETs [40, 41]. Since then, much research in the development of new, high-performance organic materials has been done (Fig. 1.2.2a). However, still the majority of organic semiconductors display rather p-type (hole transporting) than n-type (electron transporting) behaviour. The tremendous work on understanding what hinders the performance of OFETs was also undertaken. The role of the insulator roughness/smoothness, the influence of the insulator dielectric constant ε and the effect of film morphology on mobility, as well as, the quality of the contacts has been explained. These efforts have enhanced the operation of organic devices and some OFETs can now compete with TFTs using amorphous silicon as the active layer (a-Si:H TFTs) (Fig. 1.2.2b). The research on OFETs is still continuing, and the improvements made until now promise a quick appearance of cheap, flexible and disposable “plastic electronics”.
22
(a)
(b)
Fig. 1.2.2. (a) Semilogarithmic plot of the field-effect mobilities reported for OFETs versus year for different organic p- and n-type semiconductors [35], (b) Semilogarithmic plot of the highest field-effect mobilities reported for pentacene and end-substituted dihexylhexathiophene (α, ω-DH6T) compared to inorganic silicon-based TFTs [42].
23
1.2.1 Geometry and operation principles of OFETs
The cross sections of top-contact and bottom-contact transistor geometries that are most commonly used for OFETs are shown in Fig. 1.2.3.
a) Top contacts
b) Bottom contacts
Fig. 1.2.3, schematic of top- (a) and bottom- (b) contacts OFET.
In both cases, an organic semiconductor layer is deposited on a gate/insulator substrate and is contacted with metallic source and drain electrodes. In the top-contact case, the organic film is deposited first and subsequently, the contacts are formed on the top of the active layer. In the bottom-contact case, this deposition sequence is reversed. Commonly, for the gate/insulator assembly a metal or highly doped semiconductor coated with an insulating oxide are used. Alternatively, polymeric insulators can be employed and might ultimately be preferable for flexible electronics. Routinely, prior to semiconductor deposition, dielectric layers are often a subject of various surface treatments. It has been shown that these modifications have profound effect on the resulting thin film morphology and electrical characteristics [42]. The organic semiconductor film can be deposited from the vapour phase or coated from solution. The metallic source and drain contacts are usually formed by 24
evaporation of the desired metal through a shadow mask, they can be patterned using photolithography or other techniques but solution-processed conductive polymers as electrodes have also been demonstrated [43-45]. Sometimes the devices might be covered with a protective layer to prevent degradation of the active layer due to the interaction with ambient oxygen and moisture. Basically, a FET operates as a capacitor - one plate is a conducting channel between, ideally, two ohmic contacts, the source and drain electrodes. The density of charge carriers in the channel is modulated by the voltage applied to the second plate of the capacitor, the gate electrode (Fig. 1.2.4).
a) carrier concentration
linear regime
b)
“pinch-off”
saturation regime
c)
Fig. 1.2.4. Principle of operation of an organic field-effect transistor (OFET) [46]. (a) Carrier concentration profile of an OFET in the linear regime, (b) “Pinch-off” occurs when |VD|
≈ |VG - VT|, (c) Carrier concentration profile of an OFET in the saturation regime.
25
Typically, to describe the performance of an OFET two common measurements are performed, namely, output and transfer characteristics. Output characteristics are obtained by sweeping the source-drain voltage (VSD) from zero to a given voltage at a number of constant gate voltage biases (VG), whereas transfer characteristics are obtained by ramping VG at a constant VSD, usually once for VSD much lower than VG, Max,
and once for VSD ≥ VG, Max. During the scans the current flowing between source
and drain electrodes (ISD) is recorded. In some cases, an additional measurement, where VG = VSD, can be performed. In this mode the leakage current (ILeak) through gate insulator is minimized (i.e. ISD is usually measured at the drain and ILeak at the gate, hence, only the source-to-gate leakage current is measured) and measurements of ISD are not affected by this undesirable effect. It is worth mentioning that transfer characteristics give more information about transistor performance than output characteristics and the VG = VSD scans. However, output characteristics can better show injection problems (e.g. curvature in the low VSD region), which are often inconspicuous in transfer characteristics, and VG = VSD sweeps give more precise values of threshold voltage VT. When the gate electrode is biased negatively with respect to the grounded source electrode (for a p-type semiconductor), FET operates in the accumulation mode and the accumulated charges are holes. At low |VSD| |VT| 2 ⎦ L ⎣
(eq. 1.2.1),
where L is the channel length, W is the channel width, Ci is the capacitance per unit
26
area of the insulating layer, VT is the threshold voltage, and μ is the field-effect mobility. Figure 1.2.5 shows a typical set of ISD curves for different VG (output characteristics) for a pentacene-OFET. The black arrows show the direction of VSD ramping. Such a scan of OFET characteristics gives rough information about trapping, either at the insulator/semiconductor interface or in the bulk of the semiconductor. In the case of excessive trapping, the I(V) curves display hysteresis, while in the case of defect-free materials and interfaces, there are no detectable changes in the ISD current. In the linear regime, two useful parameters are the channel conductance gd and the transconductance gm given by the following equations [46, 47]:
⎛ ∂I g d = ⎜⎜ SD ⎝ ∂VSD
⎞ WC i ⎟⎟ = μ (VG − VT ) L ⎠VG =const
(eq. 1.2.2),
⎛ ∂I g m = ⎜⎜ SD ⎝ ∂VG
⎞ WC i ⎟⎟ = μVSD L ⎠VD =const
(eq. 1.2.3).
and
Thus, in the linear regime, µ can be directly calculated from the transconductance by plotting ISD versus VG at constant low VSD and equating the value of the slope of this plot to gm. For |VSD| ≥ |VG - VT| (Fig. 1.2.4b/c), ID tends to saturate (the saturation regime) due to the “pinch-off” of the accumulation layer (Fig. 1.2.4) and is modelled by the equation [46, 47]:
I SD ,Sat =
mWCi μ (VG − VT )2 , |VG| > |VT| L
(eq. 1.2.4),
where m is a function of doping and approaches ½ at low doping levels.
27
-200
saturation regime
-180
Source-Drain Current, ISD [µA]
- 45 V -160
-140
- 40 V
-120
linear regime -100
-80
- 35 V
-60
- 30 V
-40
- 25 V
-20
- 20 V - 15 V
0 0
-5
-10
-15
-20
-25
-30
-35
-40
-45
Source-Drain Voltage, VSD [V]
Fig. 1.2.5. Output characteristics of a pentacene-OFET.
In the saturation regime, the transconductance is given by the relationship [46, 47]: gm =
2mWCi μ (VG − VT ) L
(eq. 1.2.5).
However, mobility in the saturation regime (μsat) is usually deduced from the slope of the plot of |ISD|1/2 versus VG, either indirectly from the transfer characteristics (Fig. 1.2.6) or from the plot |ISD|1/2 versus (VG = VSD) (Fig. 1.2.7) of the investigated device. Both graphs can also be used to extract VT, although the graph |ISD|1/2 versus (VG = VSD) gives more precise values. It is worth mentioning that OFETs operating only in the depletion mode, similarly to metal-semiconductor FETs (MESFETs), where the “pinch-off” voltage is equal to the threshold voltage of the accumulation mode, have been also presented [48, 49].
28
1x10-3
linear regime 1x10-4
Source-Drain Current, ISD [nA]
saturation regime 1x10-5
VT - threshold voltage
1x10-6
1x10-7
subthreshold -8
1x10
-9
1x10
V0 - onset voltage
VSD = - 30 V
1x10-10 -50
-40
-30
-10
-20
10
0
Gate Voltage, VG [V]
20
Fig. 1.2.6. Transfer characteristics in the saturation regime of the same device shown in Fig. 1.2.5.
500
450
400
|ISD|1/2 [(nA)1/2]
350
300
250
200
150
VT - threshold voltage
100
50
0 0
5
10
15
20
25
30
35
VG = VSD [V]
40
45
50
Fig. 1.2.7. |ISD|1/2 versus VG = VSD.
29
In this case, the bulk carrier density of holes is replaced by the dopant concentration [50]. However, in this study, OFETs working solely in the accumulation (enhancement) mode (i.e. normally-“off”) have been fabricated and the operation of the depletion mode devices is not described in detail. The
most
important
parameters
in
characterizing
a
FET
are
its
field-effect mobility µ, threshold voltage VT, “on/off” ratio and inverse subthreshold slope (subthreshold swing) S. Field-effect mobility quantifies the average charge carrier drift velocity per unit electric field and is typically reported in cm2/Vs , whereas threshold voltage is a minimum gate voltage to induce mobile charges at the insulator/semiconductor interface (i.e. gate voltage at which the conducting channel starts to form) and is determined by the amount of traps introduced by interfacial disorder (caused, for example, by fixed charges, surface structural defects and dangling bonds) and the defects in the bulk of the semiconductor. VT is also often affected by the quality of source/drain contacts. Intriguingly, since most OFETs operate only in accumulation mode, VT should be in principle zero. The problem of threshold voltage in OFETs has been addressed by Horowitz et al. [51]. The presence of VT in organic transistors is explained via introduction of thermal charge in the bulk of the semiconductor, which contributes to a finite VT, and can be expressed as [52]:
VT =
qn0 d s Ci
(eq. 1.2.6),
where, q is the elemental charge, n0 the density of majority carriers, ds the thickness of the semiconductor film and Ci capacitance per unit area of the dielectric. The difficulty with the description of a threshold voltage in disordered organic transistors has led to the definition of switch-on voltage or onset voltage (V0). 30
V0 is characterized as the gate voltage at which there is no band bending in the semiconductor (i.e. the flat band condition is obtained). Below V0, the variation of the channel current with VG is zero, while the channel current increases with VG above V0. For an unintentionally doped semiconductor layer, V0 is then only determined by fixed charges in the insulator layer or at the semiconductor/insulator interface. Without the fixed charges, V0 should be in principle zero [53]. In addition to µ and VT, “on/off” ratio is defined as the source-drain current ratio (ION/IOFF) between the “on” and “off” states and it is usually given as 10X while subthreshold swing S is a measure of how rapidly the device switches from the “off” to the “on” state and is commonly reported in V/decade. The “off” state of a transistor (working in accumulation mode) is when no voltage is applied between the gate and source electrodes (VG = 0). ISD is usually very low in the “off” state as long as the semiconducting material is not highly doped (ISD ≈ 0). When the voltage is applied to the gate, charges can be induced into the semiconducting layer, analogous to charging a capacitor. As a result, the source-drain current increases due to the increased number of charge carriers, and this is called the “on” state of a transistor. The “on/off” ratio can be estimated using the following equations [46]:
I ON μ CiVSD =1+ I OFF σ 2d s
(eq. 1.2.7), at high doping levels,
I ON μ Ci2VSD2 = I OFF σ qN a d s2
(eq. 1.2.8), at low doping levels,
and
where µ is mobility and σ conductivity, Ci and VSD have meanings described earlier, ds is the semiconductor thickness, and Na the total concentration of doping centres.
31
Clearly, the “on/off” ratio is not solely dependent on the ratio of mobility to conductivity. It can also be enhanced by using an insulator with high capacitance per unit area, and also by lowering the thickness and doping of the semiconductor layer. The highest reported values of “on/off” ratios, so far, are reached by pentaceneOFETs and exceed 106. Looking at the transfer characteristics of an OFET (Fig. 1.2.6), S can be found from the region of the exponential current increase (i.e. region above V0, but below VT) of an investigated OFET, where the equations 1.2.1 and 1.2.4 do not describe any longer the behaviour of ISD, but ISD is instead modelled by the following relationship [54]: ⎛ q ( VG − VT I SD ~ exp⎜⎜ ⎝ k BT
⎞ ) ⎟⎟ , |VG| < |VT| ⎠
(eq. 1.2.9).
In this region, S is given by [54]:
S=
dVG d (log I SD )
(eq. 1.2.10).
Practically, since transfer characteristics show log(ISD) vs. VG, S is found from a fit of a line in the region between V0 and VT (Fig. 1.2.6). Furthermore, the subthreshold swing of an OFET can be found via [54]:
S=
k BT ln 10 q
(eq. 1.2.11).
In the last equation, T is the temperature, kB is Boltzmann’s constant, and q is the elementary charge.
32
At room temperature (T = 293.2º K) S equals:
S=
k BT ln 10 ≈ 58.17(T / 300) ≈ 57 mV/dec q
(eq. 1.2.12).
Thus, 57 mV/dec is the lowest theoretical limit for S at room temperature. Only the best monocrystalline silicon devices are able to hold 60 mV/dec [55]. Nanotubetransistors exhibit S < 70 mV/dec [56], whereas TFTs based on a-Si:H usually have S in the region of ~ 300 - 400 mV/dec [57, 58]. All the abovementioned “figures-of-merit” (µ, VT, “on/off” ratio and S) can be directly extracted from the plot of ISD versus VG at a constant VSD shown in Fig. 1.2.6 (transfer characteristics). For p-channel transistors, holes are the major charge carriers while electrons are the major charge carriers for n-channel transistor. When the gate electrode is biased positively, a p-channel FET operates in depletion mode and the channel region is depleted of carriers. There is a very low source-drain current and transistor remains “off”. All considerations for p-channel OFETs are valid for n-channel OFETs, but the gate electrode has to be biased positively with respect to grounded source electrode (accumulation mode) and the accumulated charge carriers are electrons. When the gate electrode is biased negatively, an n-channel OFET operates in the depletion mode and is in its “off” state.
33
1.3 Organic electronic materials for OFETs For active organic electronic devices, materials ranging from conductors (electrodes), semiconductors, to insulators (dielectric materials) are needed. The subsequent sections describe the most common materials used to fabricate an OFET.
1.3.1 Semiconductors
In an organic transistor, the active layer is comprised of a thin film of highly conjugated small molecules or polymers. The most investigated p- and n-type organic semiconducting materials in OFETs are shown in Fig. 1.3.1.
Fig. 1.3.1. Prominent p- and n-type organic semiconductor materials [59].
34
The limitations of current organic technologies are clearly posed by the performance and processability of the active layer. Particular attention is paid to the design of materials that will meet the performance demands of the OFET (high mobility and “on/off” ratio, small VT and S). In addition to meeting benchmarks for performance criteria, active layer materials should ideally be processed from solution using extremely cheap techniques (e.g. spin- or drop-casting, electropolymerisation, printing, Langmuir-Blodgett) and have long-term stability for device longevity. This has proved to be a fairly difficult balance to achieve. The organic semiconductors possessing the best OFET characteristics to date are the small molecules - pentacene (p-type, [60]) and NTCDI derivatives (n-type, [61]). However, these materials are insoluble, and therefore the processing methods are relatively difficult and expensive. The efforts to minimize the costs of deposition and to facilitate the processing have led to the modification of the materials by the incorporation of side chains (e.g. integration of alkyl chains to thiophene rings). These alterations have made the materials soluble in a variety of organic solvents. Among polymers, OFETs using solution-processable poly(3-hexylthiophene) (p-type, [62]) and DFH-nT (n-type, [63]) are reported to exhibit the best performance so far. Unfortunately, it has been shown [64] that the type, length and position of substituents, molecular weight (Mw), as well as, the nature of the chosen solvents [65] and processing conditions [66] have strong influence on the packing structure of the organic films. This is reflected in the differences in morphology of the organic layers, which strongly affect the electronic properties (i.e. charge transport) in OFETs [67]. The extensive efforts to optimize the size, type and regioregularity of the side groups, as well as, the processing and the deposition techniques of organic semiconductors are still carried on with the promise for a high-performance,
35
solution-processed, air-stable materials. The next few sections of the chapter will be dedicated only to the organic semiconductors used in this study, namely, pentacene, 1,4,5,8-napthalenetetra-carboxylic
diimide
(NTCDI),
poly(3-hexylthiophene)
(rr-P3HT)
and
poly(triarylamine) (PTAA).
1.3.1.1 Pentacene
Pentacene belongs to the family of the acenes. It is formed by five aligned condensed benzene rings (Fig. 1.3.2.) and due to small molecular mass and dimensions is classified as an oligomer.
Fig. 1.3.2. Molecular structure of pentacene [60].
Pentacene is a small molecule not soluble in organic solvents, and therefore is relatively difficult to be processed. Although there were some attempts to find a precursor route for pentacene [68], the best thin films of the material are usually obtained by evaporation, organic vapour phase deposition (OVPD) or molecular beam deposition (MBD) under vacuum [69, 70, 71]. Commonly, the vacuum-deposited films are polycrystalline and, depending on the deposition conditions, can display three different phases, i.e. amorphous phase, a single phase and a double phase (Fig. 1.3.3) [72]. The double, and also partially the single phase are characterised by
36
Fig. 1.3.3. Comparison of X-ray diffraction patterns, schematic representation of structural order, and field-effect mobilities for three different phases of thin-film pentacene on Si/SiO2 substrate [72].
a very high level of ordering whereas the amorphous phase is much more disordered. Pentacene transistors exhibit the highest hole-mobilities reported in OFETs ever [73], suggesting the reduced level of traps for holes in the evaporated films. The high “on/off” ratios, as well as, exceptionally low VT and S in these transistors confirm an excellent intermolecular order (morphology). It is worth noting that the hole-mobility of the best pentacene polycrystalline layers, due to the optimized deposition conditions (i.e. purification of the material, heating of the substrate (Fig. 1.3.3), insulator treatments, etc.), is practically identical to that of a single crystal (µ ≈ 8 cm2/Vs) [74]. Routinely, following introduction of a variety of insulator treatments, mobilities in excess of 1 cm2/Vs are obtained. Recently, pentacene has been reported [75] as a material showing ambipolar properties (being able to transport electrons and holes). However, the mobility of the two types of charge carriers differs by many orders of magnitude [76]. The best n-channel pentacene-OFETs show the mobilities ≈ 3x10-5 cm2/Vs [77] suggesting
37
an enormous amount of traps for electrons. More recently, increased electron mobility in pentacene has been reported [78]. The much higher electron mobility, up to 0.12 cm2/Vs, has been obtained by evaporating the material on an ultra-thin Ca layer (essentially Ca was used to dope the semiconductor). Doping usually affects “on/off” ratio in OFETs [79] (i.e. “on/off” ratio is strongly reduced), unfortunately, the authors of the aforementioned article (i.e. [78]) do not discuss this problem in their publication. Nevertheless, the promising achievement obtained with pentacene has fostered the search for other fused ring molecules with interesting charge transport properties. Among them, the derivatives of thiophene are the most promising p-type materials.
1.3.1.2 Regioregular poly(3-hexylthiophene) (rr-P3HT)
A conjugated polymer, which shows the highest mobility and the best electrical properties among all p-type polymers, thanks to good solid state ordering, is regioregular poly(3-hexylthiophene) (Fig. 1.3.5). Regioregular means that each 3-hexylthiophene in the polymer chain has the side chains oriented head-to-tail only (Fig. 1.3.6).
Fig. 1.3.5. Molecular structure of poly(3-hexylthiophene) [82].
38
R
R
S
S
S
S
R
R H-T
H-H
Fig. 1.3.6. Regioisomers in alkylthiophenes (H-H: head-to-head, H-T: head-to-tail) [82].
Regioregular
P3HT
is
much
better
ordered
than
their
regiorandom
counterpartners. When cast from solution, highly regioregular P3HT self-orients into a well-ordered lamellar structure with an edge-on orientation of the thiophene rings relative to the substrate (Fig. 1.3.7). This is in contrast to solution-cast films of regiorandom P3HT, which are totally amorphous [83]. Due to the better overlap of π-orbitals (π-π stacking direction in the plane of the substrate) the highly ordered, solution cast rr-P3HT films display a very high mobility, up to 10-1 cm2/Vs in OFETs.
(a)
(b)
Fig. 1.3.7. Two different orientations of ordered P3HT domains with respect to Si/SiO2 OFET substrate: (a) Regioregularity of 91% and (b) Regioregularity of 81%, [84].
Unfortunately, rr-P3HT is very sensitive to oxygen [85], moisture [86] and light [87]. OFETs made with this polymer degrade very quickly when operated in air and 39
under illumination, therefore, the best devices are fabricated and tested in an inert, dry nitrogen atmosphere (e.g. nitrogen glove box) and in the dark. If processed under ambient conditions rr-P3HT is very quickly doped by oxygen, which increases conductivity of the material and the performance of the devices is lost [88]. However, the well-known effect of oxygen doping is reversible and keeping the transistors under high, dynamic vacuum recovers the OFET characteristics. The effects of oxygen doping, influence of moisture and light sensitivity, in the whole family of polythiophenes, have been well documented. In many cases, to increase the level of ordering the rr-P3HT films and improve the overall transistor performance, the films are the subject of post-fabrication steps like annealing or rubbing [89, 90]. Very recently, L.-L. Chua et al. [91] have shown that rr-P3HT can be also successfully used as active material in n-channel OFETs. Electron mobilities as high as 6x10-4 cm2/Vs have been reported. Although, the ambipolar nature of rr-P3HT was previously observed by time-of-flight (TOF) measurements, any meaningful electron mobilities values for this organic semiconductor could not be obtained, neither in TOF nor in OFETs [92]. It has been also demonstrated that severe electron trapping in many polymeric semiconductors (e.g. rr-P3HT, F8BT, PPV, F8T2, etc.) is caused by hydroxyl groups (-OH) present on the SiO2 surface or carboxyl groups (-COOH) present on the surfaces of organic insulators (e.g. poly(vinyl phenol), (PVP) or polyimides, (PIs), etc.). Therefore, to measure any electron mobilites in OFETs using the abovementioned organic semiconductors as the active layer, dielectrics without these trapping groups on their surfaces have to be used (e.g. benzocyclobutene (BCB)) or they have to be passivated (e.g. via application of buffer layers between insulator and organic semiconductor or self-assembled monolayers, SAMs).
40
1.3.1.3 Fluorinated 1,4,5,8 - napthalenetetracarboxylic diimide (NTCDI-C8H6F3)
NTCDI is the only n-type material used in this study. The motivation for the synthesis of high mobility n-type compounds like fluorinated NTCDI is driven by a fact that to realize the most power efficient families of logic elements, so called complementary circuits, both types of semiconductors, p- and n-type, are required. However, as mentioned before, n-type compounds, into which negative charge carriers can be injected and made mobile, are much rarer than p-type compounds. The chemical structure of the modified NTCDI investigated is shown in Fig. 1.3.4. The compound presented here has been synthesised and introduced to organic fieldeffect transistors by the Group of Bell Laboratories (Lucent Technologies) [80] and has an advantage of being stable under ambient conditions - a very rare property of n-type materials.
Fig. 1.3.4. Molecular structure of NTCDI, R-CF3C6H4CH2 [80].
This CF3C6H4CH2-substituted NTCDI derivative shows relatively poorly crystalline structure when deposited at ambient temperature. A better degree of ordering is achieved by deposition at elevated substrate temperature of 100º C. In organic transistors, FET-mobility as high as 0.12 cm2/Vs has been reported [81]. The material tested in this study has been synthesised and purified on The University of Manchester by the Chemistry Group of Prof. Mike L. Turner.
41
1.3.1.4 Poly(triarylamine)s (PTAAs)
PTAAs are a family of air-stable, amorphous, p-type semiconducting polymers, which are developed by the group at Avecia of Manchester (now a part of Merck UK). Fig. 1.3.8 shows the molecular structure of the PTAA core.
Fig. 1.3.8. Molecular structure of poly(triarylamine)s [93].
As shown in the figure above, PTAAs are versatile in the substitution pattern of pendant groups, which in turn allow control of mobility, ionisation potential, and glass transition. Time-of-flight (TOF) measurements have showed bulk hole mobility of 10-2 cm2/Vs [93]. The group at Avecia have found a strong dependency of PTAA OFET mobility on the polarity of the PTAA/gate insulator interface, with significantly higher mobility on less polar interfaces [94]. This behaviour was explained in terms of Bässler's model of carrier transport in amorphous semiconductors, which predicts reduced mobility in materials with high level of energetic disorder, as is present at polar interfaces. Amorphous semiconductors are especially desirable when the effects of morphology on the device performance have to be isolated. From that point of view, PTAAs are excellent materials for the determination of other factors hindering OFET performance.
42
1.3.2 Conductors
To form the three contacts (source, drain and gate) in OFETs and interconnections between them in their integrated circuits suitable conductors are essential. Conducting polymers are the most desirable materials because of their mechanical flexibility and processability. Unfortunately, the conductivities of this class of polymers are still lower than required (< 103 S/cm) (Fig. 1.3.9), especially for interconnecting lines over large areas. Therefore, it is likely that a combination of inorganic conductors, such as indium-tin oxide (ITO) or metals, will be the initial low-cost solution for large area electronics.
Fig. 1.3.9. Comparison of conductivity values of different conductors [17].
The nature of the active layer defines the operational mode of the transistor (p- or n-channel), therefore, the choice of a proper material for contacts is determined by the type of the semiconductor. Ideally, as explained earlier on the example of organic TFT, the contacts with the active layer should be ohmic. However, as often occurs in real devices, different effects can disturb the formation of ohmic contacts (i.e. interfacial dipole at the metal/semiconductor interface, different morphology of the semiconductor at the contacts, work function of electrodes, etc.). As an example, Fig. 1.3.10a/b show output characteristics of a contact limited OTFT and an OTFT with “good” contacts.
43
-100
(a)
-90
Source-Drain Current, ISD [µA]
- 35 V -80
-70
-60
- 30 V
-50
-40
-30
- 25 V -20
-10
- 20 V - 15 V
0 -5
0
-15
-10
-20
-25
-35
-30
-40
Source-Drain Voltage, VSD [V]
-500
(b)
Source-Drain Current, ISD [µA]
- 45 V
-400 - 40 V
-300 - 35 V
-200 - 30 V
-100
- 25 V
- 20 V - 15 V - 10 V
0 0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
Source-Drain Voltage, VSD [V]
Fig. 1.3.10. (a) Output characteristics of a contact limited OFET. (b) Output characteristics of an OFET with “good” contacts.
44
The influence of “bad” contacts on the performance of the device can be clearly noticed. The output currents are considerably lowered in this device comparing to the one with “good” contacts and there is a visible curvature in the low voltage region, not present when the contacts are “good”. The lowering of output current in OFETs is connected to the injection barrier at the source (mismatch between the source work function and the HOMO (LUMO) of the p-, n-type active layer, respectively [95, 96]). Thus, the “good” ohmic contacts in OFETs are vital for proper device operation and the subject of contacts improvement for p-channel transistors will be raised in more detail in Chapter 4.
1.3.3 Insulators
Recently, many companies and research groups at different Universities have mostly focused on the development and synthesis of improved organic semiconductors and experiment with the adjustment of contacts, OFET designs, and fabrication techniques. Nevertheless, the commercial applications based on highperformance, low-cost and flexible organic thin-film transistors cannot be realized without the identification of high-quality dielectric materials. Although there are many potential candidates for the dielectric layer in OFETs, only a few of them meet all the necessary requirements. The crucial figures-of-merit are the maximum possible electric displacement DMax a gate insulator can sustain, DMax = ε0εEB, with ε the dielectric constant and EB the electric breakdown field, and the capacitance per area Ci = ε0ε/di, with di the insulator
45
thickness. Ci is controlled not only by ε, but also by the minimum thickness di at which a pinhole-free film can be achieved, and thus may reflect deposition procedure as much as a materials property. Additionally, OFET gate insulators have to fulfil demands specific to organic electronics, which are related to the requirement to manufacture organic circuits at extremely low cost. OFET gate insulators should be consistent with plastic (flexible) substrates and ideally, will be processable from solution to avoid costly vacuum steps in manufacturing, but should be insoluble in the solvent used for organic semiconductor deposition. Moreover, it has been demonstrated [97, 98] that the properties of the dielectric layer surface have a profound impact on the performance of OFETs. In the case of (poly-) crystalline semiconductors, roughness of the insulation layer introduces unfavourable changes in the morphology of the active layer [97], whereas amorphous semiconductors suffer from increased level of energetic disorder when deposited on highly polar (high-ε) insulators [98]. In both cases, all the figures-of-merit are affected. Therefore, the choice of a proper insulator for the optimal OFET operation is not easy. Commonly, the abovementioned problems with gate dielectric layers in OFETs lead to extremely high threshold voltages and subthreshold swings, as well as, lowered mobility and reduced “on/off” ratios. Furthermore, the dielectric layer can also affect stability and longevity of the devices. The most common insulator in the inorganic industry, thermally grown SiO2 has often been used as an OFET insulator [99], but more for the reason of convenience and commercial availability rather than performance, as SiO2 insulators are not flexible, need high processing temperatures, the quality of the layers often depends on
46
the processing history and display increased trapping in organic semiconductors due to the presence of hydroxyl groups (-OH) and fixed charges on their surfaces. Another problem is that SiO2 insulators do not display much higher gate capacitance than polymers, because of a relatively low dielectric constant of SiO2 (ε = 3.9). Apart from SiO2, well operating OFETs with insulating polymers, for example poly(vinyl
phenol)
(PVP)
[100],
poly(vinyl
alcohol)
(PVA)
[101],
poly(methylmethacrylate) (PMMA) [102], benzocyclobutene BCB [103], and other polymers [104, 105, 106] (Tab. 1.1) as gate insulators have been shown.
Fig. 1.3.10. Organic polymers used as gate insulators in OFETs [98].
47
These materials can be processed from highly polar organic solvents (e.g. alcohols), and therefore can be cast onto a water-soluble synthetic metal (such as PEDOT/PSS or PAni) without dissolving it [107], but in turn do not dissolve in the less polar solvents of most organic semiconductors. With this approach, all-plastic electronic circuits processed entirely from solution have been demonstrated [108, 109]. Unfortunately, most polymers have relatively low dielectric constants and need to be rather thick to be reliably free of pinholes (typically, di > 100 nm). Consequently, Ci is small and drain current will be low unless high gate and drain voltages are applied.
Recently, the use of polymeric insulators filled with high-ε nanoparticles has been proposed by us [110], which leads to some improvements.
Metal oxides (Al2O3 [111], Gd2O3 [112], HfO2 [113], Ta2O5 [114], etc.) display higher ε than SiO2 and polymers. However, deposition techniques like evaporation or sputtering are very expensive and need to be performed in vacuum or in inert gas atmospheres, respectively. Unfortunately, these deposition methods are not consistent with cheap OFET manufacturing, and the vacuum processed films have to be rather thick to make sure they are free of pinholes. Alternatively, there have been many attempts to obtain high quality metal-oxide layers via anodisation [115, 116], sol-gel [117], chemical vapour deposition (CVD) [118], atomic layer chemical vapour deposition (ALCVD) [119], gas-phase oxide (GPO) [120] and physical vapour deposited oxide (PVD) and other methods [121]. Among them, the anodised metal oxides are the most promising dielectrics for low-cost plastic electronics [122].
48
Dielectric constant ε
Dielectric
inorganic
organic
polypropylene
PP
1.5 TM
perfluoropolymer
CYTOP
2.1
polyisobutylene
PIB
2.3
poly(α-methylstyrene)
PAMS
2.5
benzocyclobutene
BCB
2.5
poly-p-xylylene
PPX
2.6
polyimide
PI
2.8
polyethylene terephtalate
PET
3.0
parylene-C
PC
3.2
poly(methylmethacrylate)
PMMA
3.5
poly(vinyl phenol)
PVP
4.5
poly(vinyl alcohol)
PVA
5…8
cyanoethylpullulan
CYEPL
silicon dioxide
SiO2
3.9
aluminium oxide
Al2O3
9.9
gadolinium oxide
Gd2O3
10
hafnium dioxide
HfO2
25
zirconium dioxide
ZrO2
25
tantalum oxide
Ta2O5
26
niobium oxide
Nb2O5
40
tungsten oxide
WO3
42
titanium dioxide
TiO2
120
10…18
Tab. 1.1. The most common organic and inorganic dielectrics used as gate insulators in OFETs.
A major problem that remains on the way towards practical OFET devices is that current devices require rather high voltages to operate, while in a typical low-end application, the available voltage will be very low. Consequently, the development and industrial manufacturing of high-density integrated circuits (i.e. flexible active matrix displays or intelligent cards and badges) cannot be started until the “low voltage OFET”-problem will be resolved. For comparison, the latest reported OLEDs work with voltages in the range of 5-10 V [123], whereas typical OFETs often exceed 30 - 50 V [124]. 49
The key issue to lower the operational voltage of OFETs is the reduction of threshold voltage VT and decrease of the subthreshold swing S. Both transistor parameters are determined by the presence of traps at the insulator/semiconductor interface and in the bulk of semiconductor. It can be achieved either by the introduction of a high capacitance Ci or by the improvements in the morphology of the active layers, especially at the dielectric surfaces. High Ci would allow the accumulation of the same amount of charge carriers needed to fill the traps with much smaller voltages, whereas the well-ordered semiconducting film would significantly lower the amount of traps at the interface and also in the bulk of the material. Additionally, operational voltage VG and output current ISD of an OFET are related to Ci in such a fashion, that high capacitance is extremely desirable:
VG ~
d 1 ~ i ε Ci
(eq. 1.3.1),
and I SD ~ Ci μ
(eq. 1.3.2),
where di is insulator thickness, ε the dielectric constant of the insulator, Ci the capacitance per unit area of the insulating layer, and µ field-effect mobility. The advantages of high capacitance in OFETs have been presented by Dimitriakopoulos et al. on the example of BZT-based pentacene devices [125]. The IBM group have observed a significant increase of mobility at relatively low gate voltages VG < 5 V in their devices and attributed the effect to the higher carrier concentration at the insulator/semiconductor interface. However, the extremely large capacitance may sometimes hinder the operation of organic transistors. Völkel et al. [126], investigating field-dependent mobility in pentacene transistors by incorporation of localized (trap) intraband states, have given an explanation to this rather surprising 50
effect: they stated that the gate voltage induced charge into localized states, as well as, into extended (band-like) states. As a result, the effective mobile charge concentration at the semiconductor/dielectric interface was reduced, and in turn, the saturation currents decreased. Therefore, the optimum balance between Ci and µ has to be found if high ISD currents are to be maintained. From the practical point of view, high capacitance can be obtained either via the introduction of an insulator of a minimum thickness or a high-ε dielectric. However, both minimising di, and maximising ε, leads to practical problems: a thin, fragile dielectric may lead to increased leakage currents through the insulation layer, and in consequence, rise in power consumption and shorten the device life-time, whereas polar (high-ε) insulators introduce undesirable effects at the organic semiconductorinsulator interface (disadvantageous morphological changes and increased level of energetic disorder in poly(crystalline) and amorphous materials, respectively) [98, 127] generally leading to increased trapping, which causes a rise of threshold voltage VT and inverse subthreshold slope S, as well as, lowers the field effect mobility of charge carriers in OFETs. Therefore, to preserve the high performance of the organic transistors additional coatings between the dielectric and the active layers, as well as, low-ε insulators have been introduced [128, 129]. Commonly, the insulator treatments consist of application of self-assembled monolayers (SAMs) or incorporation of capping layers [130, 131]. Silanes such as n-octadecyltrichlorosilane (OTS) can react with -OH groups that are found on the surface of SiO2 and all metal oxides, to form a self-assembled monolayer (SAM) [132-134]. After oxygen plasma treatment, OTS has been also successfully applied on the surfaces of polymers (e.g. PVP, MXD6) [135]. Fig. 1.3.11 shows an example of an alkylsilane SAM structure formed on SiO2 surface and the chemical
51
reaction for bulk or surface hydrolysis of OTS. Silanisation leads to a much less polar interface, and leads to better ordering and partial shielding from the energetic disorder in the case of (poly-) crystalline and amorphous materials, respectively, which in result increases the overall OFET performance. Additionally, SAMs may smooth rough surfaces, and on very thin insulating layers, reduce undesirable leakage currents [136].
(a)
(b)
(c) Fig. 1.3.11. (a) Chemical structure of n-octadecyltrichlorosilane (OTS). (b) A schematic of a SAM structure formed on SiO2 surface. (c) The chemical reaction for bulk or surface hydrolysis of OTS is also shown [137]. Note that to perform the reaction a small amount of water on the dielectric surface is needed [138].
52
1.4 Outline of this thesis In Chapter 2, our approach to exceptionally cheap, high-quality insulators for low-voltage organic field-effect transistors is described. First, ultra-thin (≈ 3.5 nm), sputtered SiO2 films on commercially available, exceptionally cheap aluminized plastic foils are studied. Then, anodised metal oxides (Al2O3 and TiO2) on metallized plastic substrates, as well as, polymeric insulators filled with high-ε nanoparticles (BaTiO3) as alternative insulators for OFETs are proposed. It will be shown that due to the use of high quality ultra-thin films with high dielectric constant ε extremely high capacitance can be obtained. As a result, low-voltage (|VG| < 5 V), p- and n-channel organic field-effect transistors compatible with transistor-transistor logic (TTL) are presented. Chapter 3 explains fundamentals of typical ferroelectric materials describing the unique properties of polymeric poly-m-xylylene adipamide (MXD6), which exhibits ferroelectric-like properties in its amorphous state. MXD6 was successfully used as a gate insulator to fabricate a single transistor memory device (FerrOFET). The FerrOFET is characterized by relatively low operational voltage, high memory“on” to memory-“off” current modulation ( ≈ 105) and long retention times (> 12 h). Moreover, the device can be manufactured using very cheap, well-established methods of fabrication for organic devices. Chapter 4 focuses on improvements in OFET-contacts. Controlled doping of contact areas, electroplating of high work function metals (i.e. Pt) and electropolymerisation of high work function conducting polymers (i.e. PEDOT) are tested as an inexpensive remedy for contact-limited, p-channel OFETs. It is shown that these contact treatments can significantly improve the injection of charge carriers (holes) into p-type organic semiconductors, and the resulting transistors 53
display high performance. Chapter 5 presents I(V) characteristics of pentacene- and rr-P3HT-OFETs as a function of temperature. It has been found that the performance of OFETs using poly(crystalline) organic semiconductors as active layers, both low and high molecular weight, is improved rather via a change in interface morphology than from a reduction of the interface dielectric constant, as it is in the case of amorphous organic semiconductors. It is thought that the same insulator/semiconductor interface modifications may benefit both types of organic semiconductors (i.e. poly(crystalline) and amorphous).
54
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[103] L. L. Chua, J. Zaumseil, J.-F. Chang, E. C.-W. Ou, P. K.-H. Ho, H. Sirringhaus, R. H. Friend, Nature 2005, 434, 194 [104] C. J. Newsome, T. Kawase, T. Shimoda, D. J. Brennan, Proc. SPIE 2003, 5217, 16 [105] W. Fix, A. Ulmann, J. Ficker, W. Clemens, Appl. Phys. Lett. 2002, 81, 1735 [106] J. Kanicki, L. Kinder, A. Heeger, P. Petroff, J. Swensen, Proc. SPIE 2003, 5217, 35 [107] H. Sirringhaus, T. Kawase, R. H. Friend, T. Shimoda, M. Inbasekaran, W. Wu, E. P. Woo, Science 2000, 290, 2123. [108] M. Matters, D. M. de Leeuw, M. J. C. M. Vissenberg, C. M. Hart, P. T. Herwig, T. Geuns, C. M. J. Mutsaers, C. J. Drury, Optical Materials 1999, 12, 189
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[109] G. H. Gelnick, T. C. T. Geuns, D. M. de Leeuw, Appl. Phys. Lett. 2000, 77, 1487 [110] R. Schroeder, L. A. Majewski, M. Grell, Adv. Mater. 2005, 17, 192 [111] W. Kalb, P. Lang, M. Mottaghi, H Aubin, G. Horowitz, M. Muttig, Synth. Met. 2004, 146, 279
[112] S. J. Kang, K. B. Chung, D. S. Park, H. J. Kim, Y. K. Choi, M. H. Jang, M. Noh and C. N. Whang, Synth. Met. 2004, 146, 351 [113] M. R. Yisokay, J. J. Chambers, A. L. P. Rotondaro, A. Shanware, L. Colombo, Appl. Phys. Lett. 2002, 80, 3183 [114] J. Yuan, J. Zhang, J. Wang. D. Yan, W. Xu, Thin Solid Films, 2004, 450, 316 [115] Y Fujisaki, Y Inoue, T Kurita, S Tokito, H Fujikake, H Kikuchi, Jpn. J. Appl. Phys. 2004, 43, 372 [116] L. A. Majewski, M. Grell, S. D. Ogier, J. Veres, Organic Electronics 2003, 4, 27 [117] Y. Aoki, T. Kunitake, A. Nakao, Chem. Mater. 2005, 17, 450 [118] J. P. Chang, Y.-S. Lin, K. Chu, J. Vac. Sci. Technol. B 2001, 19, 1782 [119] R. G. Gordon, J. Becker, D. Hausmann, S. Suh, Chem. Mater. 2001, 13, 2463 [120] A. W. Hassel, D. Diesing, Thin Solid Films 2002, 414, 296 [121] D. D. Hass, J. F. Groves, H. N. G. Wadley, Surface and Coatings Technology 2001, 146-147, 85
[122] L. A. Majewski, R. Schroeder, M. Grell, J. Phys. D: Appl. Phys., 2004, 37, 21 [123] F. H. Boroumand, P. W. Fry, D. G. Lidzey, Nanoletters 2005, 5, 67 [124] J. Kymissis, C. D. Dimitriakopoulos, S. Purushothaman, IEEE Trans. Electron Dev. 2001, 48, 1060 [125] C. D. Dimitriakopoulos, S. Purushothaman, J. Kymissis, A. Callegari, J. M. Shaw, Science 1999, 283, 822 [126] A. Völkel, R. A. Street, D. Knipp, Phys. Rev. B 2002, 66, 195336
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62
Chapter 2
Alternative gate insulators for organic field-effect transistors
In this chapter, our approach towards low voltage operated OFETs is described. The reduction of operational voltage was achieved by the introduction of high capacitance insulators and improvements in morphology of active layers obtained via dielectric surface modifications. High capacitance was attained using ultra-thin films of SiO2 and high-ε dielectrics (Al2O3 and TiO2), as well as, incorporation of polymeric insulators filled with high-ε nanoparticles. In some cases, insulator surfaces were modified by addition of an extra dielectric coating between the main insulator and semiconductor using self-assembled monolayers (SAMs) or ultra-thin polymeric “capping layers”. The fabricated transistors display relatively low leakage, low threshold, normally-“off” operation with negligible hysteresis, good carrier mobility, high gate capacitance, and exceptionally low inverse subthreshold slope. As the result of this combination of favourable properties, we have demonstrated OFETs maintaining high output currents sufficient to drive organic light emitting devices (cf. Ref. 122 in Chapter 1) that can be operated with low voltages in the order of a few volts.
63
2.1 Low-voltage OFETs: insulator of minimum thickness Organic materials offer a unique combination of properties - they are bendable, easily processed, compatible with flexible substrates and suitable for large area coverage, where low-cost of manufacturing is required. However, very frequently organic transistors are built on rigid and stiff substrates (e.g. thermally grown SiO2 on highly doped Si) [1, 2], and although fabrication of OFETs on such substrates is relatively convenient in the laboratory environment, they are not compatible with the idea of “flexible electronics” [3, 4]. Therefore, to take advantage of organic materials, suitable, extremely cheap and flexible substrates are needed. Recently, metallized plastic foils with sputtered/evaporated metals capped, for example, by ultra-thin sputtered SiO2 layers (d commonly > 3 nm) have appeared as an attractive choice for low-cost OFET substrates [5]. These films (e.g. aluminized Mylar) often retail below 5 £/m2. Moreover, taking into account that the dielectric constant of sputtered SiO2 is 3.9, the parallel capacitor structures built on such exceptionally thin dielectric layers should give an extraordinary capacitance enabling fabrication of OFETs working well below 1 Volt.
2.1.1 Experimental
The cross-section of our top-contact devices is shown in Fig. 2.1. With the aim to fabricate ultra-low voltage transistors, commercially available flexible Mylar films coated with a thin (≈ 60 nm) Al layer and capped by an ultra-thin (≈ 3.5 nm) SiO2, as supplied
by
Flex
Products
Inc.
(Santa
Rosa,
CA,
USA),
were
used.
64
Fig. 2.1. Schematic structure of the fabricated top-contact OFETs with ultra-thin SiO2 layer as gate insulator. The optional insulator treatment consisted of application of an OTS monolayer. OTS: n-octadecyltrichlorosilane, rr-P3HT: regioregular poly(3-hexylthiophene).
The aluminized/SiO2 foils are usually manufactured in the industrial reel-to-reel process, and therefore to achieve a high degree of reproducibility and reliability of the fabricated devices, only the pieces of the film without any visible scratches were carefully chosen. The film was cut into slices (3.5 x 1.5 cm), degreased in acetone and methanol (both purchased from Aldrich), carefully washed several times in high purity deionised water (Millipore Q, Rs > 1 MΩ⋅cm) and finally dried under compressed air. Subsequently, some substrates were subjected to deposition of n-octadecyltrichlorosilane (OTS, 90+, Aldrich) self-assembled monolayer (SAM). The SAM was applied by immersing films in 10-3 M of OTS in cyclohexane at 5° C for 15 minutes. Directly after OTS treatment, capacitance and breakdown behaviour of the resulting structures (Al/SiO2 and Al/SiO2/OTS) were measured with the help of evaporated 2x2 mm, 50 nm thick gold electrodes using a commercially available capacitance meter operating at 800 Hz (Iso-Tech 9023). The measurement was repeated on at least 4 squares. Leakage current and breakdown tests were carried out directly after capacitance measurements using the same connections. The bottom (Al) electrode was biased either positively (as it would be in an n-channel transistor) or negatively (as it would be in a p-channel transistor).
65
1x10-5
Leakage Current, JLeak [A/mm2]
1x10-6
1x10-7
1x10-8
1x10-9
SiO2 (3.5 nm) SiO2 (3.5 nm) + OTS 1x10
-10
-3
-2.25
-1.5
-0.75
0
Voltage [V]
0.75
1.5
2.25
3
Fig. 2.2. Breakdown behaviour of ultra-thin films of sputtered SiO2 (≈ 3.5 nm) on aluminized Mylar before (grey diamonds) and after OTS treatment (blue diamonds). (Capacitor electrode area: 4 mm2).
The irreversible breakdown occurred at -1.6 V and -2.5 V in both directions (Fig. 2.2, cf. Ref. [5]), for unmodified and OTS-treated SiO2, respectively. Regioregular poly(3-hexylthiophene) (rr-P3HT, Aldrich) was reduced with hydrazine (Aldrich) and spun from 10 g/L and 8 g/L solution in chloroform (anhydrous, Aldrich) at 1000 and 2000 rpm for 60 sec in air on both, unmodified and modified substrates, respectively. Subsequently, samples were left to dry in high vacuum ( (VG - VT) regime at source-drain and gate voltages well below -2 Volts.
67
-70
(a)
- 1.5 V
-60
Source-Drain Current, ISD [nA]
-50
-40
- 1.25 V
-30
-20
-1V -10 - 0.75 V - 0.5 V ... 0V
0
leakage currents 10
0
-0.4
-0.8 -0.6 -1 Source-Drain Voltage, VSD [V]
-0.2
-1.2
1x10-7
10
(b)
-1.4
8
] 1/2
(ISD)1/2 [(nA)
Source-Drain Current, ISD [A]
VSD = - 1 V 6
1x10-8 4
2
1x10-9
0 -1.4
-1.2
-1
-0.8
-0.6
-0.4
Gate Voltage, VG [V]
-0.2
0
0.2
Fig. 2.3. (a) Output characteristics of an rr-P3HT-OFET using unmodified, commercial Mylar/Al/SiO2 substrate. (b) Transfer characteristics of the same device (violet diamonds) and |ISD|1/2 vs. VG = VSD (black diamonds).
68
Raja et al. [8] have shown that in electronic devices using polymeric organic semiconductors (e.g. transistors), apart from the quality of the gate insulator, the deposited active layers may be responsible for the increased leakage currents. They have found that the magnitude of the gate leakage current depended on the degree of doping and thickness of the polymer film. Two mechanisms could explain this behaviour, namely, charge injection from the polymer into the oxide and/or displacement currents induced by ion motion. Therefore, to minimize these undesirable effects associated with semiconductors, active layers in OFETs have to be patterned and reasonably thin. Besides, patterning the semiconductors would also disable crosstalk between transistors in integrated circuits [9] and increase overall performance of the devices [10]. In the ideal case, semiconductors should be deposited only in the channel area. Unfortunately, rr-P3HT in the devices made on unmodified SiO2 was not the subject of patterning, and although the insulator alone displayed relatively low leakage currents, in these devices the leakage currents ILeak (visible as small apparent positive currents for VD = 0 at different VG) can be clearly noticed (Fig. 2.3a). In contrast, in the transistors with OTS-modified insulators the active layer completely filled the channel area and was limited only to the proximity of electrodes. In this case, any ILeak are hardly detectable (Fig. 2.4a). It can also be seen that due to the much thicker active layer in OFETs with the untreated insulator, the semiconductor in these devices seems somewhat doped - the ISD slightly increases with VSD even at VG = 0. It can be deduced that the undoping procedure (12h under high vacuum < 10-6 Torr) has to be longer for the thicker films. Table 2.1 shows extracted values of µ in the saturation regime and VT for rr-P3HT devices with unmodified and modified SiO2 surfaces, respectively. The application of an OTS self-assembled monolayer not only significantly supports the main dielectric
69
-250
(a)
- 2.25 V
-225
Source-Drain Current, ISD [nA]
-200
-175
-150
-2V
-125
-100 - 1.75 V -75
- 1.5 V
-50
-25
- 1.25 V
0
- 0.75 V
-1V
0
-0.25
-0.5
-0.75
-1
-1.25
-1.75
-1.5
-2
-2.25
-2.5
Source-Drain Voltage, VSD [V]
1x10-6
20
(b) 18
VSD = - 1.5 V
16 1x10
-7
] 1/2
(ISD)1/2 [(nA)
12
1x10-8
10
8
6
Source-Drain Current, ISD [A]
14
1x10-9 4
2
0 -2.5
(ISD)1/2 [(nA)1/2]
-2
-1.5
-1
Gate Voltage, VG [V]
-0.5
0
1x10-10 0.5
Fig. 2.4. (a) Output characteristics of an rr-P3HT-OFET using OTS-modified, commercial Mylar/Al/SiO2 substrate. (b) Transfer characteristics of the same device (red triangles) and |ISD|1/2 vs. VG = VSD (black diamonds).
70
(ca. 3.5 nm SiO2) to suppress the undesirable leakage currents, but also remarkably improves semiconductor morphology. Accordingly, the mobility of holes in rr-P3HT increases by almost one order of magnitude compared to rr-P3HT devices without any insulator surface treatments (cf. Table 2.1). Additionally, negative threshold voltages in these devices give normally-“off” OFETs, and improvements at the insulator-semiconductor interface (i.e. reduction of the interface trap states) can be easily detected upon comparing subthreshold values S (800 mV vs. 375 mV in SiO2 and SiO2 + OTS OFETs, respectively). Slightly lower VT in transistors with unmodified insulator is obtained via unusually high capacitance, although, the reduction of VT may be also caused by the not completely undoped semiconductor [11]. The presence of an interfacial dipole in Au-pentacene interfaces (the existence of an injection barrier at the top-contact source, [12]) made it impossible to fabricate working pentacene transistors on untreated SiO2. Therefore, only pentacene-OFETs based on OTS-modified SiO2 dielectrics are shown (Fig 2.5a/b). However, the mobility in these pentacene transistors is approximately one order of magnitude lower than in the best-reported pentacene OFETs [13] (see Tab. 2.1). We can attribute this discrepancy to the rough surface of the commercial, metallized films (order of 10 nm rms) [14]. Steudel et al. [15], investigating performance of pentacene-OFETs on rough gate insulators, have found that the mobility in these devices strongly depends on the surface roughness of the dielectric and dramatically decreases with increased insulator roughness. Consequently, the mobility of our pentacene-OFETs built on metallized films quoted here exactly matches the expected mobility on such rough substrates. Interestingly, Halik et al. [16] have shown well performing bottom- and top-contact OFETs using solely self-assembled monolayer (carefully modified OTS)
71
-2,000
(a)
-1,800
-2V
Source-Drain Current, ISD [nA]
-1,600
-1,400
-1,200
- 1.75 V
-1,000
-800
- 1.5 V
-600
-400 - 1.25 V -200
-1V 0 0
-0.2
-0.4
-0.6
-0.8
-1
-1.2
-1.6
-1.4
-1.8
Source-Drain Voltage, VSD [V]
1x10-5
60
(b) VSD = - 1.3 V 50 1x10-6
(ISD )1/2 [(nA)1/2]
-7
1x10
30
1x10-8 20
Source-Drain Current, ISD [A]
40
-9
1x10 10
(ISD)1/2 [(nA)1/2]
0 -3
-2.5
-2
-1.5
-1
-0.5
0
1x10-10 0.5
Gate Voltage, VG [V]
Fig. 2.5. (a) Output characteristics of a pentacene-OFET using OTS-modified, commercial Mylar/Al/SiO2 substrate. (b) Transfer characteristics of the same device (light blue triangles) and |ISD|1/2 vs. VG = VSD (black diamonds).
72
Silicon dioxide, SiO2 OTS
V0
VT
S
Log
Ci
μMeas
FoM
[Y/N]
[mV]
[mV]
[mV/dec]
[on/off]
[nF/cm2]
[cm2/Vs]
[nA/V2]
rr-P3HT
N
-400
-440
800
1.1
1010
1.4x10-3
1.41
rr-P3HT
Y
-200
-920
375
3
296
0.01
2.96
pentacene
Y
-300
-840
255
4
292
0.12
35.4
Semiconductor
Table 2.1, summarised properties of OFETs studied here. The ‘figure-of-merit’ (FoM) is defined as the product of capacitance per area and mobility (μCi).
as a gate insulator. However, obtaining rather high mobilities ≈ 1 cm2/Vs and reducing S down to 100 mV/dec, they used extremely smooth (but not flexible) heavily doped Si wafer substrate and VT in their devices had relatively high value of -1.3 V. While FET-mobility in pentacene highly depends on the insulator surface smoothness, transistors using polymeric semiconductors perform well even on rougher dielectrics. Kim et al. [17] have reported on rr-P3HT-OFETs fabricated on a very rough paper substrate (31.4 nm rms) covered by a thick parylene layer (11 nm rms). They have shown that despite the very rough surface of their dielectric they were
still
able
to
obtain
rather
high
mobilities
in
their
transistors
(µFET ≈ 8.6x10-3 cm2/Vs). Nevertheless, the mobility of our OFETs found here is high enough for many commercial applications [18]. It is worth noting that measured carrier mobilities often do depend on the thickness of both, gate insulator and semiconductor film (cf. Ref. [25], Chapter 4), as well as, on the quality of the source/drain contacts (cf. Ref [7], Chapter 4). Quoted mobilities therefore do not always reflect an intrinsic property of the material. To compare different OFET device concepts, we instead propose a more relevant figureof-merit that controls the saturation drain current of the transistor in the “on” state,
73
namely the product of measured mobility and capacitance per area (μMeasCi). This figure reflects the type and deposition method of the semiconductor, type and deposition method of the gate insulator, thickness of gate insulator (e.g., some deposition methods require a minimum thickness to avoid pinholes), surface modification and specific interactions between insulator and semiconductor, and the quality of the contacts. The figure-of-merit excludes the threshold voltage, subthreshold slope, as well as arbitrary choices such as device geometry and gate/drain voltages. The FoM values shown in the last column of Tab. 2.1 are as high as for pentacene-OFETs on PAMS modified SiO2 [13] and indeed much higher than in any reported OFETs using a polymeric semiconductor as the active layer. Due to the smaller capacitance in OTS-treated devices, the threshold voltage in rr-P3HT transistors increases from -440 mV up to -920 mV, whereas in the pentacene-OFETs it is well below -1 V. The inverse subthreshold slope S in our devices is estimated at 800 mV/dec (SiO2) and 375 mV/dec (SiO2 + OTS), 255 mV/dec (SiO2 + OTS) for rr-P3HT- and pentacene-OFETs, respectively. S controls the voltage swing that is required to turn a transistor from “off” to “on” state. Since S is largely controlled by insulator capacitance, it is more than one order of magnitude lower here than in OFETs which use thick (> 100 nm), thermally grown SiO2 [13]. While one naively expects inverse subthreshold slope to be independent of mobility, it has been shown previously [19] that polymer OFETs usually have higher inverse subthreshold slopes than low molecular weight materials, due to a higher density of defects in polymers. Reduced S is a major step forward for the competitiveness of organic FETs with inorganic devices. In summary, we have demonstrated that commercially available, extremely cheap Mylar® metallized films covered with an ultra-thin (≈ 3.5 nm) SiO2 layer can be used
74
as flexible substrates for production of high-performance OFETs. The transistor parameters are significantly improved after an inexpensive and easy modification by n-octadecyltrichlorosilane self-assembled monolayer (OTS-SAM). Due to the relatively high-capacitance of the resulting structures (SiO2 ≈ 1000 nF/cm2 and SiO2 + OTS ≈ 300 nF/cm2) low operational voltages (|VG| < 2 V), small thresholds (VT < -1 V) and inverse subthreshold slopes (S ≈ 300 mV/dec) are possible. Avoiding visible scratches on the metallized surface a high degree of reproducibility and reliability may be achieved (~ 90 % of all fabricated OFETs worked well in this study).
75
2.2 Low-voltage OFETs: anodised Al2O3 and TiO2 as gate insulators Polymeric dielectrics, despite their advantages (e.g. deposition from solution, low price and commercial availability), have to be relatively thick to avoid formation of pinholes (typically, > 100 nm) and their dielectric constant values are rather small, in the region of 2 up to 18 (cf. Chapter 1, Tab. 1.1). This results in insulators with low gate capacitance (order 10 nF/cm2) and consequently, high operational OFET voltages, often exceeding 30 V ~ 50 V. Therefore, to achieve the high capacitance needed to reduce the operational voltage of organic transistors, the use of inorganic oxides with higher ε than plastics seems to be a reasonable alternative. Several methods for oxide formation (i.e. sol-gel, chemical vapour deposition (CVD), atomic layer chemical vapour deposition (ALCVD), gas phase oxide (GPO) and physical vapour deposited oxide (PVD), cf. Chapter 1, Insulators) have been proposed. However, electrochemically oxidised (anodised) metals seem to offer the best insulator properties, i.e. extraordinary low leakage currents and high breakdown field strengths, in comparison to oxides obtained by other techniques [20]. Furthermore, since anodisation is a well-established industrial process for production of electrolytic capacitors and protective layers in the corrosion industry [21, 22], OFETs using anodised metal oxides as the gate insulator can additionally benefit from already established production lines (i.e. reel-to-reel process) and optimized facilities. The process is extremely cheap, compatible with plastic substrates and performed in aqueous solutions at ambient conditions. The obtained oxides are reported as dense, compact and pinhole free, relatively smooth films [23, 24, 25]. Additionally, the thickness of the resulting films can be controlled very precisely via the anodisation voltage, making it possible to manufacture ultra-thin films in the order of several nanometres [26]. 76
Material
Dielectric constant
Band gap Eg
Anodisation ratio
Crystal structure
ε
(eV)
c (Ǻ/V)
SiO2
3.9
8.9
3.8
amorphous
Al2O3
9.9
8.7
13
amorphous
HfO2
25
5.7
24
monoclinic, tetragonal, cubic
ZrO2
25
7.8
20
monoclinic, tetragonal, cubic
Ta2O5
26
4.5
18
amorphous
Nb2O5
40
3.4
22
amorphous
42
2.6
18
monoclinic, tetragonal,
WO3 TiO2
rhombic 80
3.5
15
tetragonal (rutile, anatase, brookite)
Tab. 2.2. Electrical and structural properties of anodized metals and anodized, highly doped Si [27].
From the group of metals, which can be anodised (i.e. Al, Nb, Ta, Ti, W, Zr, Hf, see Tab. 2.2) we have chosen Al and Ti, for two different reasons: Al is the cheapest metal that can be anodised, and is readily available in the form of thin films on plastic substrates, whereas anodised Ti has an extraordinary high dielectric constant [28]. We have advanced the use of anodisation for OFET gate insulators, developing high capacitance, i.e. very thin, flexible and durable insulators for low-voltage operated OFETs. We have demonstrated OFETs with anodised aluminium (Al2O3) insulators, which are attractive for the availability of low-cost sputtered Al films on polyester substrates, as well as, anodised titanium (TiO2), because bulk TiO2 is known to have particularly high ε. Furthermore, since metal oxides possess hydroxyl groups (-OH) on their surfaces, their properties can be controlled via application of silane-based self-assembled monolayers [29]. Recently, it has been demonstrated [30, 31] that silanisation with n-octadecyltrichlorosilane (OTS) can be effectively applied to anodised oxides. The excellent properties of such modified insulators have led to 77
OFETs working with exceptionally low voltages, well below the voltage demands for commercial devices. This is a major step forward for their competitiveness with inorganic, silicon-based thin-film transistors.
2.2.1 The process of anodisation
Metals like Al, Nb, Ta, Ti, Zr, Hf and W have very high chemical affinity with oxygen; therefore, under ambient conditions they will rapidly react with this gas forming a “native oxide” on their surfaces. The “air-formed” oxide film protects the metals from further oxidation (i.e. oxidation of metal bulk), but is extremely thin - its thickness varies from a few angstroms to circa 2 nm, it is very often not homogenous in thickness and can contain numerous defects and flaws [31]. Therefore, the native oxide cannot be used as a protective film for preventing corrosion or as an insulator in capacitors and transistors. Anodisation is an electrochemical process, which allows improving this natural oxide film and produces stable, highly resistant oxide films with negligible reactivity, on the metal surface [32]. Fig. 2.6 shows a typical anodisation bath to perform the oxidation. During the process, the metal (or doped Si) to be oxidised is made the anode (Fig. 2.6). An electrolytic cell is filled with an electrolyte. It has been shown [33] that the nature of the electrolyte determines the type of anodic oxide film (cf. Tab. 2.3 and Fig. 2.7). The electric circuit is completed with a counter electrode. The anodic current density is supplied from an outer circuit.
78
IA = const
Fig. 2.6. A schematic of an anodisation cell [32].
The chemical reactions, which take place on the anode and the cathode, can be written as follows:
(1) Anode (+):
nM (metal) + mH2O → MnOm (oxide coating) + 2mH+ + 2me-,
(2) Cathode (-): 2mH+ + 2me- → mH2 (gas),
and summarizing:
nM (metal) + mH2O → MnOm (oxide coating) + mH2 (gas)
(chem. eq. 2.2.1).
Anodisation studies on valve metals (i.e. metals, which in their natural state are protected by thin, self-healing, tightly adherent oxide films or film forming metals) with implanted radioactive noble gas atoms as markers [34] have shown that both metal and oxygen ion migration generally contribute to the charge transport occurring in growing anodic films. In the case of aluminium, the marker studies have revealed that the oxide film usually grows in both directions - inwards (~ 75 %) and outwards (~ 25 %) of the initial metal surface. However, the relative importance of the migration processes varies with the metal, the current density used [34], and further research is needed to describe this very intriguing film growth phenomenon.
79
In this study, anodisation of aluminium (Al) and titanium (Ti) is explored. The anodic oxides are characterised from the point of view of applications as alternative gate insulators for organic thin-film transistors. Therefore, the electrochemical oxidation of only these metals will be described in detail.
2.2.2 Anodisation of aluminium
As an amphoteric metal, aluminium dissolves in strong acids, as well as, strongly alkaline media [35]. The native oxide, which gives aluminium its good resistance in the atmosphere and in many almost neutral aqueous solutions (pH: 4 ~ 8), cannot exert its protective effect in strongly alkaline solutions so that aluminium reacts to give soluble aluminates. Therefore, depending on the nature and properties of the used electrolyte, various possibilities can also occur during anodisation of Al [36]. The nature (composition and concentration) of the electrolyte used in the anodisation process determines the type of the oxidised aluminium films and their dielectric breakdown (see Fig 2.7 and Tab. 2.3). In the case when the formed oxide is completely insoluble, barrier-type films are created. This type of layers is used in the industry for electrolytic capacitor manufacturing [37]. These films are characterised by extremely low ionic and electronic conductivity at high dielectric breakdown strengths (i.e. are high-quality insulator layers), good mechanical properties and are anhydrous [26]. Electrolytes in which the anodically formed film is slightly soluble produce porous-type films. The mechanism of oxide formation in this type of films is completely different from barrier-type layers [39] and was not investigated.
80
Fig. 2.7. Behaviour of Al during anodisation in different solutions [38].
Effect of the electrolyte barrier layer formation
Properties of the Al2O3
Electrolytes
the oxide film is largely
high purity deionised water,
insoluble
citric, maleic, glycolic acids ammonium tartrate/adipate
porous oxide film
the oxide film is sparingly
aqueous solutions of sulphuric,
soluble
phosphoric, oxalic and chromic acids
electropolishing
the oxide film is better soluble
sodium carbonate/trisodium
in the electrolyte
phosphate, sulphuricphospohoric acids mixtures, fluoboric acid
etching and pitting
metal dissolution can compete
alkaline based on caustic soda,
with oxide film formation
tri-sodium phosphate and sodium carbonate mixtures
Tab. 2.3. The effect of electrolyte and the properties of anodised Al films [38].
81
It is worth mentioning that when the electrolyte is “stronger” electropolishing and etching of aluminium takes place. Both processes are well established in the aluminium industry [39]. Looking at a thin-film transistor as a “capacitor”, it is obvious, that only the barrier-type anodisation process gives the best insulating properties and can be directly used, without any further electrochemical treatments, as gate insulator in OFET. Therefore, only the barrier-type formation mechanism will be described.
2.2.2.1 Anodisation of aluminium: barrier-type film formation
In the case of barrier layer anodising, aluminium is oxidised in near-neutral solutions (i.e. boric acid/sodium borate, pH 5-7) or in organic acids (i.e. citric, maleic or glycolic acids), which have weak capacity to dissolve aluminium oxide. Interestingly, in the case of barrier-type films, the process can be also performed in high purity deionised water with no added electrolyte, however, this requires high voltages to overcome the high resistance of H2O (Rs > 18 MΩcm), and it is therefore much more convenient to anodise in a dilute weak acid. It has been demonstrated [14] that there is no measurable difference between the resulting anodised films when pure water or very diluted citric acid is used as electrolyte (i.e. the influence of the ionic species is negligible). Fig. 2.8 illustrates the electric drive conditions for anodisation in constant current mode (IA = const). In the constant current mode, the thickness of Al2O3 depends only on the cell voltage, which is allowed to rise to the required value, i.e. the thickness d of
the
resulting
films
can
be
very
precisely
controlled
via
82
anodisation voltage VA, with:
d = cVA
(eq. 2.2.1),
where c is the anodisation ratio describing the thickness of the formed film per
Voltage, VA
Current. IA
applied volt ([c] = Å/V). c is related to the electric breakdown field EB via EB ≈ c-1.
Fig. 2.8. Anodisation voltage and current behaviour during barrier-type alumina film formation [26].
The anodisation current IA is kept constant via anodisation voltage VA compensation until the desired voltage is achieved, and then, decreases to very low values. The “leakage current” flowing under constant voltage conditions is electronic, but if the voltage is increased, then ionic current begins to flow again with further film formation until a new equilibrium is established. However, it is not possible to increase the voltage to a very high value. The upper limit on voltage lies between 500 V-700 V due to breakdown and arcing in the barrier layer [38]. The most interesting fact is that the thickness of the barrier type film is not affected by electrolyzing time, surface roughness and temperature of the electrolyte 83
[26]. In fact, the formed oxide film will exactly follow, or slightly smooth out the initial surface topography of the anodised metal [39]. The thickness of the anodised Al2O3 can be very precisely controlled via the anodisation voltage - in the case of aluminium, every applied volt gives ca. 13 Å of amorphous aluminium oxide (see Tab. 2.1). Anodised Al films are reported as uniform, pinhole free and compact films [33]. Additionally, the bulk dielectric constant of Al2O3 is 9.9 and the dielectric shows relatively high dielectric breakdown strength EB = 770 MV/m (cAl = 1.3 Å/V) and exhibits a relatively large band gap Eg = 8.7 eV [26]. All the abovementioned properties of anodically oxidised Al make it an ideal candidate as a gate insulator in high-capacitance organic field-effect transistors.
2.2.3 Anodisation of titanium
Titanium, due to the presence of the native oxide on its surface, at room temperature, is characterised by extraordinarily good resistance to many strong acids (i.e. nitric, oxalic and boric acids), as well as, strong bases (i.e. NaOH or KOH) [35]. Therefore, mixed strong acids at elevated temperatures are usually used for the Ti (electro-) chemical surface treatments [35]. Generally, anodisation of Ti does not much differ from anodisation of Al. However, due to the much smaller reactivity of Ti with strong acids and their mixtures, more aggressive solutions, if desired, can be used to obtain TiO2. The anodisation ratio of Ti is c = 15 Å/V, but the anodised Ti films are typically crystalline.
84
Fig. 2.9. Relationship of anode oxidising treatment voltage vs. TiO2 film thickness [42].
TiO2 can have three crystalline modifications: rutile, anatase and brookite [40] (cf. Tab. 2.2). The rutile phase of TiO2 has been shown to exhibit the most attractive dielectric properties: εmax ≈ 250 (typically ε > 110) [21], and dielectric breakdown ca. EB ≈ 400 MV/m [41]. However, the band gap value of Eg = 3.5 eV classifies TiO2 rather a semiconductor than an insulator. The differences between the electrical behaviour of Al2O3 and TiO2 are described in the next section. It is worth mentioning that during anodisation there is no possibility to control the crystal structure of TiO2. However, the dielectric constant of anodised Ti films is relatively large, usually ε > 60, suggesting that the anodised films mainly consist of rutile TiO2 phase [40]. Interestingly, anodised films show well-saturated, thickness dependent, interference colours, which could be used as a very quick quality inspection or oxide thickness identification (Fig. 2.9) [42].
85
2.2.4 Experimental
As substrates, commercially available, flexible polyester films (Mylar®, DuPont Teijin Films), either pristine or aluminized (dAl ≈ 60 nm of thickness) as supplied by (Flex Products Inc., USA), were used. Mylar® polyester film is virtually impermeable to the liquid phase of most chemicals and reagents [43]. The films were cut into slices (3.5 x 1.5 cm), degreased in acetone and methanol (HPLC Grade, both purchased from Aldrich), carefully washed several times in high purity deionised water (Millipore Q, Rs > 1 MΩ⋅cm) and finally dried under compressed air. Subsequently, cleaned pristine substrates were loaded into an evaporator and titanium (99.99+ %, Goodfellow) was evaporated under high vacuum conditions (< 10-6 Torr) to a thickness of approximately 100 nm with the constant deposition rate of ca. 2 Å/sec. Following Ti deposition, anodisation of both, aluminium and titanium, was performed in the constant current mode (j = 0.5 mA/cm2) in 10-3 M Citric Acid (99+ %, Aldrich) to the desired voltage VA = 5 V, 10 V and 20 V; resulting thickness can be estimated with the anodisation ratios of Al, cAl = 1.3 nm/V, and Ti, cTi = 1.5 nm/V. After anodisation, the films were washed again in high-purity deionised water. Later, prior to semiconductor deposition, some samples were subjected to two different treatments. Kelly et al. [44] have shown that a thin layer of poly(α-methylstyrene) (PAMS) applied on thermally grown SiO2 and sputtered Al2O3 significantly improved charge carrier mobility of pentacene OFETs. Therefore, for pentacene devices, a 0.1 % wt solution of PAMS (Aldrich, UK) in toluene (HPLC Grade, Aldrich) was spun at 500 rpm for 20 s, followed by 2000 rpm for 40 s. Subsequently, samples were dried in a vacuum oven (10-1 Torr) for ~ 30 minutes to remove residual solvent. The resulting PAMS film was usually (11 ± 1) nm thick, as measured by a Dektak profilometer.
86
Surfaces for OFETs using polymeric active layers (e.g. rr-P3HT and PTAA) were treated with self-assembled monolayer (SAM). It has been reported [45] that a thermally grown SiO2 gate insulator capped by a SAM of hexamethyldisilazane (HMDS) considerably improves mobility of rr-P3HT-OFETs. SAMs form stable, well-ordered and robust layers [46]. Essentially, the SAM changes the surface of oxide from hydrophilic to hydrophobic (the oxide surface becomes apolar), but it gives also an extra strengthening of the insulation layer (cf. Chapter 1, Insulators). Durable self-assembled octadecyltrichlorosilane (OTS) monolayers can be formed on silica,
alumina
and
other
metal
oxides
at
room
temperature
[47].
OTS (90+ %, Aldrich) was deposited by the chemical vapour deposition or solutionbased techniques described elsewhere [48]. Directly after anodisation and following insulator treatments, capacitance and breakdown behaviour of the resulting films was measured with the help of evaporated 2 x 2 mm, 50 nm thick gold electrodes using a commercially available capacitance meter operating at 800 Hz (Iso-Tech 9023). The measurement was repeated on at least 4 samples. Leakage current and breakdown tests were carried out directly after capacitance measurement using the same connections. The bottom (Al or Ti) electrode was biased either positively (as it was during anodisation) or negatively (as it would be in a p-channel transistor). Pentacene (97 %, Aldrich) was used as received without further purification. The material was evaporated under high vacuum conditions (< 5x10-7 Torr) with nominal rate of 3 Å/sec at room temperature (RT). The thickness of the deposited film was controlled during evaporation and also after deposition. Dektak profilometer measurements revealed that the pentacene thickness was about 45 nm for the samples placed directly above the evaporation crucible. The thickness of the samples placed
87
further was not less than 30 nm. Regioregular poly(3-hexylthiophene) (rr-P3HT, 98.5 % regioregular, Aldrich) was de-doped with hydrazine (Aldrich, UK) before use. A solution of 8 g/L of rr-P3HT in chloroform (Anhydrous, Aldrich) was spun at 2000 rpm at ambient conditions. To reverse the well-known effect of oxygen doping, before measurements, transistors were kept under high vacuum (< 10-6 Torr) for minimum 12 hours [49]. Poly(triarylamine) (PTAA, proprietary material of Avecia, UK) was spun from 10g/L solution in toluene (Anhydrous, Aldrich) at 3000 rpm for 20 sec. Samples were left to dry in ambient conditions for 10 minutes and finally, baked on a hot plate (100° C) for 20 min to drive out any residual solvent. Transistors were completed by evaporation of gold source and drain contacts under high vacuum (< 10-6 Torr) through a shadow mask on the top of all semiconductors. The channel width/length was 2 mm and 25/40 µm, respectively. All measurements were performed under a small overpressure of dry, pure nitrogen in a specially prepared box. Transistors were contacted via Karl Süss MicroTech PH100 miniature probe heads to two Keithley 2400 source-measure units (SMUs), which controlled source-drain (VSD) and gate (VG) voltages. The SMUs have a constant current offset of around -2x10-10 A which is therefore the smallest current measured reliably.
2.2.5 Results and Discussion
The anodisation voltage and the measured capacitance, on Mylar/Al/Al2O3/Au and Mylar/Ti/TiO2/Au structures with modified and unmodified oxides are shown in Table 2.4. The application of PAMS or OTS inevitably lowers effective capacitance
88
due to formation of an “additional” capacitor connected in series, however, significantly reduces leakage currents, especially in the case of TiO2 (Fig. 2.10). The figure shows also the breakdown behaviour of both, Al2O3 and TiO2, ultra-thin films. 1x10-4
1x10-5
Current density, JB [A/mm2]
1x10-6
1x10-7
1x10-8
1x10-9
1x10-10
TiO2 (VA = 5 V)
1x10-11
TiO2 (VA = 5 V) + OTS TiO2 (VA = 5 V) + PAMS
1x10
Al2O3 (VA = 5 V)
-12
-8
-7
-6
-5
-4
-3
-2
-1
1
0 Voltage, VB [V]
2
3
4
5
7
6
8
Fig. 2.10. Breakdown behaviour of investigated insulators anodised to VA = 5 V. (Capacitor electrode area: 4 mm2).
Insulator
VA [V] 5V
Al2O3
TiO2
Thickness d [nm] 6.5
Treatment
Ci [nF/cm2]
-
650
PAMS
160
OTS
396
5V
7.5
-
2420
5V
7.5
PAMS
228
10 V
15
-
1360
10 V
15
OTS
465
20 V
30
-
676
1)
Dielectric constant ε
~ 4.5
~ 21
Tab. 2.4. Electrical properties of investigated insulators. 1)
Dielectric constants ε were calculated from the measured capacitance Ci
using the following formula: Ci = εε0/di (i.e. the capacitance of parallel plate capacitor [50]).
89
The most striking feature of Fig. 2.10 is extremely high leakage of “bare” TiO2. The properties of anodised titanium dioxide films are very different from anodised aluminium oxide layers. Essentially, TiO2 is not an insulator, but a large bandgap semiconductor (Eg = 3.5 eV), and therefore displays leakage behaviour quite different from “proper” insulators (i.e. Al2O3, Eg = 8.7 eV). Instead of good insulation up to a clearly defined dielectric breakdown, Campbell et al. [41] have found that TiO2 displays a steady but rapid increase of leakage current due to space-charge limited conduction in the semiconductor. Thus, in real devices, the leakage currents, especially at high electric fields (E > 1.5 MV/m), may be a problem [51]. Nevertheless, the leakage currents may be significantly reduced by an application of a polymeric capping layer (e.g. poly(α-methylstyrene), PAMS) or a self-assembled monolayer (e.g. OTS) down to the level of Al2O3 (Fig. 2.10), at least in the region of 0 ± 2 V. Hassel and Diesing [20], working on properties of ultra-thin anodised films in metal-insulator-metal (MIM) structures, have found that these films, for a given thickness, showed a highly reproducible and predictable breakdown voltage in comparison to a large mean deviation in oxides obtained by gas-phase oxide (GPO) and physical vapour deposited oxide (PVD). Additionally, ultra-thin metal oxide films usually have very different electrical properties than the bulk oxide [52]. This is due to oxygen deficiency during their formation. The deficit of O2 can lead to nonstoichiometric oxides (i.e. AlOx or TixOy). These alterations in film structures can have a direct influence on the dielectric constant of metal oxides, which is usually smaller than the ε of the bulk oxides. In the case of investigated Al and Ti ultra-thin films, the capacitance measurements revealed that εAl = 4.5, whereas εTi =21 (Tab. 2.4). Nevertheless, at the same time the dielectric breakdown strength of
90
ultra-thin oxide films increases and is typically much higher than in the bulk of oxide [52]. From that point of view, the increase of EB compensates somewhat for the loss of capacitance, and the transistors using such films as gate insulator can only benefit from it.
2.2.5.1 Anodised Al2O3 as a gate insulator in OFETs
All curves presented here are typical for p-channel OFETs working in accumulation mode. Transistor action is observed with low operational voltage of less than -3 V due to the use of very thin gate insulators with exceptionally high gate capacitance. However, in the case of untreated insulators, small leakage currents, increasing with higher VG, through the gate insulator can be observed (source + drain to gate leakage (Fig. 2.11a, 2.13a). Nevertheless, after dielectric modifications (OTS, PAMS) significant decrease of leakage currents was observed (Fig. 2.12a, 2.14a and 2.15a). The performance data of the fabricated transistors are summarised in Table 2.5. For rr-P3HT transistors with modified Al2O3, there is small ISD component rising linearly with VSD, even in the saturation regime, or for VG below VT. This results from residual rr-P3HT doping, despite de-doping with hydrazine and evacuation, probably due to processing under ambient conditions [53]. Transistors with unmodified Al2O3 displayed mobility in the region of µ = 1x10-3 cm2/Vs, with the best devices showing µ = 2.2x10-3 cm2/Vs. The measured mobility was typically 6 - 10 times higher after insulator modification. The device shown in Fig. 2.13 exhibited µ = 6.6x10-3 cm2/Vs.
91
-65
(a)
-4V -55
Source-Drain Current, ISD [nA]
-45
- 3.75 V
-35
- 3.5 V -25
- 3.25 V -15
-3V -5
- 2.75 V - 2.5 V
5
leakage currents
15 0
-0.5
-1
-1.5
-2.5
-2
-3
Source-Drain Voltage, VSD [V]
1x10-6
20
(b)
VSD = - 2.5 V
16
12
1x10-8
8
Source-Drain Current, ISD [A]
(ISD)1/2 [(nA)1/2]
1x10-7
1x10-9 4
1x10-10
0 -5
-4
-3
-2
Gate Voltage, VG [V]
-1
0
1
Fig. 2.11. (a) Output characteristics of an rr-P3HT-OFET using commercial, flexible Mylar/Al substrate with ultra-thin anodised Al2O3 film (d ≈ 6.5 nm). (b) Transfer characteristics of the same device (violet diamonds) and |ISD|1/2 vs. VG = VSD (black diamonds).
92
-80
(a)
-3V
-70
Source-Drain Current, ISD [nA]
-60
-50
- 2.75 V
-40
-30
- 2.5 V -20 - 2.25 V -10
-2V - 1.75 V
0 0
-0.25
-0.5
-0.75
-1
-1.25
-1.5
-1.75
-2
-2.25
-2.5
-2.75
-3
Source-Drain Voltage, VSD [V]
1x10-6
30
(b)
VSD = - 2.5 V
10
1x10-8
(ISD)1/2 [(nA)1/2]
1x10-7
Source-Drain Current, ISD [A]
20
1x10-9
0 -5
-4
-3
-2
-1
0
1
Gate Voltage, VG [V]
Fig. 2.12. (a) Output characteristics of an rr-P3HT-OFET using commercial, flexible Mylar/Al substrate with ultra-thin, anodised, OTS-modified Al2O3 film (d ≈ 6.5 nm). (b) Transfer characteristics of the same device (light blue triangles) and |ISD|1/2 vs. VG = VSD (black diamonds).
93
Aluminium oxide, Al2O3 Semiconductor
Treatment
V0
VT
S
Log
Ci
μMeas
FoM
[V]
[V]
[mV/dec]
[on/off]
[nF/cm2]
[cm2/Vs]
[nA/V2]
rr-P3HT
-
-1.9
-2.6
725
2.6
625
1.9x10-3
1.22
rr-P3HT
OTS
-1.5
-2.3
820
2.2
386
6.6x10-3
2.54
Table 2.5. Summarised properties of rr-P3HT-OFETs using anodised Al2O3 as gate insulator studied here. The ‘figure-of-merit’ FoM = μCi.
Bao et al. [54] have reported µ ≈ 9.2x10-3 cm2/Vs for rr-P3HT transistors spin-cast from chloroform onto 300 nm, thermally grown SiO2 gate insulators (Ci = 10 nF/cm2) and contacted with gold contacts. The lower mobility found here could be connected to the surface roughness of the commercial substrates [55] and commercially purchased, not purified semiconducting material [56]. However, this work presents ca. 30 times higher FoM values (the last column of table 2.5) than reported by Bao et al. (2.54 vs. 0.092), (FoM characterises the performance of an insulator/semiconductor combination above threshold in an OFET). Additionally, due to large capacitance of these insulators, subthreshold swing S of the rr-P3HT-OFETs is well below 1V/dec, whereas typical organic transistors usually display S ~ 5 - 10 V/dec [57]. Figures 2.13a/b present the room temperature characteristics of the fabricated pentacene-OFETs using pristine anodised aluminium oxide. To improve the performance of the devices the dielectric was modified by an application of a selfassembled monolayer (OTS) or a polymeric capping layer (PAMS). Figures 2.14a/b and 2.15a/b show output and transfer characteristics of pentacene-OFETs with OTSand PAMS-modified Al2O3, respectively. All pentacene devices operated in accumulation
mode
and
show
typical
p-channel
transistor
behaviour.
The performance data of the fabricated transistors are summarized in Table 2.6.
94
-3,000
(a)
-4V
Source-Drain Current, VSD [nA]
-2,500
-2,000
- 3.5 V -1,500
-1,000
-3V -500
- 2.5 V -2V
0 0
-0.5
-1
-1.5
-2.5
-2
-3
Source-Drain Voltage, VSD [V]
1x10-5
100
(b)
80
1x10-6
60
1x10
40
1x10-8
20
1x10
-7
Source-Drain Current, ISD [A]
(ISD)1/2 [(nA)1/2]
VSD = - 2.2 V
-9
1x10-10
0 -5
-4
-3
-2
-1
0
1
Gate Voltage, VG [V]
Fig. 2.13. (a) Output characteristics of a pentacene-OFET using commercial, flexible Mylar/Al substrate with ultra-thin, anodised Al2O3 film (d ≈ 6.5 nm). (b) Transfer characteristics of the same device (dark blue diamonds) and |ISD|1/2 vs. VG = VSD (black diamonds).
95
The pentacene transistors using “bare” anodised Al2O3 operate with rather low voltages (VT = -2.24 V), display low inverse subthreshold slopes (230 mV/dec), and exhibit small hysteresis. However, the drain saturation current is relatively low, indicating poor carrier mobility - µ = 0.04 cm2/Vs. It has been shown [58] that the mobility of pentacene-OFETs devices strongly depends on the surface roughness of the dielectric and dramatically decreases with increased insulator roughness. Consequently, the mobility of pentacene-OFETs built on aluminized Mylar films quoted here cannot be higher due to rather rough surface of commercial, metallized foils [55]. Nevertheless, when the anodised surface is modified with OTS or PAMS, we can prepare flexible OFETs with threshold ≈ -2 V, subthreshold swing ≤ 200 mV/dec, “on/off” ratio > 105, negligible hysteresis, and high drain saturation currents (Fig. 2.14a/b and 2.15a/b). Remarkably, gate leakage is negligible on insulator films of less than 10 nm total thickness, while sputtered Al2O3 needs to be prepared at least ten times thicker to be reliably free of pinholes. Pentacene mobility on the modified anodised Al remains one order of magnitude lower than for the best reported pentacene mobilities on PAMS-capped SiO2 [44], for reasons not fully understood (cf. Tab. 2.6). However, the insulators presented here have practical as well as performance advantages over PAMS-capped SiO2, which we believe more than outweigh the reduced mobility: Practically, OTS-treated anodised Al on Mylar is cheap, flexible, and can be used with solution-processed semiconductors as well as with pentacene, while PAMS would be soluble in common conjugated polymer solvents. The key performance advantage is high capacitance with low leakage. High operational voltage is a showstopper for organic electronics, and threshold voltage can be reduced through high capacitance, but not through
96
-50,000
(a)
Source-Drain Current, ISD [nA]
-45,000
- 4.5 V
-40,000 -4V
-35,000
-30,000 -25,000 - 3.5 V
-20,000 -15,000 -3V
-10,000 - 2.5 V
-5,000
-2V
0 0
-0.5
-1.5
-1
-2.5
-3.5
-2 -3 Source-Drain Voltage, VSD [V]
-4
Fig. 2.14.
1x10-4
300
(b)
VSD = - 3 V 1x10-5
(ISD)1/2 [(nA)1/2]
1x10-7
100
1x10
-8
Source-Drain Current, ISD [A]
1x10-6
200
1x10-9
1x10-10
0 -5
-4
-3
-2
-1
0
1
Gate Voltage, VG [V]
Fig. 2.14. (a) Output characteristics of a pentacene-OFET using commercial, flexible Mylar/Al substrate with ultra-thin, anodised, OTS-modified Al2O3 film (d ≈ 6.5 nm). (b) Transfer characteristics of the same device (light blue triangles) and |ISD|1/2 vs. VG = VSD (black diamonds).
97
-10,000
(a)
-9,000
Source-Drain Current, ISD [nA]
- 4.5 V
-8,000 -7,000
-6,000 -4V -5,000
-4,000 -3,000
- 3.5 V
-2,000 -3V
-1,000
- 2.5 V
0
-0.5
-1.5
-1
-2.5
-3.5
-2 -3 Source-Drain Voltage, VSD [V]
-4
Fig. 2.15.
1x10-4
120
(b)
1x10-5
VSD = - 3.5 V
(ISD)1/2 [(nA)1/2]
1x10-7
40
1x10
-8
Source-Drain Current, ISD [A]
1x10-6
80
1x10-9
1x10-10
0 -5
-4
-3
-2
-1
0
1
Gate Voltage, VG [V]
Fig. 2.15. (a) Output characteristics of a pentacene-OFET using commercial, flexible Mylar/Al substrate with ultra-thin, anodised, PAMS-modified Al2O3 film (d ≈ 6.5 nm). (b) Transfer characteristics of the same device (green triangles) and |ISD|1/2 vs. VG = VSD (black diamonds).
98
Aluminium oxide, Al2O3 Semiconductor
Treatment
V0
VT
S
Log
Ci
μMeas
FoM
[V]
[V]
[mV/dec]
[on/off]
[nF/cm2]
[cm2/Vs]
[nA/V2]
pentacene
-
-1.6
-1.95
280
4.3
630
0.04
21
pentacene
OTS
-0.8
-1.69
195
5.6
365
0.45
178
pentacene
PAMS
-1.5
-2.16
300
5
155
0.31
48
Table 2.6, summarised properties of pentacene-OFETs using anodised Al2O3 as gate insulator studied here. The ‘figure-of-merit’ FoM = μCi.
high mobility. Above threshold, a 10-fold lower mobility is compensated by a capacitance that is at least 10-fold higher than for other typical OFET gate insulators, such as spin-cast polymers, sputtered inorganic oxides, or thermal SiO2. The
figure-of-merit,
μCi,
that
characterises
the
performance
of
an
insulator/semiconductor combination above threshold, is therefore as high, or higher, on anodised, modified Al as it is for PAMS-treated SiO2, while at the same time, subthreshold behaviour is considerably better (VT ≈ -7V, S ≈ 1.7 V/dec [44] vs. VT ≈ -2V, S ≈ 0.2 V/dec here). Excellent performance, together with low-cost, solution-based preparation on flexible substrate, qualifies anodisation of Al as one of the leading gate insulator concepts for organic electronics.
99
2.2.5.2 Anodised TiO2 as a gate insulator in OFETs
Figures 2.16a/b present output and transfer characteristics of a pentacene-OFET using 'bare' anodised TiO2 as gate insulator. Fig. 2.17a/b and Fig. 2.18a/b show corresponding OFETs with OTS- and PAMS-treated TiO2 gate insulators, respectively. The untreated TiO2 insulator had to be made thicker, VA = 20 V vs. 10 V for OTS-treated TiO2 and 5 V for PAMS-treated TiO2, to limit leakage currents. The characteristics show very small hysteresis, linear regime without curvature, and well-saturated, relatively high ISD in VSD > (VG - VT) regime at source- and gate voltages well below -1 Volt. At VG < 0, there are small apparent positive currents for VD = 0 that indicate leakage, more so for the TiO2 that is not modified. However, due to the use of 'thick' TiO2, the magnitude of leakage current is far smaller than sourcedrain current. Applying standard OFET theory [cf. eq. 1.2.4, Chapter 1], the field-effect mobility in the saturation regime µ and threshold voltage VT were found to be VT = -430 mV and µ = 0.15 cm2/Vs without OTS, VT = -230 mV and μ = 0.25 cm2/Vs for OTS-treated TiO2, and VT = -490 mV and μ = 0.8 cm2/Vs for PAMS-treated TiO2. Threshold voltages are reduced compared to OFETs with anodised Al of similar thickness, and much lower than on the much thicker, thermally grown SiO2 reference devices [55]. The mobility found here is not as high as presented by Kelly et al. [44], but SiO2-transistors we had prepared for comparison in the same evaporation batch showed similar mobility. While Kelly et al. have put major effort into optimised evaporation conditions, including substrate heating, our focus is on the gate insulator. The inverse subthreshold slope, S, is (170…175) mV/dec for TiO2 OFETs, 100
-800
(a)
- 0.8 V
-700
Source-Drain Current, ISD [nA]
-600
-500
- 0.7 V
-400
-300
- 0.6 V
-200
-100
- 0.5 V - 0.4 V
0
leakage currents 100 0
-0.2
-0.1
-0.3
-0.4
-0.6
-0.5
-0.7
Source-Drain Voltage, VSD [V]
-5
10
(b)
1x10
VSD = - 0.5 V
1x10-6
Source-Drain Current, ISD [A]
(ISD)1/2 [(nA)1/2]
8
-7
6
1x10
4
1x10
2
1x10-9
-8
1x10-10
0 -1.4
-1.2
-1
-0.8
-0.4
-0.6 -0.2 Gate Voltage, VG [V]
0
0.2
0.4
Fig. 2.16. (a) Output characteristics of a pentacene-OFET using commercial, flexible Mylar/evaporated Ti substrate with anodised to 20 V, TiO2 film (d ≈ 30 nm). Channel length L = 25 µm. (b) Transfer characteristics of the same device (dark blue diamonds) and |ISD|1/2 vs. VG = VSD (black diamonds).
101
-900
(a)
- 0.8 V -800
Source-Drain Current, ISD [nA]
-700 - 0.7 V
-600
-500 - 0.6 V
-400
-300 - 0.5 V -200
- 0.4 V -100 - 0.3 V - 0.2 V - 0.1 V
0 0
-0.1
-0.2
-0.3
-0.5
-0.4
-0.6
-0.7
-0.9
-0.8
-1
-1.1
-1.2
Source-Drain Voltage, VSD [V]
-5
140
(b)
1x10
120
VSD = - 0.5 V
-6
1x10
(ISD)1/2 [(nA)1/2]
Source-Drain Current, ISD [A]
100
-7
1x10
80
60
1x10-8
40
1x10-9 20
-10
0 -1.4
1x10 -1.2
-1
-0.8
-0.4
-0.6 -0.2 Gate Voltage, VG [V]
0
0.2
0.4
Fig. 2.17. (a) Output characteristics of a pentacene-OFET using commercial, flexible Mylar/evaporated Ti substrate with anodised to 10 V, OTS -modified TiO2 film (d ≈ 15 nm). Channel length L = 40 µm. (b) Transfer characteristics of the same device (light blue triangles) and |ISD|1/2 vs. VG = VSD (black diamonds).
102
-700
(a)
- 0.8 V -600
Source-Drain Current, I SD [nA]
-500
-400
- 0.7 V
-300
-200
- 0.6 V -100 - 0.5 V - 0.4 V
0
leakage currents 100
-0.1
0
-0.2
-0.3
-0.5
-0.4
-0.6
Source-Drain Voltage, VSD [V]
-5
80
(b)
1x10
VSD = - 0.5 V -6
1x10
(ISD)1/2 [(nA)1/2]
Source-Drain Current, ISD [A]
60
-7
1x10 40
-8
1x10
20 -9
1x10
0 -1.2
-10
-1
-0.8
-0.6
-0.4
-0.2
Source-Drain Voltage, VSD [V]
0
0.2
1x10 0.4
Fig. 2.18. (a) Output characteristics of a pentacene-OFET using commercial, flexible Mylar/evaporated Ti substrate with anodised to 5 V, PAMS -modified TiO2 film (d ≈ 15 nm). Channel length L = 25 µm. (b) Transfer characteristics of the same device (dark green triangles) and |ISD|1/2 vs. VG = VSD (black diamonds).
103
Titanium dioxide, TiO2 Semiconductor
Treatment
V0
VT
S
Log
Ci
μMeas
FoM
[V]
[V]
[mV/dec]
[on/off]
[nF/cm2]
[cm2/Vs]
[nA/V2]
pentacene
-
-0.1
-0.43
170
3.7
676
0.15
101.4
pentacene
OTS
+0.1
-0.23
175
3.5
465
0.25
116.25
pentacene
PAMS
-0.15
-0.49
130
4
228
0.8
182.4
Table 2.6, summarised properties of pentacene-OFETs using anodised TiO2 as gate insulator studied here. The ‘figure-of-merit’ FoM = μCi.
independent of OTS treatment, whereas only 130 mV/dec in the case of PAMS-treated TiO2. S is largely controlled by capacitance, and therefore is more than an order of magnitude higher on our reference devices, which use low-capacitance SiO2 insulators. S controls the voltage swing needed to turn a transistor from “off” to “on”; our OFETs show inverse subthreshold slope within a factor 3 of the theoretical limit of 57 mV/dec at room temperature. This is a major step forward for their competitiveness with inorganic transistors. The use of high capacitance TiO2 insulators in conjunction with a solution processed, polymeric semiconductor, poly(triarylamine) (PTAA) was also explored. PTAAs are a family of air-stable, amorphous p-type semiconducting polymers. The group at Avecia, who have developed PTAAs over recent years, have found a strong dependency of PTAA OFET mobility on the polarity of the PTAA/gate insulator interface, with significantly higher mobility on less polar interfaces [60]. This behaviour was explained in terms of Bässler's model of carrier transport in amorphous semiconductors, which predicts reduced mobility in materials with high “energetic disorder”, as is present at polar interfaces. It was found that no ISD currents in PTAA OFETs using untreated TiO2 could be measured, because those were below the current offset of our instrument (0.2 nA).
104
This is consistent with mobilities below 10-5 cm2/Vs on the highly polar TiO2 (ε ~ 21) and slightly over 10-5 cm2/Vs on Al2O3 (ε ~ 8.9). However, when TiO2 was capped by OTS, well-working devices could be manufactured. This reinforces the now widely accepted view that OFET mobility is not a property of an organic semiconductor but a property of a device. The outputand transfer characteristics of OFETs using PTAA as the active layer with OTStreated TiO2 (L = 25 µm, VA = 10 V) as insulator are presented in figures 2.19a/b, respectively. There is no curvature in the linear regime of output characteristics and virtually no hysteresis. There is a clear saturation of ISD in the VSD > VG - VT region. Threshold voltage VT is as low as -280 mV, and inverse subthreshold slope is S = 216 mV/dec, which is extremely low for a polymeric organic semiconductor. It is, however, slightly higher than for our pentacene OFETs, while one naively expects inverse subthreshold slope to be independent of mobility. It has been shown previously that polymer OFETs usually have higher inverse subthreshold slopes than low molecular weight materials [61], probably because of higher amount of defects (traps) in polymer films than in (poly)crystalline films. Moreover, not “properly” shielded high-ε dielectrics may introduce increased level of energetic disorder σ. It seems that both the increase of defects and enlarged σ affect mobility and inverse subthreshold slope. The mobility found here on OTS-capped TiO2 is 3.5x10-3 cm2/Vs, slightly higher than on OTS-modified SiO2. This figure is close to the expected in this first generation of PTAAs. The latest variants of PTAA polymers reach mobilities up to 10-2 cm2/Vs under optimised conditions, using highly non-polar dielectrics [60].
105
-45
(a)
Source-Drain Current, ISD [nA]
-40
-1V
-35 - 0.9 V -30
-25
- 0.8V
-20 - 0.7 V
-15 - 0.6 V -10 - 0.5 V
-5 - 0.4 V - 0.3 V
- 0.2 ... 0 V
0 -0.2
0
-0.6
-1
-0.4 -0.8 Source-Drain Voltage, VSD [V]
-1.2
12
(b)
1x10-7
10
VSD = - 0.6 V
(ISD)1/2 [(nA)1/2]
1x10-8
6
4
1x10
-9
Source-Drain Current, ISD [A]
8
2
0 -1.6
1x10-10 -1.4
-1.2
-1
-0.6
-0.8 -0.4 Gate Voltage, VG [V]
-0.2
0
0.2
0.4
Fig. 2.19. (a) Output characteristics of a PTAA-OFET using commercial, flexible Mylar/evaporated Ti substrate with ultra-thin, anodised, PAMS-modified TiO2 film (d ≈ 15 nm). (b) Transfer characteristics of the same device (yellow triangles) and |ISD|1/2 vs. VG = VSD (black diamonds).
106
Titanium dioxide, TiO2 Semiconductor
Treatment
V0
VT
S
Log
Ci
μMeas
FoM
[V]
[V]
[mV/dec]
[on/off]
[nF/cm2]
[cm2/Vs]
[nA/V2]
PTAA
-
-
-
-
-
2416
< 10-5
< 0.025
PTAA
OTS
-0.05
-0.28
216
2.5
460
3.5x10-3
1.61
Table 2.7, summarised properties of PTAA-OFETs using anodised TiO2 as gate insulator studied here. The ‘figure-of-merit’ FoM = μCi.
The major challenge when using thin TiO2 insulators in OFETs with lowmolecular weight, evaporated pentacene is the control of gate leakage. This can be achieved either by using somewhat thicker TiO2, by capping a thinner TiO2 film with PAMS, or by capping with a self-assembled OTS monolayer, which we find to work on TiO2 in the same way as on SiO2 and Al2O3. Either measure leads to some loss of capacitance, but operation below -1 Volt is still possible. PAMS- and OTS-capping lead to comparable performance that is slightly better than for OFETs with thicker, uncapped TiO2, but the difference is relatively small. The situation is different when a solution-processed, polymeric organic semiconductor is used. For the amorphous, polymeric semiconductor, PTAA, there is a considerable performance difference between treated and untreated insulator surfaces. Carrier mobility in amorphous organic semiconductors is highly sensitive to interface polarity. Consequently, un-treated TiO2 of whatever thickness is not an acceptable interface, because it leads to extremely low carrier mobility below 10-5 cm2/Vs. PAMS treatment is not an option, because PAMS is soluble in the same solvents as PTAA. However, surface treatment with OTS proved successful in improving interface properties. We have found μ = 3.5x10-3 cm2/Vs on OTS-treated TiO2. On untreated SiO2 reference devices, mobility is low but measurable (7.5x10-5 cm2/Vs). OTS treatment improves this mobility to 3.5x10-3 cm2/Vs,
107
as in the case of OTS-treated TiO2.
Concluding, the apolar, 18-carbon alkyl chain that OTS anchors onto the oxide surface, is successful in shielding PTAA from most of the energetic disorder at the inorganic surface. The mobility obtained with the OTS treatment is almost the same as that reported for the first generation of PTAA polymers in top gate devices employing thicker, highly non-polar fluoropolymer layers [60]. However, the more we shield the organic semiconductor from energetic disorder by thick, apolar insulating layers, the more capacitance we lose, which excludes low voltage operation. Realistically, for the best OFET performance the trade-off between mobility and capacitance has to be optimised.
Nevertheless, this work demonstrates that by virtue of their high capacitance, anodised, ultra-thin TiO2 gate insulators pave the way to organic transistors that can operate with voltages below -1 Volt for both low-molecular weight and polymeric organic semiconductors.
108
2.3 Low-voltage OFETs: high-ε nanoparticles From the industrial point of view, a high capacitance gate insulator that can be deposited from aqueous solutions using very cheap techniques (e.g. spin-coating or inkjet printing) is highly attractive. However, as explained earlier, polymeric insulators (e.g. PVP, PVA, PMMA, BCB, etc.) display relatively low dielectric constants and have to be fairly thick (> 100 nm) to avoid formation of pinholes. Consequently, these insulators display low gate capacitance (order 10 nF/cm2) and accordingly, high operational OFET voltages, often exceeding 30 V - 50 V. Therefore, to solve this urgent industrial problem, alternative solutions for gate insulators have to be developed. From that point of view, one of the most attractive novel insulators would be a dielectric, which would combine the advantages of polymers (i.e. flexibility, low price synthesis on large scale, solution processability, etc.) and high-ε materials (i.e. metal oxides). Recently, Bai et al. [62] have reported on polymeric films filled with micro-sized ceramic particles, particularly placing the emphasis on the increase in the dielectric constant of such hybrid layers. However, their films were too thick (≈ 20 µm) for use in transistors. More recently, Chen et al. [63] have proposed a nanocomposite dielectric gate insulator, using poly(vinyl phenol) (PVP) filled with TiO2 nanoparticles. However, their hybrid dielectric was too thick (> 600 nm) and the increase of dielectric constant ε, due to the use of TiO2 nanoparticles, was relatively low (from 3.4 for pristine PVP up to 5.4 for the nanocomposite dielectric). Consequently, their OFETs operated at high voltages (~ 40 V) and the overall OFET-performance was not much improved.
109
Here, we propose polymeric gate insulators, namely, poly(vinyl alcohol) (PVA) and its copolymers (PVAIA), filled with Barium Titanate (BaTiO3), which in the bulk exhibits a ferroelectric phase [64]. The vision for OFETs using such a hybrid (BaTiO3 + polymeric dielectric) as gate insulator is that, it will allow the manufacturing of cheap, easily patterned transistors that still have enough performance and the ability to operate at low voltages.
2.3.1 Experimental
Nanocrystalline BaTiO3 behaves like a dielectric with a high dielectric constant, which is generally true for nanoscale ferroelectric materials [65]. As the organic insulating polymer to be filled, PVA or PVOH is well suited as a cheap, non-toxic, commercially available polymer with two important properties: it is soluble in water, insoluble in organic solvents and it has already a relatively high dielectric constant (ε = 5 to 8, see Chapter 1, Insulators) depending on the film thickness in the range of a hundred nanometers to many micrometers. The chemical structure of PVA is shown in Fig. 2.20.
Fig. 2.20. Chemical structure of poly(vinyl-alcohol) (PVA) [cf. Chapter 1, Insulators].
110
PVA and its copolymers can also be chemically or thermally cross-linked at their hydroxyl groups, which generates water as a by-product. Highly cross-linked PVA is not hygroscopic and impedes ion movement in the film, thereby decreasing leakage currents. Dispersing BaTiO3 in the aqueous PVA solution leads to films with over twice the dielectric constant of pure PVA when spin-cast to the same thickness - and therefore twice the capacitance. However, it has been shown that the suspension of BaTiO3 particles in water can be even further improved by using PVA copolymers [66]. Therefore, the same experiment with a PVA copolymer, poly-(vinyl alcohol-covinyl acetate-co-itaconic acid) (PVAIA), a random copolymer, was also performed. Fig. 2.21 shows the chemical structure of PVAIA.
Fig. 2.21. Chemical structure of PVAIA [66].
The more polar groups aid the suspension of BaTiO3, and also give rise to a higher dielectric constant of 6 at film thicknesses around 150 nm compared to 5.1 for PVA. The transistors tested were built in the top-contact geometry (Fig. 2.22). The gate electrode was ITO sputtered on glass, which was cleaned with de-ionized water and Hellmanex, washed with water, and then cleaned with oxygen plasma. PVA and PVAIA (Aldrich, used as received) were dissolved in high-purity de-ionized water at a concentration of 30g/L. Subsequently, BaTiO3 nanoparticles (Aldrich, used as received) were mixed into the solution at a ratio of 1:5 with respect to the weight of
111
Fig. 2.22. Schematic structure of the fabricated top-contact pentacene-OFETs with PVA/PVAIA filled with BaTiO3 nanoparticles as gate insulator.
PVA or PVAIA. The solution was then left standing for a few days to allow the nanoparticles to disperse. Through shortening of the mixing time, lower concentrations of BaTiO3 in the solution were achieved. The larger particle aggregates fall out of solution during that time, and we used the solution over the particle sediment and filtered the solution with a 0.2 µm syringe filter set. The solution with the dispersed nanoparticles was spin-cast onto the ITO electrodes at 3000 rpm for 90 seconds. Weighing the remaining nanoparticle powder revealed that PVAIA could keep around 30% more particles in dispersion. The films were dried and cross-linked under air at 100C for one hour and under vacuum at 60C for twelve hours. Pentacene (Aldrich, used as received) was thermally evaporated on top of the gate insulator at 0.7 - 1 Å/s for a total film thickness of 60 nm. Gold electrodes were deposited thereupon at 1 Å/s, with an electrode width of 2 mm and a channel length of 60 µm. The transistors were analyzed using two Keithley 2400 source/measure units. The capacitance measurements were performed on the obtained structures using commercially available capacitance meter working at 800 Hz (Iso-Tech 9023). The three transistors characterized and depicted below are examples of three groups of identically built and roughly identically performing transistors. 112
2.3.2 Results and Discussion
The leakage currents of ITO-(hybrid insulator)-Au devices are shown in Fig. 2.23.
Fig. 2.23. Leakage currents measurements through the polymer gate insulators: circles, squares, rhombi, and triangles depict the characteristics of pure PVAIA, PVAIA with some BaTiO3 (OFET-1), with more BaTiO3 (OFET-2), and PVA with BaTiO3 (OFET-3), respectively.
The circles depict the I(V) curves of a pristine PVAIA insulator, the squares a PVAIA insulator filled with BaTiO3 nanoparticles to achieve ε = 9 (OFET-1), the rhombi show PVAIA filled with BaTiO3 to achieve ε = 12 (OFET-2), and the triangles show PVA with BaTiO3, ε = 10.9 (OFET-3). The non-zero voltage offset is most likely due to a charging effect; the scan speed, however, was about 0.1 V/s and therefore, it is unlikely that the charging effect was due to charging of the nanoparticles in the matrix. It is conceivable, however, that it was due to migration of a small reminder of water molecules in PVA.
113
Fig. 2.24. Transfer characteristic of a PVAIA/BaTiO3 based transistor (OFET-2), ε = 12 (red solid line). Left curve shows the |ISD|1/2 vs. VG (blue solid line) and a linear fit (black dashed line). The inset shows the transfer characteristic of a transistor identical to the aforementioned except for ε = 9 (OFET-1).
Figure 2.24 shows the transfer characteristic of a PVAIA/BaTiO3 insulator transistor (OFET-2). The capacitance was found to be 62.5 nF/cm2, where the thickness of the insulator was 170 nm. This corresponds to ε of 12, or about twice the dielectric constant of pristine PVAIA. The mobility in the saturation regime was extracted from the left curve, a fit of the square root of the drain current versus the gate voltage, according to the equation 1.2.4 in Chapter 1. The mobility was found to be 0.12 cm2/Vs. The right curve, a logarithmic plot of the drain current versus the gate voltage shows the “on/off” ratio to be around 5x103 at 4V. Even more importantly, the threshold voltage is just VT = -1.2 V, and the subthreshold slope is exceptionally low for a solution processed organic insulator, namely 220 mV/dec. The data collected shows that the concept of filling an organic polymer to improve the dielectric constant is a very viable one. The only other alternative to spin-coated polymers is the use of polymers that form very stable thin 114
films, as proposed by Chua et al. [67]. The leakage currents for 170 nm of the filled polymer insulators are very comparable to those of the 50 nm stable thin films described in the reference, yet the dielectric constants of the filled polymer films described here is over 5 times higher, with substantially lower threshold voltages and presumably better subthreshold slopes (not reported in Ref. [67]). The inset of Fig. 2.24 shows another PVAIA/BaTiO3 transistor (OFET-1) with relatively fewer BaTiO3 nanoparticles incorporated into the insulator layer. The dielectric constant for this gate insulator was only ε = 9, or 50% higher than unfilled PVAIA. The mobility of the transistor, however, was higher at 0.4 cm2/Vs, largely identical to PVAIA/pentacene devices. In Fig. 2.25, a PVA/BaTiO3 transistor transfer characteristic is shown (OFET-3). The transistor is, except for using PVA instead of PVAIA, made completely identically to the one shown in Fig. 2.24. As mentioned before, PVA/water solutions are not as capable of dispersing BaTiO3 nanoparticles, and the dielectric constant is slightly lower.
Fig. 2.25. Transfer characteristic of a PVAIA/BaTiO3 based transistor (OFET-3), ε = 10.9 (red solid line). Left curve shows the |ISD|1/2 vs. VG (blue solid line) and a linear fit (black dashed line).
115
The capacitance of the 160 nm thick film was 61 nF/cm2, which corresponds to a dielectric constant of ε = 10.9. The mobility is higher than for the PVAIA device, namely 0.35 cm2/Vs, and the “on/off” ratio is 104. The threshold voltage is even better than for OFET-2, VT = -0.7 V, and the subthreshold slope is 210 mV/dec. The mobility compares well to an unfilled PVA/pentacene device, where it ranges from 0.6 - 0.9 cm2/Vs, even though the surface roughness is substantially higher in the case of the highly filled PVA. Figure 2.26 shows the surface roughness of the gate insulators of the three transistors presented here as measured with an atomic force microscope (AFM) in tapping mode.
Fig. 2.26. AFM surface analysis of the gate insulators used to build transistors: (a) OFET-2, (b) OFET-3, and (c) OFET-1. (note that OFET-2 and OFET-3 use the same thickness scale of 0 to 55 nm, whereas OFET-1 is shown with a 0 to 20 nm thickness scale.)
116
Figure 2.26b shows the PVA/BaTiO3 surface for OFET-3, and it is the roughest film of all three, with a maximum peak-to-peak height of 55 nm. Compared to Fig. 2.26a, the PVAIA/BaTiO3 surface of OFET-2, it appears that indeed the BaTiO3 nanoparticles tend to cluster more and are less dispersed in the film. It appears that the more polar co-monomers of PVAIA do help in distributing the nanoparticles better. The surface of the OFET-1 (characterized in the inset of Fig. 2.24) is depicted in Fig. 2.26c, and it is the smoothest of all films, with a peak-to-peak height of around 7 nm, close to the roughness of a pristine polymer film. Comparing OFET-1 and OFET-2, which are different only in the relative amount of BaTiO3 filling of the polymer insulator, it is seen that with a surface roughness reduced by a factor of four, the mobility increases roughly by the same factor. OFET-3, however, with a rather higher surface roughness compared to OFET-2, exhibits a higher mobility nonetheless. It appears that both the increased surface roughness of the highly filled PVAIA polymer film as well as the rather reactive co-monomers reduce the mobility of the pentacene semiconducting layer in OFET-2.
Barium Titanate, BaTiO3 Semiconductor
pentacene
V0
VT
S
Log
Ci
μMeas
FoM
[V]
[V]
[mV/dec]
[on/off]
[nF/cm2]
[cm2/Vs]
[nA/V2]
OFET-1
-1.4
-2.6
600
2.5
46.5
0.4
18.6
OFET-2
-0.2
-1.2
220
3.5
62.5
0.12
7.5
OFET-3
-0.2
-0.7
210
4
61
0.35
21.4
Device
Tab. 2.8. Summarised properties of OFETs studied here. The ‘figure-of-merit’ (FoM) is defined as the product of capacitance per area and mobility (μCi).
117
In conclusion, we have presented transistors with high capacitance insulators realized by filling a polymeric gate insulator with BaTiO3 nanoparticles. The use of a PVA or PVA-copolymer aqueous solution with dispersed nanoparticles has three major advantages to competing technologies. Firstly, it allows the materials to be deposited using all the solution-processing techniques already established in the field, while still yielding respectable dielectric constants. Secondly, the dielectric constant can be varied through variation of the solution and deposition parameters. Thirdly, the mobility of the pentacene semiconductor does not suffer very much from the more polar gate insulator, due to what we think is the high degree of coverage of the nanoparticles with the less polar polymer. The devices shown here exhibit excellent properties for organic transistors with solution processed gate insulators; namely dielectric constants of ε = 11…12, threshold voltages of VT = -0.8 … -1.2 V, subthreshold slopes of just over 200 mV/dec, while maintaining a mobility of up to 0.4 cm2/Vs. These devices have been achieved by using a polymer filled with inorganic nanoparticles, achieving high capacitance gate insulators and solution processable polymer insulators at the same time. Still, the use of capping layers, such as n-octadecyltrichlorosilane that can attach itself to both the polymer and the nanoparticles, may in the future improve the mobility without lowering the capacitance significantly. We strongly believe that these type of polymeric insulating layers filled with nanoparticles are therefore a very viable alternative to other high dielectric constant materials.
118
2.4. N-channel OFETs: NTCDI on anodised, OTS-modified Al2O3 To realize the most powerful and power-efficient families of logic elements, so called complementary logic circuits [68], both p- and n-channel transistors on the same substrate are required. Unfortunately, the vast majority of organic semiconductors for transistors are p-type, whereas n-type compounds are much rarer (cf. Chapter 1). This is caused very often by very strong inherent instability of n-type materials at ambient conditions (i.e. the materials react with oxygen and water under operating conditions). Haddon et al. [69], investigating behaviour of n-channel, C60-OFETs in ultra high vacuum, have found that the electron mobility in this material fell by 4 or 5 orders of magnitude upon exposure to air. De Leeuw et al. [70] have indirectly addressed the instability issue in n-type materials examining n-type doped (i.e. reduced) polymers and evaluating standard redox potentials for reactions with water and oxygen. They stated that the stability of n-type materials depended strongly on the value of the over-potential (i.e. free energy of activation) associated with the chemical processes (i.e., reaction either with water or oxygen). Therefore, careful tuning of the electron affinity of n-type materials has to be done in order to obtain thermodynamically stable devices, otherwise passivating layers or encapsulation has to be used. Alternatively, the incorporation of hydrophobic functionalities into the chemical structure of the organic semiconductor preventing from the penetration of water has been proposed [70]. Since then, numerous n-type materials and their derivatives have been synthesized and tested (e.g. TCNQ - tetracyanoquinodimethane, PTCDA - 3,4,9,10perylenetetracarboxylic dianhydride, DHF-nT - α,ω -diperfluorohexylsexithiophenes, F16CuPc - perfluorinated phtalocyanine, etc.) [71], however, either the materials were not stable under ambient conditions or displayed relatively poor electron mobilities. 119
More problems are caused by the very reactive, low work-function electrodes (e.g. Ca or Mg), which are used for effective electron injection. These metals have to be also protected from degradation. The common strategies are encapsulation or capping with more stable metals, for example, Al. Interestingly, Au is often used as electrodes in n-channel OFETs [72]. In many cases, the presence of the interfacial dipole between Au and organic semiconductors lowers the “effective” work function of gold by approximately 1 eV [73, 74]. Very recently, thiol-based self-assembled monolayers have been used to modify the work function of gold [75]. Furthermore, it has been noticed that despite similar value of available capacitance in p-channel OFETs presented earlier (i.e. pentacene and rr-P3HT transistors using anodised Al2O3 and TiO2 as gate insulators), these devices have shown very different values of onset voltage V0, even after modification by OTS self-assembled monolayer (cf. Tab. 2.4 2.7). The difference in V0 is approximately -1 V. Consequently, threshold voltage VT is also much higher (-0.23 V for TiO2 vs. -1.69 V for Al2O3). Intriguingly, subthreshold swing S is almost the same for all OFETs. The V0 behaviour can be explained by taking into consideration the presence of negative “fixed charges” (traps), which are usually found on Al2O3 surface, regardless of alumina processing [76]. These “hole-traps” should play a less significant role in n-channel OFETs allowing fabrication of devices with low switchon and low threshold voltages. In
this
chapter,
n-channel
OFETs
using
NTCDI
(1,4,5,8-
napthalenetetracarboxylic diimide) as the active layer and anodised, OTS-modified Al2O3 as gate insulator are presented. Stable, well operating n-channel transistors would make possible the fabrication of complementary logic circuits on extremely cheap, commercially offered substrates.
120
2.4.1 Experimental
Commercially available, aluminized (dAl ≈ 60 nm of thickness), flexible polyester films (Mylar®, DuPont Teijin Films) were used as substrates. Mylar® polyester film is highly resistant to the liquid phase of most chemicals and reagents [43]. The films were cut into slices (3.5 x 1.5 cm), degreased in acetone and methanol (HPLC Grade, both purchased from Aldrich), carefully washed several times in high purity deionised water (HPDW, Millipore Q, Rs > 1 MΩ⋅cm) and finally dried under compressed air. Subsequently, anodisation of aluminium was performed in the constant current mode (j = 0.5 mA/cm2) in 10-3 M Citric Acid (99+ %, Aldrich) to the desired voltage VA = 5 V, as described previously [14]. After oxide formation, the films were carefully washed again in HPDW. Prior to semiconductor deposition, the Al2O3 surface was modified via application of n-octadecyltrichlorosilane (OTS) self-assembled monolayer (SAM). OTS (90+ %, Aldrich) was deposited by solution-based technique described elsewhere [48]. Durable, self-assembled OTS monolayers can be formed on silica, alumina, and other metal oxides at room temperature (RT). Vitally, the silanisation treatment should be performed below threshold temperature TC of the SAM formation (TC of OTS ≈ 28C). Only below TC a well-ordered monolayer may be formed. Therefore, to get very dense monolayers and slightly shorten the time of SAM deposition, the anodised films were dipped in the silanisation solution cooled down to 5o C, for 20 minutes. NTCDI was obtained from The University of Manchester (The Group of Prof. M. L. Turner) and was used as received without further purification. The material was evaporated on OTS-modified samples under high vacuum conditions (< 5x10-7 Torr) with nominal rate of 3 Å/sec keeping the substrates at 100C. The thickness of the deposited film was controlled during evaporation, and after deposition.
121
Fig. 2.27. Schematic structure of the fabricated top-contact OFETs using NTCDI as active layer. For comparison purposes, transistors using 100 nm of thermally grown, OTS-treated SiO2 were also fabricated. OTS: n-octadecyltrichlorosilane.
Dektak profilometer measurements revealed that NTCDI thickness was approximately 45 nm. Capacitors and top-contacts transistors (Fig. 2.27) were completed by evaporation of aluminium contacts under high vacuum (< 10-6 Torr) through a shadow mask on the OTS-treated Al2O3 and on the top of NTCDI, respectively. The channel width was W = 2 mm, and channel length L = 25 µm. Capacitance was measured on at least 4 aluminium squares (A = 0.04 cm2) using commercially available capacitance meter operating at 800 Hz (Iso-Tech 9023). All transistor characteristics were performed at ambient conditions. Transistors were contacted via Karl Süss MicroTech PH100 miniature probe heads to two Keithley 2400 Source-Measure Units (SMUs), which controlled source-drain (VSD) and gate (VG) voltages. The SMUs have a constant current offset of around -2x10-10 A, which is the smallest current measured reliably. To compare performance of the OFETs using anodised, OTS-modified Al2O3 as the gate insulator, at the same time, transistors on 100 nm thermally grown, OTSmodified SiO2 on n-doped (Arsenium) Si (University Wafer, resistivity: 10-3 - 5x10-3 Ωcm, orientation: 100) were also fabricated.
122
2.4.2 Results and Discussion
Figures 2.29a/b and 2.30a/b show output (a) and transfer (b) characteristics of NTCDI-OFETs with OTS-modified insulators, thermally prepared SiO2 and anodized Al2O3, respectively. The curves are typical for n-channel OFETs working in accumulation mode. However, the non-linear increase of ISD in the low VSD region indicates large problems with electron injection from Al source into NTCDI (Fig. 2.28a) (cf. Chapter 1, Fig. 1.3.10a). Transfer characteristics of the same device (Fig. 2.28b) also shows a clear “bend” in the 3 V < VG < 12 V region, which additionally confirms the presence of a high injection barrier. The non-ohmic contacts may be caused by the presence of an interfacial dipole at the metal/semiconductor interface or by a large mismatch between the work function of aluminium (ΦAl) and the electron affinity of NTCDI (Ea) [72]. The high injection barrier, clearly visible in the output characteristics (Fig. 2.28a and Fig.2.29a), may be responsible for the presence of ISD hysteresis and relatively low, calculated using standard OFET theory [cf. Chapter 1], electron mobility µ = 10-4 cm2/Vs. Katz et al. [77], investigating NTCDI-OFETs on thermally grown 300 nm SiO2 on doped Si wafer as gate insulator/gate contact, with Au source/drain electrodes, have found that transistor operation was rarely observed with bottom Au contacts, whereas top Au contacts resulted in high performance devices. However, the output characteristics shown (Fig. 4a in Ref. [77]) contained small negative currents for VSD = 0, the sign of leakage through the gate insulator, which could mask the injection problems. Nevertheless, the subsequent modification of bottom Au contacts with 2-chlorobenzyl mercaptan gave well-working devices, which performance often exceeded those of the top-contact controls (µ = 0.12 cm2/Vs with thiol-modified bottom Au electrodes).
123
600
(a)
Source-Drain Current, ISD [nA]
500
40 V
400 35 V
300
30 V 200 25 V
100
20 V 15 V 10 V
0 5
1x10
(b)
10
15
20
30
25 35 Source-Drain Voltage, VSD [V]
40
45
-6
35
VSD = 35 V 28
1x10-8
21
-9
14
Source-Drain Current, ISD [A]
1x10
1x10
-10
1x10
-11
(ISD)1/2 [(nA)1/2 ]
-7
1x10
7
0 -20
-10
0
10
20
Gate Voltage, VG [V]
30
40
50
Fig. 2.28. (a) Output characteristics of an NTCDI-OFET using highly doped Si/100 nm thermally grown, OTS-modified SiO2 as gate insulator. (b) Transfer characteristics of the same device (pink diamonds) and |ISD|1/2 vs. VG = VSD (black diamonds).
124
In this study, anodized, OTS-modified Al2O3 as gate dielectric is also explored (Fig. 2.29a/b). As a result of the much lower insulator thickness (≈ 6.5 nm Al2O3 + 2.8 nm OTS), high capacitance (Ci ≈ 400 nF/cm2) was achieved. High Ci allowed lowering the operational voltage of transistors down to VG ~ 5 V. Additionally, subthreshold swing S and FoM of the NTCDI-OFET on OTS-modified alumina are far superior to OTS-modified SiO2. Moreover, switch-on and threshold voltages are much reduced (Tab. 2.9). Nevertheless, due to the existence of the larger injection barrier, the output characteristics are even more disturbed than in the case of OTS-modified SiO2. Apart from the strong curvature in the low VSD region and relatively large ISD hysteresis, there is no clear saturation of source-drain currents. Consequently, the calculated values of transistor parameters (Tab. 2.9) are likely to be strongly affected by non-ohmic contacts. However, threshold voltage VT, even in the presence of the injection barrier, is relatively low and positive resulting in normally-“off” transistors. It has been accepted that many dielectrics exhibit “fixed charges” (Qf) on their surfaces. The source of Qf is thought to originate from the detailed bonding of the atoms associated with the dielectric near the dielectric/semiconductor interface. Therefore, to obtain a flat band condition a voltage V = V0 ≠ 0 has to be applied. The amount of fixed charges can be related to the measured V0 value by the following expression [78]:
V0 = Φ MS ±
Qf C ac
(eq. 2.4.1),
where, ΦMS is the work function difference between the metal and semiconductor, and Cac is the measured capacitance in accumulation.
125
80
70 4V
Source-Drain Current, ISD [nA]
60 3.5 V 50
40
3V
30
2.5 V
20
2V
10
1.5 V 1V 0.5 V
0 1
0
3
5
2 4 Source-Drain Voltage, VSD [V]
6
Fig. 2.29. (a) Output characteristics of an NTCDI-OFET using commercial, flexible Mylar/Al substrate with ultra-thin, anodized, OTS-modified Al2O3 film (d ≈ 6.5 nm).
1x10-7
8
1x10-8
6
1x10-9
4
1x10-10
2
1x10-11
(ISD)1/2 [(nA)1/2 ]
Source-Drain Current, ISD [A]
VSD = 4 V
0
-1
0
1
2
Gate Voltage, VG [V]
3
4
5
Fig. 2.29. (b) Transfer characteristics of the same device (pink diamonds) and |ISD|1/2 vs. VG = VSD (black diamonds).
126
Silicon dioxide, SiO2/Aluminium oxide, Al2O3 Semiconductor NTCDI
V0
VT
S
Log
Ci
μMeas
FoM
[V]
[V]
[V/dec]
[on/off]
[nF/cm2]
[cm2/Vs]
[nA/V2]
SiO2 + OTS
-1
4.70
4.0
4.6
32.1
3.5x10-4
0.01
Al2O3 + OTS
+0.1
0.24
0.8
3
385
2.5x10-4
0.1
Insulator
Tab. 2.9. Summarised properties of OFETs studied here. The ‘figure-of-merit’ (FoM) is defined as the product of capacitance per area and mobility (μCi).
The sign of the fixed charge is also important, as negative fixed charge correlates with the plus sign in eq. 2.4.1, and positive fixed charge correlates with the minus sign. It should be noted that for SiO2 and Al2O3 only negative fixed charges are reported, but both positive and negative Qf have been observed for several high-k dielectrics (e.g., ZrO2, HfO2, Y2O3, La2O3, TiO2) [79, 80]. Substantial amount of fixed charges represents significant issues for CMOS (complementary metal oxide semiconductor) applications. Given the scaling limitations on applied voltages due to power consumption, shifts in the V0 value are undesirable and have to be minimized. In some applications, biasing the substrate to compensate for the fixed charge has been proposed [81]. Moreover, a reproducible V0 (or VT) value is also required for stable, reliable transistor operation. Thus, hysteretic changes in the V0 from voltage cycling of less than 20 mV are often required [79]. If fixed charge is determined to be large and difficult to minimize and control in highk dielectrics, it will be a significant issue for obtaining the desired device performance on both n- and p-channel transistors (as in the case of NTCDI/pentacene on Al2O3 dielectric, respectively).
127
In conclusion, low voltage n-channel OFETs using NTCDI as the active layer, OTS-modified Al2O3 as gate insulator, and Al source/drain contacts are reported. Unfortunately, the performance of these devices is severely hindered by the large injection barrier at the source electrode. Control OFETs on highly doped Si/OTS-modified SiO2 display the same injection limitations. However, despite the poor performance and the injection barrier, threshold voltages in both types of devices are much smaller than in the case of p-channel transistors, suggesting that the negative “fixed charges” present on the SiO2 and Al2O3 surfaces should result in better n-channel than p-channel activity of the OFETs using these OTS-modified dielectrics.
128
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See
“The
International
Technology
Roadmap
for
Semiconductors”,
Semiconductor Industry Association 1999
133
Chapter 3
All-organic permanent memory device
Organic FETs, due to their slower charge transport, can not compete with silicon technology in high speed applications, however, they can appear in the near future in “low-end”, inexpensive devices as radio-frequency identification devices (RFIDs), intelligent cards and badges, electronic paper or inexpensive, disposable active-matrix displays, radically lowering the total cost of their production. Moreover, the unique combination of their properties (low-weight, flexibility and compatibility with plastic substrates) opens new possibilities in the design of future electronic devices. However, to completely take the advantage of this technology and realize “all plastic” mobile computing, necessary organic data storage has to be quickly developed and implemented. In this chapter, a solution to this problem, an organic permanent memory device (FerrOFET) is presented. The FerrOFET is a single transistor memory device built using the usual OFET processing techniques. The memory retention is due to the ferroelectric-like permanent polarization of the material used as the gate insulator. The FerrOFET exhibits relatively low voltage operation, high current modulation (> 105), short programming times (< 200 ms) and comparatively long stability (retention time). The excellent parameters of the presented device enable the FerrOFET to be the memory of choice for many organic electronic circuits.
134
3.1 Properties of ferroelectrics In a normal dielectric material (i.e. non ferroelectric), positive and negative charges will be displaced from their original position (a concept characterized by the dipole moment or polarization [1]) by an electric field, however, this polarization will disappear when the electric field returns back to zero. The polarization of a dielectric is characterized by the following relationship [2]:
P(r) = lim
∑p ΔV
ΔV →0
ΔV
(eq. 3.1)
where p = Ql is the dipole moment for two opposite point charges. Q is the charge magnitude of each point charge and l is the spatial vector from the negative to the positive point charge. ΔV is the volume over which the average is taken and r is the location vector. When a dielectric is placed in an electric field, there will be a slight displacement of the electron cloud with respect to the nucleus in each atom, generating a small electric dipole. Assuming uniform distribution of dipoles in the bulk, it can be noted that the surface charge density on dielectric’s surface is equal in magnitude to the polarization. The dielectric displacement D is related to the polarization via the linear expression [3]:
D = ε0 E + P
(eq. 3.2).
where the constant ε0 = 8.854x10-12 F/m is the permittivity of free space. By applying this equation to a capacitor, E = V/d corresponds to the electric field across the capacitor, with d the insulator thickness, and D.A the total stored charge on
135
the capacitor, with A the capacitor plate area. It can be noticed from the eq. 3.2 that the total charge on the capacitor is due to the superposition of two sources of charge: ε0E, which is the charge in the absence of the dielectric, and P, which is the additional charge, introduced by a dielectric placed between the electrodes. For linear dielectrics, P is proportional to E, and eq. 3.2 can thus be simplified and expressed as
D = ε 0 εE
(eq. 3.3)
wherein ε = (χ +1) is the dielectric permittivity, and χ = αn0 describes the dielectric susceptibility and equals zero in vacuum (α is constant for a given dielectric and n0 is the concentration of molecules) [3]. Piezoeletrics, pyroelectrics and ferroelectrics are a group of insulating materials exhibiting, in a given range of temperatures, internal, spontaneous polarization (i.e. electric moment per unit volume), which can be altered under the influence of stress, temperature changes and an external electric field, respectively [4].
Generally, the material can be either piezo-, pyro- or ferroelectric if its crystalline symmetry lacks an inversion centre. From the 32 crystallographic point groups 20 classes lack a centre of inversion and are classified as piezoelectrics, 10 of these 20 classes have a unique polar axis and possess a spontaneous polarization and are pyroelectric, and only a restricted group of pyroelectrics have the further property of being ferroelectric (cf. Tab. 3.1 and Fig. 3.1).
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Crystal system Triclinic
Tetragonal
Hexagonal
Monoclinic Orthorhombic
Trigonal
Cubic
Symbol International 1 1 4 4 4/m 422 4mm 42m 4/mmm 6 6 6/m 622 6mm 6m2 6/mmm 2 m 2/m 222 mm2 mmm 3 3 32 3m 3m 23 m3 432 43m m3m
Schoenflies C1 C1 C4 S4 C4h D4 C4v D2d D4h C6 C3h C6h D6 C6v D3h D6h C2 Cs C2h D2 C2v D2h C3 S6 D3 C3v D3d T Th O Td Oh
Centrosymmetric
Piezoelectric
Pyroelectric
3
3
3 3
3
3 3
3 3 3
3
3 3 3 3
3
3 3 3
3
3 3
3 3
3 3
3
3
3
3 3
3
3
3 3 3 3 3 3 3 3 3
Tab. 3.1. The 32 crystallographic point groups arranged by crystal systems. A tick (3) indicates that the point group is centrosymmetric, piezoelectric, or pyroelectric [3].
Fig. 3.1. Schematic of various subclasses of insulating materials.
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There is as yet no general basis for deciding whether a pyroelectric material will also be ferroelectric. A crystal is regarded as ferroelectric when, in the absence of an external electric field, it possesses regions (domains) exhibiting spontaneous polarization. Upon the application of an electric field the domains can be oriented (“switched”) in the direction similar to the direction of the applied field. In ferroelectric materials, P is not only function of E, but also depends on the previous poling history of the material. Therefore, the instantaneous voltage across a ferroelectric capacitor does not provide enough information to determine the capacitor charge. Consequently, it is not possible to express D as a closed form of E. However, as the polarization in ferroelectric materials is typically at least two or three orders of magnitude higher than ε0E [3], eq. 3.2 can be approximated by:
D≅P
(eq. 3.4).
Thus, the magnitude of the total surface charge density on a ferroelectric capacitor is equal to that of the polarization. The polarization can be separated into two fundamental components of electronic polarization and ionic polarization. The terms electronic and ionic refer to the electronic cloud and ionic displacements with electric field, respectively. Ionic displacement, in turn, can be elastic or inelastic. If the electric field is removed from the material, the electron clouds and ions are displaced only slightly with respect to their initial position (i.e. their positions in the presence of the electric field). Ions, which are displaced through an inelastic mechanism, keep their positions even after the removal of the electric field (e.g. Ti4+ or Zr4+ in PZT [4]) and are responsible for the polarization in ferroelectrics as compared to “ordinary” dielectrics.
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B A
A’
Fig. 3.2. A typical hysteresis loop characteristic for ferroelectric materials [5].
In ferroelectric materials, spontaneous polarization can occur where the electrical polarization can be reoriented between its “different equilibrium” orientations by applying an electric field. This gives rise to a ferroelectric hysteresis loop between applied electric field and the polarization change as illustrated in Fig. 3.2. In the figure horizontal and vertical axes are the electric field E and the polarization P, respectively. P can be replaced by D if one assumes ε0E
