An Efficient Boost Chopper Integrated with Cryogenic ... - IEEE Xplore

This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TASC.2016.2599112, IEEE Transactions on Applied Superconductivity

1

An Efficient Boost Chopper Integrated with Cryogenic MOSFETs and HTS Inductor Xiao Yuan Chen, Jian Xun Jin, Mian Gang Tang, Juan Feng, Hong Yan Luo, Lin Yu Li, Qiang Xu, and Hui Lin Zou

Abstract—A novel efficient boost chopper integrated with two cryogenic metal-oxide semiconductor field-effect transistors (MOSFETs) and one high temperature superconducting (HTS) inductor is presented. State-of-the-art CoolMOSTM MOSFETs are introduced and immersed in liquid nitrogen to save about 85% of conduction losses. Considering the anisotropy of gadolinium barium copper oxide (GdBCO) tapes, ferromagnetic disks with raised edges are optimized to enhance the critical current and reduce the hysteresis loss of the HTS smoothing inductor. As compared to the conventional boost chopper composed of ambient-temperature power electronics and a copper inductor, the total operational loss from the cryogenic MOSFETs and HTS inductor in the proposed cryogenic boost chopper is reduced by 87% in the case of a 40-kW chopper. Index Terms—cryogenic chopper, cryogenic MOSFET, HTS inductor, ferromagnetic disk, critical current.

I. INTRODUCTION

C

of power electronics has the significant advantages of increased power density and improved energy efficiency compared to their ambienttemperature counterparts. In theory, metal-oxidesemiconductor field effect transistors (MOSFETs) in cryogenic environments can achieve the lowest conduction loss among all kinds of power electronics due to their resistive nature and novel device structures such as super junctions [1]. For instance, the turn-on resistances of OptiMOSTM MOSFETs and CoolMOSTM MOSFETs with drain-source breakdown voltages under 250 V and above 500 V have been reported to be reduced by about 50% at 150-200 K [2] and about 15% at 50-100 K [3], respectively. It should be noted, however, that bipolar junction transistor devices such as insulated gate bipolar transistors (IGBTs) have negative temperature gradient threshold voltages, which lead to higher conduction losses at lower operational temperatures [1],[4]. With cryogenic operation of power MOSFETs, their obvious reductions in turn-on resistance can be well expected RYOGENIC OPERATION

Automatically generated dates of receipt and acceptance will be placed here; authors do not produce these dates. This work was supported in part by the General Program for Applied Fundamental Research Project of Sichuan Province under Grant 2016JY0163, General Fund Project of Sichuan Provincial Department of Education under Grant 16ZB0162, Scientific Research Foundation of Sichuan Normal University under Grant No. SYJS2016034 and ZZYQ2016011. (Corresponding author: Jian-Xun Jin) X. Y. Chen, M. G. Tang, J. Feng, H. Y. Luo, L. Y. Lin, Q. Xu and H. L. Zou are with the School of Engineering, Sichuan Normal University, Chengdu 610101, China (email: [email protected]). J. X. Jin is with the Center of Applied Superconductivity, School of Electrical Engineering and Automation, Tianjin University, Tianjin 300072, China (e-mail: [email protected]).

to improve the power conversion efficiency in various power electronic circuits such as boost choppers, buck choppers and boost-buck choppers. They need certain refrigeration equipment, however, which might add extra volume, weight, and capital cost to the overall system. Fortunately, applications with high temperature superconducting (HTS) power devices make it possible to cool the MOSFETs effectively with their existing cryogenic environment [5],[6]. This lays the basic foundation for developing a high-efficiency cryogenic power conditioning system to connect the HTS components inside the cryogenic Dewar with external electrical devices at ambient temperature. In additional to the conduction losses from the MOSFETs, the energy smoothing inductors needed in most power electronic circuits also affect the practical power conversion efficiency due to their internal resistance. HTS coils or inductors wound from HTS tapes having nearly zero resistance can be used to replace their conventional copper counterparts. A number of HTS coils have been widely used to develop various high-efficiency power devices [7] such as HTS generators, HTS transformers, HTS reactors, etc. To integrate the ultra-low turn-on resistance feature of a cryogenic MOSFET and the nearly zero resistance effect of the HTS inductor in one power electronic circuit, this work proposes a new cryogenic boost chopper integrated with two cryogenic MOSFETs and one HTS inductor. The principle of the circuit and its digital control method are presented in Section II. The HTS inductor formed by two double-pancake coil units is designed in Section III by introducing optimized ferromagnetic disks. Finally, energy efficiency analysis and comparisons of two 40-kW boost choppers designed by cryogenic and conventional schemes are discussed in Section IV by considering the conduction losses from the MOSFETs and hysteresis losses from the HTS inductor. II. CIRCUIT PRINCIPLE AND DESIGN A. Circuit Principle Fig. 1 shows the circuit topology of the proposed cryogenic boost chopper. Two cryogenic MOSFETs (S1, S2) and one HTS inductor L are immersed in liquid nitrogen (LN2) in the cryogenic Dewar. Besides the two steady operational states, the charge state and the discharge state, in the conventional boost chopper formed by one MOSFET S1 and one diode D2, the proposed boost chopper has one more temporal discharge state to avoid the short-circuiting of the energy smoothing capacitor C. By defining the turn-on or turn-off status of each MOSFET as “1” or “0”, all the operational states can be digitized, as shown in Fig. 2 and Fig. 3. The MOSFET S1 is

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2 closed in the charge state (“10”) to connect the DC power source Uin to the HTS inductor L, whereas it is opened in the temporal discharge state (“00”), and the MOSFET S2 is subsequently closed in the discharge state (“01”) to connect the HTS inductor L to the energy smoothing capacitor C and resistive load R. Repeating the above fast charge-discharge operations, the output voltage Uout applied to the resistive load can be obtained by U out =

Tcycle Toff

× U in

(1)

where Tcycle is the switching cycle; Toff, the turn-off time duration of the MOSFET S1 in each switching cycle.

conduction loss from the diode D2 is negligible during the ultra-short temporal discharge period, e.g. 50-100 µs. III. HTS INDUCTOR DESIGN AND STRUCTURAL OPTIMIZATION A. Structural Design of HTS Inductor For the HTS inductor design, gadolinium barium copper oxide GdBCO tape from SuNAM was adopted: average width - 12 mm; average thickness - 0.1 mm; critical current - 600 A at 77 K, self-field. The total thickness of the GdBCO tape after insulation treatment was set as 0.2 mm. When an external field having magnitude Bm and orientation θ is applied, the anisotropy of the critical current Ic(B//, B⊥) can be empirically described by [8]  γ − 2 B //2 + B⊥2 I c ( B // , B⊥ ) = I c 0 × 1 +  B1 

   

−α

(2)

where B// and B⊥ are the parallel and perpendicular field components to the widest surface of the GdBCO tape respectively (B// = Bmcosθ, B⊥ = Bmsinθ); B1 = 20 mT, γ = 5, and α = 0.65 are anisotropic factors. Fig. 1. Circuit topology of the proposed cryogenic boost chopper. TABLE I MAIN PARAMETERS OF CRYOGENIC AND CONVENTIONAL BOOST CHOPPERS

(a) (b) (c) Fig. 2. Three operational states of the proposed cryogenic boost chopper. (a) Charge state. (b) Temporal discharge state. (c) Discharge state.

Parameter

Cryogenic chopper

Conventional chopper

No. of MOSFETs

4×2

4×1

No. of diodes

0

4×1

Breakdown voltage

490 V

700 V

Continuous drain current

300 A

300 A

Operation voltage

200-400 V

200-400 V

Operation current Unit consumed power at 50 A

200-300 A

200-300 A

MOSFET

6.4 W

42.5 W

Diode

N/A

39.0 W

77 K

300 K

Operation temperature

TABLE II MAIN PARAMETERS OF HTS GDBCO INDUCTOR Fig. 3. Digital state diagram of the proposed cryogenic boost chopper.

B. Conceptual Design To evaluate the energy efficiency and dynamic performance of the proposed cryogenic boost chopper, two 40-kW boost choppers designed with cryogenic and conventional schemes are modeled and presented in Table I. Four parallel 700-V/75A CoolMOSTM MOSFET units IPW65R019C7 serve as one power switch to achieve 300-A continuous drain current capacity. In the conventional boost chopper at ambient temperature, conduction losses of the MOSFET S1 and diode D2 at 50 A are about 42.5 W and 39.0 W, respectively. However, when the two MOSFETs (S1, S2) are immersed in LN2 at 77 K, their corresponding values are significantly reduced to about 6.4 W, i.e. 85% reduction. In addition,

Item

Iron core

HTS winding

Cryostat

Parameter

Value

Type

Three-limb stalloy

Diameter

50 mm

Cross section

1963 mm2

Window height

250 mm

Window width

90 mm

Type

Double-pancake coil

Inner / outer diameter

130 mm / 133.6 mm

Height (per coil unit)

32 mm

No. of total turns

36

Type

GFRP dewar

Inner / outer diameter

70 mm / 210 mm

Height

180 mm



3

B. Critical Current Optimization In the designed HTS inductor, the parallel field component accounts for the vast majority of the total magnetic field distributed in the middle area of each double-pancake coil, whereas the perpendicular field component becomes larger as the location gets closer to the two coil ends [9]. Due to the strong anisotropic magnetic field dependence obtained from Eq. (2), the critical current degradation caused by the perpendicular field component is more serious than that caused by a parallel field component with the same magnitude, and thus results in obvious critical current degradation for the superconducting layer located at the two coil ends. This will diminish the critical current of the whole HTS inductor, and even generate some local overheated points. To improve the critical current located at the two coil ends, two ferromagnetic disks with raised edges are introduced to be installed above the two coil ends in each double-pancake coil. The high permeability from the ferromagnetic material makes them available to divert the magnetic flux and thus to adjust the magnetic field orientations near the two coil ends. Fig. 4 shows the geometry and location of the ferromagnetic raisededge disk above the upper coil layer in one double-pancake coil: tiron - the thickness of the ferromagnetic flat disk, wiron the extended width compared to the radial width of the upper coil layer, hiron - the distance to the upper edge of the upper coil layer, wedge - the width of the raised ferromagnetic edge, hedge - the thickness of the raised ferromagnetic edge. In the simulation model built in COMSOL software, the structural parameters of each ferromagnetic disk are as follows: tiron =1 mm, hiron = 1 mm, wiron = 2 mm, wedge = 1 mm, hedge = 0-7 mm. Fig. 5 and Fig. 6 show the perpendicular field and critical current distribution inside one double-pancake coil when the coil current IL = 300 A. It can be seen that the high-field areas located at the two coil ends in Fig. 5(a) are obviously reduced to much smaller areas when the two ferromagnetic flat disks is applied in Fig. 5(b). Accordingly, the corresponding average critical currents (Icavg1, Icavg2) of the upper and lower coil layers are improved from (253.42 A, 254.47 A) to (267.08 A, 266.82 A) in Fig. 7Some marginal high-field areas still exist, however, and their resulting low-critical-current areas are shown in Fig. 5(b) and Fig. 6(b), respectively.

Fig. 4. Geometry and location of the ferromagnetic raised-edge disk.

(a) (b) (c) (d) (e) (f) (g) Fig. 5. Perpendicular field distributions when IL = 300 A. (a) Without ferromagnetic disk. (b) hedge = 0 mm. (c) hedge = 1 mm. (d) hedge = 2 mm. (e) hedge = 3 mm. (f) hedge = 5 mm. (g) hedge = 7 mm.

(a) (b) (c) (d) (e) (f) (g) Fig. 6. Critical current distributions when IL = 300 A: (a) Without ferromagnetic disk. (b) hedge = 0 mm. (c) hedge = 1 mm. (d) hedge = 2 mm. (e) hedge = 3 mm. (f) hedge = 5 mm. (g) hedge = 7 mm.

320 300 Icavg1 , Icavg2 [A]

Table II shows the main parameters of the designed HTS inductor. The core diameter is set as 50 mm, and the corresponding effective cross-sectional area is about 1963 mm2 in the three-limb stalloy iron core. The height and width of the core window are 250 mm and 90 mm, respectively. The HTS winding consists of two double-pancake coils, with each coil wound by 18 turns. Its inner diameter, outer diameter, and height are 130 mm, 133.6 mm, and 32 mm, respectively. The gap between the two axial layers in one double-pancake coil is 8 mm. The gap between the two double-pancake coils is 50 mm. The whole HTS winding is inserted into a glass-fiber reinforced plastic (GFRP) Dewar and then installed on the middle iron limb symmetrically. The height of the air gap located at the center of the middle iron limb is set as 1 mm and thus produces about 3-mH leakage inductance.

280 260 240

I cavg1

220

I cavg2

200

0

1

2

3 4 hedge [mm]

5

6

7

Fig. 7. Relations between the critical currents (Icavg1, Icavg2) and hedge.

To further reduce the marginal high-field areas, the thickness hedge of the raised ferromagnetic edge could be enlarged to adjust the magnetic field orientation to be as close as possible to a parallel angle. From Fig. 5 and Fig. 6, the



4 marginal high-field areas become smaller as the hedge increases from 0 mm to 3 mm. When hedge ≥ 3 mm, however, the magnetic field lines near the lower edge are make a gradual change to first flow preferentially through the edge rather than flowing through the flat disk directly, as shown in Fig. 5(e)-(g). This phenomenon will cause an obvious increase in the perpendicular field around the lower edge and thus diminish the critical currents inside the GdBCO tapes, as shown in Fig. 6(e)-(g). Therefore, a suitable hedge value should be practically selected for achieving the optimal critical current distribution of the designed HTS inductor. As shown in Fig. 7, the maximum Icavg1 obtained at hedge = 3 mm is about 311.16 A, whereas the Icavg2 obtained at hedge = 2.5 mm is about 293.18 A.

If the peak value, valley value, and root-mean-square (rms) value of the load current are defined as Irlh, Irll and Irms, the simulated relations between the operational currents (Irlh, Irll, Irms) and f are shown in Fig. 10. Similarly, the load current ripple also shows an exponentially decreasing trend as f increases. When f ≥ 200 Hz, the rms load current value is increased to about 99.71 A or above. This value corresponds to ≤ 0.29% load voltage deviation and ≤ 0.58% load power deviation as compared to an ideal 40-kW/400-V/100-A boost chopper. Therefore, practical current and power ripples in the cryogenic boost chopper with a relatively large-capacity HTS inductor can be well expected to be comparable to those in a conventional boost chopper, even under the condition of lowfrequency switching operation, e.g. several hundred Hertz.

IV. SIMULATION ANALYSIS AND PERFORMANCE EVALUATION

250

IL(t)

I sch , I scl, Idc [A]

Iscl

400

Idc

300 200 100 0 -100 -200

100 150 200 250 300 350 400 450 500 f [Hz] Fig. 9. Relations between the operational currents (Isch, Iscl, Idc) and f.

0

50

105

100 Irlh

95

Irll Irms

90 85

101 100

200 99

150

IR(t) [A]

IR(t) IL(t) [A]

Isch

500

102

300

100

600

Irlh , Irll, Irms [A]

A. Current Ripple Analysis As mentioned in Sections II and III, the 40-kW cryogenic boost chopper has been conceptually designed by using two 300-A cryogenic power switch assemblies and one 3-mH HTS inductor. To carry out the energy efficiency analysis and dynamic performance evaluation, a circuit simulation model has been built in the Matlab/Simulink software. The output voltage Uin of the DC power source, the capacitance C of the energy smoothing capacitor, and the resistance R of the resistive load are set as 200 V, 10 mF, and 4 Ω, respectively. The duty ratio Toff/Tcycle where Tcycle is the cycle period, of each MOSFET is set as 50%, with the aim being to convert the 200-V source voltage to a 400-V load voltage. Fig. 8 shows the transient coil current IL(t) and its corresponding load current IR(t) when the operational frequency f = 1/Tcycle = 200 Hz. It can be seen that the transient coil current IL through the HTS inductor and transient load current IR through the resistive load fluctuate up and down around about 200 A and 100 A, respectively.

98

2

2.005

2.01 t [s]

2.015

97

2.02

Fig. 8. Transient coil current and load current waveforms when f = 200 Hz.

If the peak value, valley value, and average value of the coil current are defined as Isch, Iscl and Idc, the simulated relations between the operational currents (Isch, Iscl, Idc) and f are shown in Fig. 9. The coil current ripple shows an exponentially decreasing trend as f increases. When f ≥ 200 Hz, the peak coil current value is reduced to about 281.34 A or below. This value is smaller than both the 300-A continuous drain current capacity from the cryogenic power switch assembly and the 293.18-A average critical current from the HTS inductor.

0

50

100 150 200 250 300 350 400 450 500 f [Hz] Fig. 10. Relations between the operational currents (Irlh, Irll, Irms) and f.

B. Energy Efficiency Analysis on Cryogenic MOSFETs In the proposed cryogenic boost chopper, the main conduction losses Ppro are generated from the two cryogenic MOSFETs (S1, S2). When IL = 200 A, the total conduction loss is reduced from about 170 W at 300 K to 25.5 W at 77 K. This value is down to about 15.6% of that in the conventional boost chopper (Pcon ≈ 163 W). In addition, the operational frequency f has a certain effect on the practical conduction loss, as shown in Fig. 11. With increasing f, Ppro and Pcon are reduced exponentially and then approach gradually to about 25 W and 162 W, respectively. C. Energy Efficiency Analysis on HTS Inductor Although the transient coil currents are below the average critical currents (Icavg1, Icavg2) of the upper and lower coil layers in each double-pancake coil unit, real-time current changes in



5 each switching cycle will cause some inevitable hysteresis losses inside the GdBCO tapes [10],[11]. The coil current data in Fig. 8 can be divided into a DC current component Idc and an AC current component with a magnitude of Iacm, as shown in Fig. 12. The Idc increases to 200 A when f ≥ 200 Hz, whereas the Iacm decreases exponentially as f becomes larger. Due to the proportionality relations among the hysteresis loss, frequency, and magnitude of the AC current component, there exists a maximum hysteresis loss value inside the GdBCO tapes. From Fig. 13, it can be seen that the two hysteresis losses (Phys1, Phys2) of the upper and lower coil layers rise initially and then drop exponentially. The maximum values found at 150 Hz are about 0.99 W/m and 1.12 W/m, respectively. Considering the tape usage of 14.91 m in the designed HTS inductor in Table II, the total hysteresis loss should be equal to or less than about 15.73 W at 77 K.

Pcon

Pcon [W]

275

Ppro

250

45 40

225

35

200

30

175

25

150

TABLE III OPERATIONAL LOSS COMPARISONS BETWEEN CRYOGENIC AND CONVENTIONAL BOOST CHOPPERS

50

0

50

Ppro [W]

300

100 150 200 250 300 350 400 450 500 f [Hz]

Fig. 11. Relations between the conduction losses (Pcon, Ppro) and f.

350

Iacm , Idc [A]

to be about 2.61 mΩ by considering a common currentcarrying density of 2 A/mm2 and an electrical resistivity of 0.0175 Ω·mm2/m. When IL = 200 A and f = 400 Hz, the copper inductor will generate a lossy power of about 104.37 W, which is about 6.63 times that in the HTS inductor. Table III sums up the operational loss comparisons between the cryogenic and conventional boost choppers at 400 Hz. As compared to the conventional boost chopper built from ambient-temperature power electronics and a copper inductor, the total operational loss in the proposed cryogenic boost chopper is reduced from about 267.47 W to about 34.67 W, i.e. an 87% reduction. Such a 34.67-W operational loss causes the evaporation of LN2 inside the cryogenic Dewar. Considering the latent heat of 161 kJ/L at one atmosphere, 18.6-L LN2 will be consumed per day in the proposed cryogenic boost chopper.

300

Iacm

250

Idc

200 150 100 50 0

0

50

100 150 200 250 300 350 400 450 500 f [Hz] Fig. 12. Relations between the operational currents (Iacm, Idc) and f.

Phys1 , Phys2 [W/m]

1.0

[3]

0.4

50

34.67 W

77.82 W

104.37 W 267.47 W

REFERENCES [1]

[2]

0

Total

8.89 W

A novel cryogenic boost chopper constructed from cryogenic MOSFETs and a HTS inductor has been presented and verified to improve the overall power conversion efficiency. Considering the ultra-low turn-on resistance feature from the cryogenic MOSFETs, the conduction loss in a 40-kW chopper case is reduced from about 162 W at 300 K to 25 W at 77 K, i.e. an 84.6% reduction. For the energy smoothing inductor design, a HTS GdBCO inductor has been designed and optimized by introducing several ferromagnetic raisededge disks. As compared to a conventional copper inductor with the same capacity, the conductor loss of the optimized HTS GdBCO inductor is reduced from about 104 W to 9 W, i.e. a 91.4% reduction. Therefore, the proposed cryogenic boost chopper can be well expected to replace the conventional one for developing efficient power conditioning systems in various HTS power devices and systems.

0.6

0.2

Inductor

N/A

V. CONCLUSION

Phys2

0.8

MOSFET Diode 25.78 W

Conventional 85.28 W

1.2 Phys1

Item Cryogenic

100 150 200 250 300 350 400 450 500 f [Hz] Fig. 13. Relations between the hysteresis losses (Phys1, Phys2) and f.

[4]

In contrast, if conventional copper tapes are applied to wind the same 3-mH inductor, its total resistance can be estimated

[5]

P. Haldar et al., “Improving performance of cryogenic power electronics,” IEEE Trans. Appl. Supercond., vol. 15, no. 2, pp. 23702375, Jun. 2005. J. X. Jin et al., “Cryogenic power conversion for SMES application in a liquid hydrogen powered fuel cell electric vehicle,” IEEE Trans. Appl. Supercond., vol. 25, no. 1, Feb. 2015, Art. ID 5700111. K. K. Leong, A. T. Bryant, and P. A. Mawby, “Power MOSFET operation at cryogenic temperatures: Comparison between HEXFET®, MDMeshTM and CoolMOSTM,” Proc. 22nd Int. Symp. Power Semiconductor Devices & ICs, Hiroshima, Japan, 6-10 June 2010, pp. 209-212. K. K. Leong et al., “An investigation into the utilisation of power MOSFETs at cryogenic temperatures to achieve ultra-low power losses,” IEEE Energy Conversion Congress & Exposition, Atlanta, USA, 12-16 September 2010, pp. 2214-2221. P. Pereira et al., “Power electronics performance in cryogenic environment: Evaluation for use in HTS power devices,” Journal of Physics: Conference Series, vol. 97, pp. 012219, 2008.



6 [6]

T. Curcic and S. A. Wolf, “Superconducting hybrid power electronics for military systems,” IEEE Trans. Appl. Supercond., vol. 15, no. 2, pp. 2364-2369, Jun. 2005. [7] J. X. Jin et al., “Enabling high-temperature superconducting technologies toward practical applications,” IEEE Trans. Appl. Supercond., vol. 24, no. 5, Oct. 2014, Art. ID 5400712. [8] L. Rostila et al., “Modeling method for critical current of YBCO tapes in cable use,” Physica C, vol. 467, pp. 91-95, Dec. 2007. [9] X. Y. Chen et al., “Energy exchange experiments and performance evaluations using an equivalent method for a SMES prototype,” IEEE Trans. Appl. Supercond., vol. 24, no. 5, Oct. 2014, Art. ID 5701005. [10] F. Grilli et al., “Computation of losses in HTS under the action of varying magnetic fields and currents,” IEEE Trans. Appl. Supercond., vol. 24, no. 1, Feb. 2014, Art. ID 8200433 [11] N. Schönborg and S. P. Hörnfeldt, “Losses in a high-temperature superconductor exposed to AC and DC transport currents and magnetic fields,” IEEE Trans. Appl. Supercond., vol. 11, no. 3, pp. 4086-4090, 2001.
