An Inductorless Asymmetrical ZVS Full Bridge Converter for Step-up Applications with Wide Input Voltage Range Pyosoo Kim and Sewan Choi, IEEE Senior Member Seoul National University of Technology Seoul, Korea
Jeongguen Kim Power Plaza Co. Seoul, Korea
Abstract -- This paper proposes an inductorless full-bridge DC-DC converter for step up applications. The proposed converter can achieve ZVS of all switches by utilizing transformer leakage inductance and MOSFET output capacitance. Owing to negligible duty cycle loss and use of voltage doubler, the proposed converter has greatly reduced turn ratio, which makes this voltage-fed converter viable for high step up application. In addition, the proposed converter does not necessitate a clamp circuit at the secondary since the diodes are turned off under ZCS. The diode voltage rating is fixed at the output voltage regardless of input voltage. Further, the transformer VA rating is reduced compared to the conventional converter due to the absence of circulating current. Therefore, the proposed converter is suitable for application with wide input voltage range. Experimental results on a 1kW prototype are provided to validate the proposed concept.
unbalanced excitation at high power levels . The halfbridge converter requires twice the transformer turn ratio, which is a serious drawback in applications where high stepup ratio is required due to the increased current rating at primary side as well as increased transformer leakage inductance. Even though the full-bridge has twice the number of switches, the switches are fully utilized and more switching losses can be eliminated by adopting soft-switching techniques. Overall, the full-bridge converter is preferred for high power, high step-up applications. The phase-shifted full-bridge (PSFB) converter has widely been used in high frequency, high power applications due to the advantages such as ZVS of switches without additional components, constant frequency operation, and simple control. However, the PSFB converter has several drawbacks: considerable duty cycle loss, large circulating current loss at the primary side, narrow ZVS range of the lagging leg switches, and large voltage spike across the rectifier diodes [4,5]. To resolve or mitigate these problems, a number of techniques have been proposed to optimize the performance of the PSFB converter [5-11]. In order to reduce the voltage spike across the rectifier diodes, the full-bridge converter employing an clamp in the secondary side has been proposed [6,7]. The major advantage of these techniques, especially for step-up application, is that the circulating current is reset by the operation of the clamp circuit, resulting in significantly reduced conduction loss in the primary side. However, the additional clamp circuit including a switch, a capacitor and a gate driver increases system cost and complexity and degrades system reliability . The energy recovery passive clamp circuits  improve system reliability, but the voltage stress across the rectifier diodes could be very high for applications with wide range of input voltage . A softswitched PSFB converter with primary-side energy storage inductor  does not have an output inductor, and therefore the snubber circuit is not required in the secondary side. However, voltage rating of rectifier diodes is twice the output voltage due to the use of center-tap at the secondary side. Also, this converter may not be suitable for high power, high step-up applications due to significantly increased current rating of the switch.
Key words : asymmetrical, full bridge, step-up, wide input voltage range, ZVS, inductorless
The isolated step-up DC-DC converter has continuously been increasing its demands in applications such as UPS, electric vehicles, and photovoltaic and fuel cell systems, where a low-voltage high-current DC should be converted to a high-voltage low-current DC . The step-up DC-DC converter could be either a voltage-fed or current-fed type. The advantages and disadvantages of the two types are detailed in . An important advantage of the voltage-fed type is the lower switch voltage rating which is fixed at input voltage, and therefore MOSFETs with lower Rds(ON) can be used. This is critically beneficial in the low-voltage highcurrent input application such as fuel cells where more than 50% of the power loss is lost as a switch conduction loss at the low voltage side. Also, the voltage-fed converter does not have a self-start problem unlike the current-fed converter. However, the voltage-fed converter suffers from a high transformer turn ratio which leads to large leakage inductance resulting in large duty cycle loss, increased switch current rating, and excessive ringing on the rectifier diode. The topology candidates as voltage-fed DC-DC converters are push-pull, half bridge and full-bridge. The push-pull converter works well for low-voltage, low-power applications. Its major problem is the transformer saturation due to slightly
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Another output inductorless method is the full-bridge converter with voltage doubler rectifier [5,11]. In these converters required transformer turn ratio is reduced, and the snubber circuit is not necessary. In addition, voltage rating of rectifier diodes is the same as the output voltage. The converter with controlled voltage doubler incorporated as inverter legs  uses phase shifting to control the power flow and therefore may not be suitable to applications with wide input voltage range due to high conduction losses. The PSFB converter with voltage doubler rectifier  uses the resonance between the transformer leakage inductance and rectifier capacitors to enlarge ZVS range of lagging leg switches and reduce the circulating current during the freewheeling period. However, this converter may also not be suitable to applications with wide input voltage range due to excessive current stresses resulting from limited resonant frequency. This paper proposes an inductorless full-bridge DC-DC converter to which an asymmetrical PWM switching is applied in order to regulate the output voltage and achieve ZVS of main switches by utilizing leakage inductance of the transformer and intrinsic output capacitors of MOSFETs. Since there is no freewheeling period in the proposed converter, the circulating current is eliminated at the primary side, which results in greatly reduced conduction losses of the transformer. The duty cycle loss of the proposed converter is also negligible. Thus, the use of voltage doubler and negligible duty cycle loss leads to greatly reduced transformer turn ratio, which is especially beneficial to the voltage-fed converter for high step-up application. In addition, the proposed converter does not necessitate any clamp circuit at the secondary side since the rectifier diodes are turned off under ZCS. The diode voltage rating is the same as the output voltage due to the use of voltage doubler regardless of the input voltage. The performance of the proposed converter is compared to the conventional PSFB converter. Experimental results on a 1kW prototype are provided to validate the proposed concept. II.
Considering the conduction time of diodes, the voltage across the output capacitors can also be obtained by,
VC 2 = VO × ( D - D2 + D1 )
2D × N p × Ts × Ro × N s (7D + 1 - 4D - 6 D + 2D ) 2
4 × N s × Lk × D + 2N s × Lk × D + D × N p × Ts × Ro - 2D × N p × Ts × Ro + D × N p × Ts × Ro
The voltage gains of the proposed converter according to the variations in transformer leakage inductances and in switching frequency are plotted in Fig. 3(a) and Fig. 3(b), respectively. As the leakage inductance and/or switching frequency increase the voltage gain decreases.
Fig. 1 Circuit diagram of the proposed converter
D1 DT Vg1,4
vLk iLk iS1
Considering the effect of transformer leakage inductance, the input-to-output static voltage gain can be obtained by,
Fig. 1 shows the circuit diagram of the proposed converter with a voltage doubler rectifier at the secondary. The key waveforms of the proposed converter are shown in Fig. 2. The switches S1(S4) and S2(S3) are operated asymmetrically with duty ratios of D and 1-D, respectively. The gating signal generation is simple to implement, which increases the system reliability. A blocking capacitor is connected in series with the transformer to avoid dc offset of the transformer magnetizing current resulting from the asymmetrical switching. From the volt-sec relation on the transformer primary side, the voltage across the blocking capacitor can be calculated as, VC = Vi (2 D - 1)
VC1 = VO × (1 - D - D1 + D2 )
ZVS Turn on
ZVS Turn on
vD1 ZCS Turn off
vD2 ZCS Turn off
t2 t3 Fig. 2 Key waveforms of the proposed converter
discharged to 0V for a very short moment by leakage inductor current. After completion of discharge operation, the body diodes of S2 and S3 are turned on, and the current rapidly decreases to zero since voltage VLk(t2~t3) becomes large negative as follows, VLk ( t2 -t3 ) = -Vi - VCb -
During this mode gate signals for S2 and S3 should be generated so that the main channel of S2 and S3 start conducting as shown in Mode 3 of Fig. 3. Mode 4 [t3, t4]: The direction of current iLk is reversed at t3 and keeps increasing linearly with the slope determined by VLk(t3~t4)/Lk.
Duty cycle (a)
VLk ( t3 -t4 ) = -Vi - VCb +
VC 2 n
It is noted that S1(S4) and S2(S3) are turned on with ZVS during Mode 1 (t0 ~ t1) and Mode 3 (t2 ~ t3), respectively.
(b) Fig. 3 Voltage gain according to the variation of (a) leakage inductance (b) switching frequency
The converter has four operating modes within each operating half cycle. Figure 4 shows the operating states of each mode. Mode 1 [t0, t1]: Switches S2 and S3 are turned off at t0, and then output capacitors of S2 and S3 are charged to Vin while output capacitors of S1 and S4 are discharged to 0V for a very short moment by leakage inductor current. After completion of discharge operation, the body diodes of S1 and S4 are turned on, and the current rapidly decreases to zero since voltage VLk(t0~t1) becomes large positive as follows, VLk (t0 -t1 ) = Vi - VCb +
VC 2 n
During this mode gate signals for S1 and S4 should be generated so that the main channel of S1 and S4 start conducting as shown in Mode 1 of Fig. 3. Mode 2 [t1, t2]: The direction of current iLk is reversed at t1 and keeps increasing linearly with the slope determined by VLk(t1~t2)/Lk. VLk (t1 -t2 ) = Vi - VCb -
Mode 3 [t2, t3]: Switches S1 and S4 are turned off at t2, and then output capacitors of MOSFETs S1 and S4 are charged to Vin while output capacitors of MOSFETs S2 and S3 are
Fig. 4 Operation states of the proposed converter
Thus, the ZVS turn-on of all switches is achieved by utilizing leakage inductance of the transformer and output capacitance of MOSFETs. Again, during Mode 1 (t0 ~ t1) and Mode 3 (t2 ~ t3), diode currents ID2 and ID1 are linearly decreased with the slope determined by VLk(t0~t1)/Lk and VLk(t2~t3)/Lk, respectively. The voltage spike caused by diode reverse recovery is greatly reduced, and the diodes are clamped to output voltage Vo. Therefore, the proposed converter does not necessitate any snubber in the secondary side. III. COMPARATIVE ANALYSIS In this section the performances of the proposed converter are compared to those of the PSFB converter, and some features including the advantages and disadvantages of the proposed converter are discussed. In Fig. 5 some key waveforms of the proposed converter and the PSFB converter are shown to compare the performances. In order to perform a numerical comparison of performance between the proposed converter and PSFB converter, the following specifications have been assumed: • Po = 1kW • ΔVo= 1%
• Vi = 35~60V • fs = 90 kHz
• Vo = 380V
Duty cycle loss In the PSFB converter leakage inductance of the transformer should be large enough to achieve ZVS operation in wide input voltage and/or load range. Thus, increased leakage inductance causes increased duty cycle loss as well as severe voltage ringing on the secondary side. As shown by the shaded area in Fig. 5, the duty cycle loss is inevitable in the PSFB, and it increases the required turn ratio of the transformer, which in turn increases the leakage inductance and component current stresses at the primary side. However, it can be seen from voltage waveform at the transformer secondary, Vsec, in Fig. 5 that the duty cycle loss of the proposed converter is negligible. Negligible duty cycle loss is especially beneficial in high step applications such as fuel cells, where turn ratio of the transformer is a critical design factor in the voltage-fed dc-dc converter.
Fig. 5 Comparison of key waveforms between the PSFB converter and proposed converter(a) PSFB converter (b) Proposed converter
secondary side. Note that there is no zero voltage period across the transformer winding as shown in Fig. 4. Fig. 6 shows an example calculation of switch currents in rms, where full output power was assumed regardless of input voltage. When input voltage is low the switch currents in rms of the proposed converters are the same as them of the PSFB, but as the input voltage increases switch currents S1(S4) and S2(S3) are increased and decreased, respectively. However, this should not be a problem in the fuel cell application where the converter normally operates at rated power (at the lowest input voltage) and the switch current rating is determined at this operating point of the lowest input voltage. The transformer VA rating as a function of input voltage of the proposed converter and PSFB converter is shown in Fig. 7. The required transformer VA rating of the PSFB converter is increased as input voltage increases (the duty cycle decreases) due to the circulating current while that of the proposed converter remains the same regardless of input voltage variation.
Circulating current In the PSFB converter a circulating current is inevitable during the freewheeling period and is especially large at high input voltage (at low duty cycle), and this causes large conduction losses associated with the transformer and primary switches. This is because there exists a non-powering period, as shown in Fig. 5, during which a zero voltage is applied to the transformer winding, and the power is not delivered to the secondary side even though the current is circulating at the primary side. This circulating loss could be a severe problem in low voltage, high current application where the conduction losses at the primary side is a dominant loss factor. However, in the proposed converter there is no freewheeling period meaning that the power is always being delivered to the
Fig. 6 Switch current in rms value as a function of input voltage
ZVS Energy [J]
Transformer VA rating [VA] Fig. 7 Transformer VA rating as a function of input voltage
Fig. 8 ZVS energy as a function of output power
ZVS range of switches In the proposed converter the ZVS for all switches can be achieved by utilizing the transformer leakage inductances and the MOSFET output capacitances as the PSFB converter does. The ZVS energy for switches of both converters is shown in Fig. 8. As the ZVS energy for leading leg switches of the PSFB converter is large, that for switches S2(S3) of the proposed converter is also large. In fact, the ZVS for both leading leg switches of the PSFB and switches S2(S3)of the proposed converter can be achieved in most of the load range. The ZVS energy for both lagging leg switches of the PSFB and switches S1(S4) of the proposed converter is small, meaning that the ZVS for both switches may not be achieved under light load condition. D.
Voltage surge and ringing The rectifier diode voltages as a function of input voltage of both converters are shown in Fig. 9. The rectifier diode voltage of the proposed converter remains the same regardless of input voltage variation. Actually, it is fixed at the output voltage of 380V. However, due to the duty cycle loss the rectifier diode voltage of the PSFB converter at the lowest input voltage(at maximum duty cycle of 0.5) of 35V is 584V, which is much higher than output voltage and increases up to 950V at highest input voltage(at minimum duty cycle of 0.26) of 60V. Furthermore, the PSFB converter suffers from the voltage surge associated with diode reverse recovery and ringing associated with resonance between transformer leakage inductance and junction capacitance of the rectifier diode. The voltage rating of the rectifier diode becomes much larger and therefore a clamp circuit should be used to suppress the voltage surge and ringing at the secondary side, which results in increased circuit complexity and losses associated with it. However, the proposed converter does not necessitate the clamp circuit since the diodes are turned off with ZCS as shown in Fig. 2. E.
Performance comparison Assuming the dc-dc converter to be operated at full power
Fig. 9 Diode voltage as a function of input voltage
regardless of input voltage variation, the design has been performed for both the proposed converter and PSFB converter. The component ratings of both converters are compared in Table I. The switch voltage rating of the proposed converter is the same as that of the PSFB converter. Switch S1(S4) current of the proposed converter is larger than that of the PSFB converter. Instead, the transformer VA rating of the proposed converter is smaller than that of the PSFB converter, which is because there is no circulating current in the proposed converter. Further, the transformer turn ratio of the proposed converter is much smaller than that of the PSFB converter, which is a crucial advantage for voltage-fed converters since increased leakage inductances in the PSFB converter could cause many harmful effects such as severe duty cycle loss and voltage ringing. The diode voltage rating of the PSFB is 2.5 times larger than that of the proposed converter. Besides, the proposed converter does not necessitate a clamp circuit since all the rectifier diodes are turned off under ZCS unlike the PSFB converter. There is no output inductor in the proposed converter, instead, a blocking capacitor is required at the primary side. Note that there exists no dc offset of the magnetizing current in the proposed converter owing to the blocking capacitor at the primary and voltage doubler at the secondary.
TABLE I COMPONENT RATING COMPARISON (Po=1kW, Vi=35~60V, Vo=380V, fs=90kHz)
0.26 ~ 0.5
0.14 ~ 0.5
1 : 18
C1 : 256V C2 : 124V
IV. EXPERIMENTAL RESULTS A 1kW laboratory prototype has been constructed, and the experimental waveforms are shown in Fig.10. The system parameters used in the experiment are the same as those in Table I. Fig. 10(a) shows simple gating signals generated for the main switches. Fig. 10(b) shows the transformer primary current which does not have circulating current. Figs. 10(c) and (d) show that all main switches are being turned on with ZVS. As shown in Fig. 10(e), the diode is also being turned off under ZCS, and there is no voltage spike even though any clamp circuit is not used in the experiment. V.
In this paper, an inductorless full-bridge DC-DC converter is proposed. The proposed converter has the flowing features: ZVS of all switches without extra components, no circulating
Fig. 10 Experimental waveforms (D=0.38) (a) gating signals (b) transformer primary current (c) voltage and current of S1 (d) voltage and current of S2 (e) voltage and current of diode D1
current, negligible duty cycle loss, no clamp circuit at the secondary side and greatly reduced transformer turn ratio and VA rating. These advantages make the proposed converter very attractive for high step-up applications with wide input voltage range. The proposed converter is compared to the conventional converter. Experimental results on a 1kW prototype are provided to validate the proposed concept. REFERENCES  Franco, L.C. Pfitscher, L.L. Gules, R, “A new high static gain nonisolated DC-DC converter,” in Proc. IEEE PESC, pp. 13671372, June 2003.  X. Kong, L. T. Choi, and A. M. Khambadkone, “Analysis and Control of Isolated Current-fed Full Bridge Converter in Fuel Cell System,” in proc. IEEE IECON, Vol. 3, pp.2825-2830, Nov. 2004.  T. A. Nergaard, J. F. Ferrell, L. G. Leslie, J. S. Lai, “Design considerations for a 48 V fuel cell to split single phase inverter system with ultracapacitor energy storage,” in Proc. IEEE PESC, pp. 2007–2012, June 2002.  Brunoro, M.; Vieira, J.L.F., “A high-performance ZVS fullbridge DC-DC 0-50-V/0-10-A power supply with phase-shift control,” IEEE Trans. Power Electron., Vol. 14, pp.495–505, May 1999.  W. Lee, C. Kim, G. Moon, S. Han, “A New Phase-Shifted FullBridge Converter With Voltage-Doubler-Type Rectifier for High-Efficiency PDP Sustaining Power Module,” IEEE Trans. Ind. Electron., Vol. 55, pp.2450–2458, June 2008  J. A. Sabaté, V. Vlatkovic, R. B. Ridley, and F. C. Lee, “Highvoltage, high-power, ZVS, full-bridge PWM converter employing an active snubber,” in Proc. IEEE Appl. Power Electron. Conf., 1991, pp. 158–163.  J. G. Cho, G. H. Rim, and F. C. Lee, “Zero-voltage and zerocurrent switching full bridge PWM converter using secondary active clamp,” in Proc. IEEE Power Electron. Spec. Conf., 1996, pp. 657–663.  Cha. H, Chen. L, Ding. R, Tang. Q, Peng. F. Z, “An Alternative Energy Recovery Clamp Circuit for Full-Bridge PWM Converters with Wide Range of Input Voltage,” IEEE Trans. Power Electron, Vol. 23, pp. 2828-2837, Nov. 2008.  J. G. Cho, J.-W. Beak, and C.-Y. Jeong, “Novel zero voltage and zero current switching full bridge PWM converter using a simple auxiliary circuit,” IEEE Trans. Ind. Appl., vol. 35, no. 1, pp. 15–20, Jan./Feb. 1999.  Chen Zhao, Xinke Wu, Wei Yao, Zhaoming Qian, “Synchronous rectified Soft Switched Phase Shift Full Bridge converter with primary energy storage inductor”, in Proc. IEEE APEC, pp.581-586, Feb. 2008.  Wang, J., Peng, F.Z., Anderson, J., Joseph, A., Buffenbarger, R., “Low cost fuel cell inverter system for residential power generation,” in Proc. IEEE APEC, Vol.1, pp.367–373, 2004.