An overview of multilevel converter topologies for grid connected applications Ehsan Behrouzian1, Massimo Bongiorno1, Hector Zelaya De La Parra1,2 1 CHALMERS UNIVERSITY OF TECHNOLOGY SE-412 96, Göteborg, Sweden 2 ABB Corporate Research SE-721 78, Västerås, Sweden Tel: +46 / (31) – 772.16.82 E-Mail: [email protected]
Keywords «FACTS», «Multilevel converters», «STATCOM», «High voltage power converters».
Abstract This paper provides an overview of multilevel converter topologies for grid connected applications. Different converter topologies such as Diode Clamp Converter (DCC), Capacitor Clamp Converter (CCC) and Chain Link Converter (CLC) are considered and compared from different aspects such as component sizing, complexity, efficiency and reliability. Thanks to its modular structure, the CLC appears as the most attractive topology for high power and high voltage applications. Single-Star Bridge-Cell (SSBC), Single-Delta Bridge-cell (SDBC), Double-Star Bridge-Cell (DSBC) and DoubleStar Chopper-Cell (DSCC) are four basic subset topologies of CLC. A comprehensive comparison of these subset topologies for the CLC is provided for the particular application of grid connected converters. The problem of operation under unbalance grid conditions and the ability of this converter topology to inject negative sequence into the grid are discussed. It will be shown that due to the lack of a common DC link between phases, this converter topology presents limited negative sequence injection capability when the phase legs are connected in delta, while in case of star connection voltage balancing between the different cells of the converter becomes problematic due to the uneven current distribution among phases. This represents the main limitation of this converter topology, especially when used for load balancing and active filter applications.
List of acronyms • • • • • • • • • • • •
STATic COMpensator (STATCOM); Diode Clamp Converter (DCC); Active Diode Clamp Converter (ADCC); Capacitor Clamp Converter (CCC) ; Chain Link Converter (CLC) ; Single-Star Bridge-Cell (SSBC); Single-Delta Bridge-cell (SDBC); Double-Star Bridge-Cell (DSBC; Double-Star Chopper-Cell (DSCC); Voltage Source Converter (VSC); Modular Multilevel Converter (M2C); Flexible AC Transmission Systems (FACTS);
Introduction The continuous growth of the electrical power system, resulting in an increasing electric power demand, has put a lot of emphasis on system operations and control. These topics are becoming more
and more of interest, in particular due to the recent trend towards restructuring and deregulations of the power supplies . It is under this scenario that the use of Flexible AC Transmission Systems (FACTS) controllers represents both opportunities and challenges for optimum utilization of existing facilities and to prevent outages . Typically, FACTS devices are divided into two categories: series-connected and shunt-connected controllers . At the actual stage, shunt-connected FACTS devices are dominating the market for controllable devices, mainly due to the inherited reactive characteristic of the series capacitors and to the complications in the protection system needed for the series configuration. Shunt-connected reactive power compensators are available both based on mature thyristor-based technology (named Static Var Compensator, SVC) and on Voltage Source Converter (VSC) technology, also known under the name of STATic COMpensator (STATCOM). The thyristor-based technology is today the preferred option for installations having high power rating (typically above few hundred Mvar) . On the other hand, the VSC technology is the most suitable choice when high speed of response or small footprint is needed. Furthermore, the use of VSC technology allows low harmonic pollution in the injected/absorbed current as well as reduced power losses (depending on the adopted VSC topology and on the application, as it will be discussed further in this paper) as compared with the SVC. These items, together with a higher operational flexibility and good dynamic characteristics under various operating conditions (for example, changes in the short-circuit strength of the grid at the connecting point), indicate that the VSC technology is qualitatively superior relative to the line commutating thyristor-based SVC for dynamic shunt compensator. The use of high-performance and cost-effective high power VSCs is a prerequisite for the realization of a STATCOM. Up to some years ago, the implementation of VSCs for high-power applications was difficult due to the limitations in the semiconductor devices. Typical voltage ratings for semiconductors are between 3.3 kV and 6.5 kV, which represent only a small fraction of the system rated voltage. For this reason, series-connection of static devices was needed in the VSC design for FACTS applications. Furthermore, the need for limitation in power losses has severely limited the level of switching frequency that could be used in actual installations, leading to the need for relatively large filtering stages. For these reasons, in the last decades multilevel converters for high-power application have gained more and more attention -. Among the multilevel VSCs family, the Chain Link Converter seems to be one of the most interesting solutions for high-power grid-connected converters . Beside common advantages of multilevel converters, each topology has its own advantages and disadvantages which give special characteristic to that topology. Many papers discussed about multilevel converter topologies and comparison between them -. The aim of this paper is to provide an overview of different multilevel converter topologies for STATCOM applications. Advantages and disadvantages of three basic multilevel converters, the Diode Clamp Converter (DCC), Capacitor Clamp Converter (CCC) and Chain Link Converter (CLC) will be discussed. In particular, the different topologies will be compared in terms of number of components, dc-link capacitor dimensioning, modularity and controllability. The latter plays a key role in STATCOM applications and represents one of the main limitation of the CLC, mainly due to the absence of a common dc stage. Unbalanced grid voltage condition and ability of multilevel converters to compensate it as STATCOM - is also considered in this study.
Basic multilevel converter topologies for STATCOM applications In this section, the three main converter topologies mentioned earlier will be briefly described. The main advantages and disadvantages of these topologies will be discussed with focus on STATCOM applications.
Diode Clamp Converter (DCC) Fig. 1(a) shows the single- line diagram of a three level DCC. This converter topology (also known as Neutral Point Clamped converter, NPC) takes its name from the use of diodes to limit the collectoremitter voltages of the switching device to the voltage across one capacitor. This type of topology has
been successfully implemented in STATCOM applications in its three-level structure with power level up to ±120MVA . Although theoretically possible to increase the number of levels, this converter topology finds its realistic limit to five-level due to the complexity of the system and large number of components required . Another limiting factor for the number of levels in DCC is represented by the uneven distribution of semiconductor losses among the semiconductors, which limits the switching frequency and the output power. The latter can be overcome by installing additional transistors in parallel with the clamping diodes forming the so-called Active Diode Clamped Converter (ADCC) showed in Fig. 1(b) . It is important to stress that although the power loss is more even through this structure, the need for more power electronic components leads to an increase in complexity of the overall system. In addition, the diode reverse recovery becomes an important design challenge. As it can be easily seen from Fig. 1(a) and Fig. 1(b), this converter topology does not present a modular structure. Therefore series connection of power semiconductor is needed to achieve the desired voltage level. Thanks to the common dc link, the requirements on the dc link capacitor are only to provide the temporary energy storage during switching operations to distribute reactive power among the phases and to support the system losses.
Fig. 1: Single-line diagram of three-level single phase DCC (a), ADCC (b).
Capacitor Clamp Converter (CCC) Fig. 2 shows the single-line diagram of a three level CCC. CCC can be considered as an alternative to overcome some of the DCC drawbacks. In this topology, additional levels are achieved by means of capacitors. It provides redundant switch states that can be used to control the capacitor charge. Unlike the diode clamp structure, in the CCC the capacitors within a phase leg are charged to different voltage levels. In CCC, many different switching states are available to produce a voltage level at the output. For example in a five-level CCC there are six combination of capacitor selection and switching states which produce zero voltage level. By proper selection of capacitor combinations, it is possible to control the capacitor charging state. This can improve the complexity of the capacitor voltage controller for higher levels . Common dc source is also another advantage of this structure. Higher number of voltage levels requires a relatively high number of capacitors in this topology. A Nlevel converter will require a total of (N-1) * (N-2) / 2 clamping capacitors per phase in addition to the N-1 main dc bus capacitors. Lack of modularity and the high number of capacitors for higher number of voltage levels can reduce the reliability of this converter. Packaging is also more difficult in converters with a high number of levels. In CCC, clamping capacitors size become large when using low switching frequency (typically, for switching frequencies below 800−1000 Hz), due to the fact that the output current flows through clamping capacitor as long as the switching state does not change.
Fig. 2: Single-line diagram of three-level single phase CCC.
Chain Link Converter (CLC) CLC consists of many cells connected in series. These cells can be either half- or full-bridge. Fig. 3 shows the single-line diagram of a five-level CLC with full-bridge cells structure. This structure is capable of reaching medium output voltage levels using only standard low-voltage technology components. These converters also feature a high modularity degree because each cell can be seen as a module with similar circuit topology, control structure, and modulation. Therefore, in the case of a fault in one cell, it is possible to replace it quickly and easily. Moreover, it is possible to bypass the faulty module without stopping the load, bringing an almost continuous overall availability and high reliability. Comparing the number of capacitors and diodes between the mentioned topologies yields that CLC has the least number of components compare to the DCC and CCC. Although CLC presents a fairly simple structure, it suffers from requirement of large number of cells (more isolated capacitors) to decrease the harmonics and switching frequency. This leads to a more complex dc-voltage regulation loop. However various control algorithms exist to control high number of capacitors voltage . Moreover, due to the lack of a common dc link, the output power will be affected by an oscillatory component having characteristic frequency equal to twice the grid frequency; these oscillations will be reflected on the dc-link voltage and therefore each cell necessitates over-sizing of the DC link capacitors to provide filtering effect. There are two alternatives for CLC. CLC with unequal DC source voltages, called hybrid or asymmetric CLC, and CLC with half-bridge cells, called modular multilevel converter or M2C (see next section). Hybrid CLC can produce higher voltage level with fewer power electronic requirements. This reduces the size and cost when compared to the usual CLC with equal DC links since fewer semiconductors and capacitors are employed. The main disadvantage of this approach is that the converter is no longer modular. Table I summarizes different characteristics of multilevel converters discussed in this section.
Fig. 3: Single-line diagram of five-level CLC.
Multilevel converter topologies comparison for STATCOM applications In recent years, the demand for high-voltage conversion applications has drastically increased. Reliability, controllability, modularity, number of components and losses are main features for high power STATCOM applications. In conventional use of STATCOM (for utility applications) the converter voltage is increased through a step-up transformer before connecting to grid. Consequently the current will be high in the low voltage side which leads to higher power loss and thus reduced efficiency. This is the driving force that has lead the research community to focused on transform-less solutions, in order to directly connect the converter to grid. In addition, a transformer-less configuration allows a reduced footprint for the system and a reduction in losses. Since in high voltage applications the voltage rating usually ranges several tens of kVs, the power processing cannot be accomplished with any single IGBT or similar devices. One way to get higher voltage rating is to connect several of these devices in series and operate them simultaneously. However, the series operation of devices is very difficult because of tolerances in device characteristic and/or the unavoidable mismatch between the driving circuits. The
main problem is to ensure an equal voltage sharing among the components during static and dynamic transient states. Furthermore, special arrangements are needed to guarantee a continuous operation of the device in case of faulty transistors. A simpler method to increase the voltage rating is to use modular structures. In these structures the total output voltage of the converter can be increased by increasing the number of cells, each operated in low voltage rating. In some special design such as StakPak (ABB) which allows short circuit (shortcircuit failure mode) in a faulty cell it is possible to bypass the faulty module without stopping the overall operation of the converter (this implies also redundancy in the number of cells). As mentioned before CLC is a modular structure and it is possible to raise the voltage in this structure with high reliability only by increasing the number of voltage levels. The increased number of levels achievable with the topology also results in better harmonic performance and lower switching losses. The topology also has the ability to successfully balance the capacitor voltages for high level number. It is for these reasons that the cascaded H-bridge converter is often considered as the most suitable solution to implement high-power STATCOM, while DCC and CCC prefer more for medium-voltage and lowpower applications. Details about CLC and its subset structures can be found in next section.
Table I: Summery of multilevel converters characteristics Topology
Switches per phase (Converter with m- level)
Clamping diodes per phase (Converter with m- level)
Capacitors per phase (Converter with mlevel)
(m-1)(m-2) /2 +(m-1)
Maximum practical levels (Complexity in DC voltage balancing)
No theoretical limit
Common DC source
Capable with large capacitors
Capable with higher voltage levels
Chain link converter subset topologies Single Star Bridge Cell (SSBC), Single Delta Bridge Cell (SDBC), Double Star Chopper Cell (DSCC) and Double Star Bridge Cell (DSBC) are CLC subset topologies . Bridge cell refers to full bridge converter and chopper cell refers to half-bridge converter. Fig. 4 shows these four configurations. In this chapter all these four CLC subset topologies are investigated and their application as STATCOM is addressed. The first difference between SSBC and SDBC is their voltage and current rating. Under balance grid voltage condition with equal number of cell per phase and similar power electronic equipment, SSBC has √3 higher current rating compared to the SDBC, while SDBC has √3 higher voltage rating compared to the SSBC in each phase. In case of unbalance grid voltage, the converter has the ability to
inject a negative sequence current into the grid by controlling a zero sequence current that circulates inside the ∆. This results in an increased current rating as compared to balance condition (and
Fig. 4: SSBC (a), SDBC (b), DSBC (c), DSCC (d). consequently higher current rating compared to SSBC). With the same reasoning, SSBC have higher voltage rating compare to SDBC since unbalance grid voltage will cause zero sequence voltage (movement of the Y-point of the converter) in SSBC. Higher current rating not only affects the rating of the semiconductors in the bridges, but more importantly affects the current ripple rating of the capacitors in each bridge. SDBC, DSCC, and DSBC have ability to use the circulating current between their phases. Although it leads to a slight increase in losses, the circulating current can exchange power between phases which can be used to balancing capacitor voltages especially when negative sequence reactive power is needed or when the compensator is in idle mode (zero current exchange between the compensator and the grid). Table II has summarized different characteristics of all CLC discussed in this chapter.
Simulation results In this section, simulation results for the star-connected CLC (SSBC) will be presented. Two main case studies will be shown: compensator controlled to inject a positive sequence current only and compensator controlled to inject both positive and negative sequence current. In both cases, the grid is considered infinitely strong and balanced. The simulated CLC is constituted by three full-bridge cells per phase leg, yielding to a seven-level converter. Base power and base voltage are set to be 120 MVA and 33 kV, respectively. The implemented control system is similar to the one introduced in , as shown in Fig. 5. As a main difference, the cluster controllers are used to determine the reference active current for the main current controller. These controllers, based on single-phase dc-link voltage controllers, aim to control the average energy stored in the dc-link capacitors, not directly the average dc-link voltage as in . Individual capacitor voltage control is the same as . Fig. 6 shows the step performance of the chain-link when injecting a positive sequence current. Top plot shows the reference (red) and the actual (blue) reactive current in the rotating dq-reference frame, while bottom plot shows the dc-link voltages (for all cells).
Fig. 7 shows a detail of the step performance of the chain-link when going from fully inductive to fully capacitive. Top plot shows the reference (red) and the actual (blue) reactive current; middle plot shows the dc-link cell voltages and bottom plot shows the phase voltages at the converter terminals. Fig. 8 shows the performance of the chain-link when injecting a constant positive sequence current (1kA) and when varying the negative sequence current (0kA, 0.1kA, 0.2kA and 0KA respectively). Top plot shows the reference positive sequence current (red) and the actual reactive current (blue), while the bottom plot shows dc-link voltages.
Table II: Summery chain link subset topologies characteristics SSBC
Negative sequence compensation
Capable by zero sequence voltage
Capable by zero sequence current
Capable by zero sequence current
Capable by zero sequence current
Voltage in unbalance condition
Higher than SDBC
Current in unbalance condition
Higher than SSBC
Voltage in balance condition
current in balance condition
Capacitor size under balanced conditions
Higher than SDBC due to higher current
Lower than SSBC
Capacitor size under unbalanced conditions
Lower than SDBC
Higher than SSBC due to circulating current
Cost in unbalance condition
Tradeoff between capacitor and switch
Easier than SSBC because of circulating current controllability
Vc1 ... Vc9
Fig. 5: Control block diagram for the 120 MVA 33 KV CLC STATCOM.
Fig.6: Top plot: reference and actual injected reactive current; bottom plot: capacitor cells voltages (bottom). Balance case.
Fig. 7: Details of the step performance, reactive current (top), dc link voltages (middle), VSC voltage (bottom).
phase a phase b phase c
Fig. 8: The step performance of the chain-link when injecting negative sequence current. Reactive current (top), dc-link voltages (bottom).
As mentioned before, CLC use isolated capacitors at each phase. Average active power is different from phase to phase in case of unbalance conditions. In other words unbalanced voltages involve active power being absorbed in some phases and generated in others which is mainly because of different currents in different phases. Converters with a common DC link voltage for all three phases do not need to control the power distribution between phases. If there is net power that is being absorbed from one phase it can be transferred to another phase without affecting the capacitor voltage. Under unbalance load or grid voltage condition the SSBC can add a common zero-sequence voltage to each of the three phases for voltage balancing control of all the floating split dc capacitors in the STATCOM. The SDBC can use the circulating current. The circulating current passes through phases and can exchange power between phases.
Conclusion The most common multilevel converters have been investigated in this paper. Complexity both in control and hardware structure, reliability, modularity and efficiency as the most important parameters for high power applications are compared between the described topologies. The ability of DCC to operate with low switching modulation and higher efficiency makes this topology attractive. But low reliability, unequal loss distribution and higher complexity both in control and hardware have limited the use of this topology for high power and higher voltage levels. Same problems can be mentioned for CCC. CLC, with its ability of operating with high number of cells and low switching frequency, high reliability and modularity, is one attractive alternative for high power applications. The most wellknown CLC topologies were investigated. SSBC and SDBC are more attractive for STATCOM applications than DSCC and DSBC since they are less complex and cheaper. There is no generic rule to choose SSBC or SDBC and the selection depends on the specific application. SSBC needs minimum number of cells, due to the lower voltage rating of this topology. When comparing SSBC and SDBC, SSBC is the most preferable choice for positive sequence reactive-power control. Under unbalance load or grid voltage condition the SSBC can add a common zero-sequence voltage to each of the three phase voltages. The zero-sequence voltage increases the number of cells per phase, but it can be used for voltage balancing control of all the floating split dc capacitors in the STATCOM. The SDBC can be an alternative for STATCOM under unbalance load or grid voltage conditions because the problem of overvoltage can be solved by using a circulating current. The circulating current exchanges power between phases and as consequence of the number of cells per phases will not increase.
References  Andersson G, Donalek P, Farmer R, Hatziargyriou N, Kamwa I, Kundur P, Martins N, Paserba J, Pourbeik P, Sanchez-Gasca J, Schulz R, Stankovic A, Taylor C, Vittal V.: Causes of the 2003 major grid blackouts in North America and Europe, and recommended means to improve system dynamic performance, IEEE Transactions on Power Systems, Vol. 20 no 4, pp. 1922 – 1928, Nov. 2005.  Hingorani N.G, Gyugyi L.:Understanding FACTS. Concepts and technology of Flexible AC Transmission Systems, New York: IEEE Press, 2000.  Song Y.H, Johns A.T.: Flexible AC transmission systems (FACTS), London: The Institution of Electrical Engineers, 1999.  Davidson C.C, De Preville G.: The future of high power electronics in Transmission and Distribution power systems, in Proc. of 13th European Conference on Power Electronics and Applications, 2009 (EPE '09), pp. 114, 2009.  Daher s, Schmid J, Antunes F. L. M.: Multilevel inverter topologies for stand-alone PV system, IEEE Trans. Industrial electronics vol. 55 no 7, pp. 2703-2712, 2008.  Rodríguez J, Lai J. S, Peng F. Z.: Multilevel inverters: A survey of topologies, controls, and applications, IEEE Trans. Industrial electronics vol. 49 no 4, pp. 724-738, 2002.
 Malinowski M, Gopakumar K, Rodriguez J, Pérez M. A.: A survey on cascaded multilevel inverters, IEEE Trans. Industrial electronics vol 57 no 7, pp. 2197-2206, 2010.  Singh B, Mittal N, Verma K. S. Singh D, Singh S. P, Dixit R, Singh M Baranwal A.: Multilevel inverter: A literature survey on topologies and control strategies, International Journal of Reviews in Computing vol. 10, pp. 1-16, 2012.  Rodríguez J, Bernet S, Wu B, Pontt J. O, Kouro S.: Multilevel voltage-source-converter topologies for industrial medium-voltage drives, IEEE trans. Industrial electronics vol. 54 no 6, pp. 2930-2945, 2007.  Sood V.K.: HVDC and FACTS controllers - applications of static converters in power systems, Boston: Kluwer Academic Publishers, 2004.  Chen Q, Wang Q, Li G, Ding S.: The control of unequal power losses distribution in three-level neutralpoint-clamped VSC, 15th International conference on electrical machines and systems (ICEMS), pp. 1-5, 2012.  Peng F. Z, Qian W, Cao D.: Recent advances in multilevel converter/inverter topologies and applications, International Power Electronics Conference, 2010.  Vivas J. H, Bergna G, Boyra M.: Comparison of multilevel converter-based STATCOMs, Power Electronics and Applications, 2011.  Lauttamus P, Tuusa H.: Comparison of five-level voltage-source inverter based STATCOMs, Power Conversion Conference, 2007.  Barrenal J. A, Aurtenecheal S, Canales J. M, Rodriguez M. A, Marroyo L.: Design, analysis and comparison of multilevel topologies for DSTATCOM applications, Power Electronics and Applications, 2005.  Baraia I, Thomas J. L, Barrena J. A, Galarza J, Rodriguez M. A.: Efficiency comparison between a hybrid cascaded connected seven level converter and a standard cascaded connected seven level converter for STATCOM applications at 15 kV utility grids, Power Electronics and Applications, 2009.  Soto D, Green T. C.: A comparison of high-power converter topologies for the implementation of FACTS controllers, IEEE Trans. Industrial electronics vol. 49 no 5, pp. 1072-1080, 2002.  Ananth D. V, Kumar Y. N, Tilak B. B. G, Raghunath P. S.: Multi-level inverters and its application of statcom using svpwm and spwm techniques, IOSR Journal of Electrical and Electronics Engineering (IOSRJEEE) vol. 2 no 5, pp. 30-38, 2012.  Pavelka J, Sivkov O.: Analysis of capacitor dividers for multilevel inverter, Power Electronics and Motion Control Conference, 2008.  Hagiwara M, Maeda R, Akagi H.: Negative-sequence reactive-power control by a PWM STATCOM based on a modular multilevel cascade converter (MMCC-SDBC), IEEE Trans. Industrial electronics vol. 48 no 14, pp. 720-729, 2012.  Akagi H.: Classification, terminology and application of the modular multilevel cascade converter (MMCC), IEEE Trans. Industrial electronics vol. 26 no 11, pp. 3119-3130, 2011.  Betz R. E, Summerst T, Furneyt T.: Symmetry compensation using a H-bridge multilevel STATCOM with zero sequence injection, Industry Applications Conference, 2006.  Fujii K, Schwarzer U, Doncker R. W. D.: Comparison of hard-switched multi-level inverter topologies for STATCOM by loss implemented simulation and cost estimation, Power Electronics Specialists Conference, 2005.  Hagiwara M, Maeda R, Akagi H.: Control and analysis of the modular multilevel cascade converter based on double-star chopper-cells (MMCC-DSCC), IEEE Trans. Industrial electronics, vol. 26 no 6, pp. 1649-1658, 2011.  Akagi H, Inoue S, Yoshii T.: Control and performance of a transformerless cascade PWM STATCOM with star configuration, IEEE Trans. Industry applications vol. 43 no 4, pp. 1041-1049, 2007.  Grünbaum R, Sannino A, Wahlberg C.: Use of FACTS for enhanced flexibility and efficiency in power transmission and distribution grids, World Energy Congress, Montreal, 2010