Applications of Graphene-Based Materials in ...

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Applications of Graphene-Based Materials in Electronic Devices Gaurav Gupta, Minggang Zeng, Argo Nurbawono, Wen Huang, and Gengchiau Liang

CONTENTS Abstract...................................................................................................................................................................................... 279 19.1 Introduction...................................................................................................................................................................... 279 19.2 Graphene and GNRs......................................................................................................................................................... 280 19.3 Graphene Devices............................................................................................................................................................. 281 19.3.1 Electro-Optic Devices.......................................................................................................................................... 281 19.3.2 Radio-Frequency Transistors................................................................................................................................ 283 19.3.3 Thermal Transport Device.................................................................................................................................... 284 19.4 GNR Devices.................................................................................................................................................................... 284 19.4.1 Metal–Oxide–Semiconductor Field-Effect Transistor......................................................................................... 284 19.4.2 Tunneling Transistors........................................................................................................................................... 285 19.4.3 Resonant Tunneling Devices................................................................................................................................ 287 19.4.4 Interconnects......................................................................................................................................................... 288 19.5 Spintronic Devices............................................................................................................................................................ 288 19.5.1 Magnetoresistance Device.................................................................................................................................... 289 19.5.2 Spin Diode............................................................................................................................................................ 289 19.5.3 Spin-Logic Device................................................................................................................................................ 290 19.5.4 Spin Transistor...................................................................................................................................................... 290 19.5.5 Spin Caloritronic Device...................................................................................................................................... 292 19.6 Recent Commercial Developments.................................................................................................................................. 293 19.7 Conclusion........................................................................................................................................................................ 293 References.................................................................................................................................................................................. 293

ABSTRACT

19.1 INTRODUCTION

Graphene is a forerunner in research on two-dimensional materials and their applications. The large mean-free path, excellent thermal conductance, high mobility, and gapless Dirac bands in graphene mark the unique opportunities and challenges for its adaption for electronic devices. This chapter reviews the theoretical and experimental progress to date in deploying graphene and its variants in pure electronic and spin-hybrid devices. For digital applications, the switching transistors based on field-effect, electro-optics, and tunneling have been considered. The radio-frequency operation of graphene field-effect transistors (FETs) has been appraised for analog applications. The thermal management and suitability for interconnect in integrated circuits has also been discussed. The magnetoresistive devices and the spin analog of traditional electronic devices such as diodes, bipolar junction transistors, FETs, and digital logic have been discussed in this chapter for spintronic applications. The electrical and spintransport driven by thermal nonequilibrium in the absence of an electronic bias across the channel is another important emerging field that has been reviewed in this chapter.

Although the bandstructure of graphene, a perfect twodimensional (2D) sheet with carbon atoms arranged in a honeycomb crystal lattice, had been predicted in 1947 [1], it has been very difficult to obtain such a thin one-atomic-layer material and it was generally expected that monolayer graphene was unstable in nature [2]. In 1991, a one-dimensional (1D) carbon material called carbon nanotube (CNT) was discovered [3]. CNT evinces metallic or semiconducting electronic bandstructure depending on the chirality of the tube, and shares a lot of fundamental properties and applications with graphene. The chirality of CNTs can be understood and predicted from different orientations of a rolled graphene sheet [4]. In 2004, finally, a thermodynamically stable single layer of graphene was successfully synthesized by the physical exfoliation method [5] and an ambipolar transport was demonstrated to verify the Dirac bandstructure. Subsequent experiments on graphene nanoribbons (GNRs) also verified the chirality-dependent metallic and semiconducting characteristics analogous to CNT. Graphene, since then, has attracted the attention of researchers and has become the star 279

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material in the fields of physics, chemistry, bioscience, and engineering over the last decade. The carbon atoms in graphene form in-plane sp2-hybridized σ-bonds and out-of-plane π-bonds at each site. The former provides graphene a robust lattice resulting in high stress tolerance, and the latter offers graphene a unique electronic bandstructure with a linear dispersion at the Dirac points at the edge of first Brillouin zone (K points in the reciprocal lattice of graphene). Benefiting from the Dirac dispersion relation, a lot of interesting properties of graphene have been proposed and demonstrated. The Dirac fermions are massless and have the ability to travel at very high speed (~106 m s−1 [2]). The experimentally reported values of mobility have exceeded 200,000 cm2 V−1 s−1 [6,7] and 35,000 cm2 V−1 s−1 [8] for suspended and chemical vapor deposited (CVD) grown (on born-nitride substrate) graphene, respectively. For hexagonal-boron-nitride (hBN) heterostructure with graphene [9], electron mobility upto 100,000 cm2 V−1 s−1 at room temperature (T ), and 500,000 cm2 V−1 s−1 at low T have been reported recently. Furthermore, other important features such as quantum electrodynamics effects, the anomalous integer quantum Hall effect [10,11], Klein paradox [12], electro-optical effects [13], and extremely high thermal conductivity [14] have been reported theoretically and experimentally. Therefore, this chapter will focus on graphene’s possible applications in electronic devices such as RF transistors chip-interconnects and others based on electro-optical effects. Furthermore, due to the possibility to fabricate GNRs from top-down or bottomup approaches to create a band gap for the graphene-based material by quantum confinement effect [15–17] and some unique behaviors with spin polarizations under the external magnetic [18,19] and electric field [20], we summarize some research studies on metal–oxide–semiconductor field-effect transistors (MOSFETs) [17,21,22], tunneling field-effect transistors (FETs) [23–25], resonant-tunneling diodes (RTDs) [26], and spintronic devices based on GNRs [27–29]. For the fundamentals of graphene and GNRs, readers are encouraged to peruse further discussions in this book series, Volume 2, Chapter 26. Finally, Section 19.6 summarizes some recent developments from the commercial perspective.

suspensions with well-defined distributions of graphene platelets and allow control over chemical functionalization with good quality of the edges. Chemical exfoliations of graphite with organic solvents have also been used and can produce high-quality samples at even cheaper price than unzipping SWCNTs [33]. Much larger graphene films of square meter size have also been fabricated using a so-called roll-to-roll technique by Bae et al. [34] in collaboration with Samsung. The films have been transferred onto 200 mm Si wafers suitable for direct industrial production. Despite more defects found on these large films and some inclusions of thicker layers, they can already be used in transparent conductive coating applications such as touch screen devices. A review on various fabrication methods and their figure of merits has also recently been discussed by Novoselov et al. [35] (also see Table 19.1). As mentioned in the introduction, the most recent cited [9] mobility of graphene is over 200,000 cm2 V−1 s−1, which is close to the theoretical predictions. This ultrahigh mobility of Dirac particles was measured on large-area graphene samples fabricated with mechanical exfoliations, and they do not have a band gap. A band gap is, however, indispensable for practical devices in order to have an off-state. In practice, moreover, instead of a large-area graphene flake, often a highquality graphene nanoribbon (GNR) is more desirable because they can be used as transistors or p–n junction devices. The required band gap also can be introduced easily on GNRs simply by transverse confinements. The tight-binding model of graphene predicts both armchair graphene nanoribbons (AGNRs) and zigzag graphene nanoribbons (ZGNRs) to have a band gap that is approximately inversely proportional to the width of the nanoribbon. As we explained in Chapter 26 of Volume 2 in this book series, AGNRs are theoretically semiconducting and their band gap vary with the width in three distinct families. On the other hand, ZGNRs are theoretically always metallic with ferromagnetic edge states pointing in opposite spins. However, these preliminary theoretical

19.2 GRAPHENE AND GNRs

GNR Fabrication Techniques

From the application perspective, fabrication issues are the most important aspects of graphene devices since experimental measurements to date show strong sample-dependent performances. The highest quality of graphene that has been manufactured so far relies on the mechanical exfoliation of graphite [5]. This technique serves best for laboratory and experimental purposes which demand the highest quality and reasonably large (micron size) graphene flakes. Highquality transport measurements with the highest mobility are mostly exhibited by mechanically exfoliated graphene, being suspended or deposited on a suitable substrate like boron nitride [30]. There are also other methods to produce reasonably high-quality graphene by unzipping single-walled carbon nanotubes (SWCNTs) [31,32]. This method can achieve


TABLE 19.1 Summary of GNR Fabrication Techniques

Mechanical exfoliation of graphite Chemical exfoliation of graphite

Thermal epitaxial growths from SiC

Roll to roll technique with chemical vapor deposition

Main Characteristics High mobility, small crystalline flakes (several microns), suitable for lab purposes Lower mobility due to introduction of chemical complex and smaller crystalline flakes (few microns), suitable for labs. Overall sample size can be much larger than mechanical exfoliation techniques Much lower mobility due to more defects and smaller crystal sizes. It may be suitable for applications where SiC semiconductor substrates are required Low mobility and higher defects concentrations. Suitable for large-scale industrial fabrications of transparent conducting surfaces


Applications of Graphene-Based Materials in Electronic Devices

models exclude disorders which may change the properties significantly. The opening of a band gap in nanoribbons has been verified experimentally for widths down to about 1 nm [36,37], and they show band gaps more than 0.2 eV for widths 1 THz) [60,61] approaching that of mature III–V semiconductors. Simulations [62] have furthermore shown that down scaling below the state-of-the-art 40 nm Lg GFET [63] to sub-10 nm regime [64] can drive f T to few tens of THz. Moreover, in contrast to other semiconductors, the RF performance in GFETs has a larger thermal window for operation as they do not suffer from carrier freeze-out [65] at cryogenic temperatures. Therefore, tapping the immense potential of graphene RF technology and its challenges is currently a subject of intensive research. The most commonly used figure-of-merit for an RF transistor is high cut-off frequency f T, at which short-circuit current gain is unity, and high maximum-oscillation frequency fmax at which unilateral power gain (U) for an impedance matched system is one, both of which are extracted by deembedding S-parameters. Short-circuit output and good impedance matching, however, do not represent a real system, for which open-circuit voltage gain (Av) becomes a more practical criterion for comparing performance [63]. Experiments, mainly at IBM Thomas J. Watson Research Center (Yorktown Heights) [60] and Duan’s Group (Los Angeles) [61], have considerably improved these parameters for graphene RF transistors. To understand the unmet challenges and appreciate the advancement (see Table 19.3) from the first demonstration of 26 GHz intrinsic f T on mechanically exfoliated 150 nm long graphene channel [66] to 1 THz on sub-60 nm long for

TABLE 19.3 Deterrents for Graphene RF Transistors Problem Bottom substrate and top dielectric

Absence of current saturation implying unstable quiescent point Gate misalignmentinduced parasitic Work-function difference at contacts’ metal– graphene interface

Solution Transition from SiO2 substrate to DLC substrate and BN dielectric Polyimide substrate to achieve current saturation Self-aligned gates Palladium contacts with full back-gating

Note: I: intrinsic; E: extrinsic.


Attained fT or fmax (GHz) fT: 300 (I) [63]; 44 (I) [71] (but highest fmax/fT) fmax: 10 [72]

fT: 100–300 (I) [73]; 23 (E) [74] fmax: 30 [76]

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exfoliated [67], 300 GHz (350 GHz) on 40 nm long for CVD (epitaxial) [63], and 50 GHz extrinsic f T on 170 nm long for CVD [68] grown graphene, it is important to understand the factors that limit the performance. Specifically, f T = gm /2πCox, fmax = fT / (2 gDS ( RGate + Ri + RS ) + 2πfT CGD RGate ) [60], and Av = gm /(gDS + 1/Rload), where gm is the transconductance, Cox the gate dielectric capacitance, gDS the differential source/ drain conductance, RS the source resistance, Ri the channelsided charging resistance of the gate/source capacitance, CGD the gate-to-drain capacitance, RGate the gate resistance, and Rload the load impedance during measurement. Particularly note that gm is proportional to mobility and inversely proportional (roughly independent) to length in diffusive (ballistic) regime, Cox is directly proportional to length, which gives f T a direct linear dependence on mobility and inverse secondorder (first-order) dependence on length, indicating that highmobility small channel length GFETs should have high f T. The mobility of graphene can significantly degrade due to the underlying substrate [69] and the top dielectric because of their phonon modes and substrate-induced doping [60]. The acoustic phonons in graphene itself have relatively negligible effect on gm [70]. Therefore, RF performance has improved on migrating from silicon dioxide (SiO2) [66] to diamond-likecarbon (DLC) [63] substrate and boron-nitride (BN) dielectric [71]. Furthermore, the lack of band gap in graphene coupled with the substrate effect makes it difficult to achieve current saturation [43] and thus results in an unstable quiescent point and gm. Recent research has, however, demonstrated current saturation with a reasonable RF performance of GFET on a polyimide substrate [72]. A second level of f T degradation results from top-gate deposition-induced misalignment. It abets parasitic-like large access resistance and overlap capacitance. Much improvement has now been achieved by using selfaligned gate structures with nanowire gates or metal-T gates [73,74] by shadow masking and the conventional complementary metal oxide semiconductor (CMOS) technique [75]. Next, the metallic contacts that form source and drain terminal are bottlenecks in achieving high fmax and Av. Charge carriers have to tunnel through the electrostatic barrier created at the metal– graphene interface, due to the difference in work function (φ), and the p–n junction created between the graphene segments under contacts and channel [60]. Use of palladium electrodes that have lower φ mismatch and placing the back-gate under the entire device to first control the metal-induced doping in the graphene under contacts and second to reduce the output conductance (gDS) has recently [76] improved both fmax and Av. Experimental studies have not been limited to isolated graphene RF transistors. Although yet only operating in 10 MHz to 10 GHz frequency range, integrated circuits with unique functionalities such as transceiver [77], ambipolar mixers [78,79], triple mode amplifiers [80], frequency multiplication beyond the transit frequency range [81,82], and audio amplifier [83] have been successfully demonstrated. The detailed review of applications is, however, beyond the scope of the current work. Operational frequency has mainly been limited due to nonoptimized parasitic and degradation due to integration of passive elements [60].

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19.3.3 Thermal Transport Device There is an increasing interest in the thermal properties of graphene ignited by experiments revealing the superior thermal conductivity of graphene. It has been demonstrated that the thermal conductivity of the suspended single-layer graphene is in the range of about 3000–5000 W m−1 K−1 [14,84], which suggests its potential use as a future thermal management material. Experiments have also shown the exceptionally high thermal conductivities for few-layer graphene and graphene flakes depending on the width and temperature [85–87]. Despite the high thermal conductivity, investigations on transport properties of graphene high-field devices have shown that the mobility and current situations are very sensitive to the scattering of electrons by surface phonons of the SiO2 substrate [88,89]. In addition, low thermal boundary resistance at the interface of graphene and substrate necessitates efficient heat dissipation for thermal interface material applications. Hence, vertically stacked graphene in a threedimensional (3D) architecture is good to overcome the weak van der Waals interactions in out-of-plane thermal coupling owing to very high anisotropy of thermal properties of graphene. Theoretical and experimental works have demonstrated 3D nanostructures such as nanoporous pillared graphene with combined forms of CNTs and graphene sheets [90], graphene foams with direct synthesis of 3D foam-like graphene macrostructures [91], and 3D vertically aligned functionalized multilayer graphene architecture [92], which are beneficial for an enhanced hydrogen storage, flexible conductors, and energy management applications. Moreover, thermoelectric transport measurements of graphene have shown thermoelectric power of ~80 µV K−1 at room temperature and ~50 µV K−1 at low temperature in high-mobility graphene samples [93,94]. However, besides high electronic conductivity and moderate thermoelectric power, the thermal conductivity must be suppressed to achieve an efficient thermoelectric energy conversion device.

19.4 GNR DEVICES 19.4.1 Metal–Oxide–Semiconductor Field-Effect Transistor Semiconductor transistors, especially MOSFETs, have become the most successful electronic devices in the world. There are billions of transistors in our routine devices used for computing, communication, display, and data storage applications. To enhance their performance, the endeavor for higher speed and larger transistor density, in the past few decades, has successfully driven the miniaturization of silicon planar MOSFETs. Continuing this scaling trend, however, siliconbased MOSFETs will face its fundamental physical limitation. Therefore, novel channel materials with high carrier mobility are required to meet future generation technology requirements as predicted by International Technology Roadmap for Semiconductors (ITRS) [95]. As introduced previously, graphene with extremely high mobility [9] is expected to be the best candidate to close this technology gap.



Unfortunately, the lack of a band gap in graphene restrains its applicability to conventional MOSFETs, which rely on band gap to switch-off the transistors to provide a large ratio of on to off state currents. Therefore, the AGNR has been of great interest as a potential candidate to overcome this problem because of its intrinsic semiconducting property with a tunable energy band gap that depends on the ribbon width and atomic configurations at its edges. Particularly, the AGNR is theoretically expected to exhibit promising electronic properties and extremely high electron/hole mobility [39], similar to the properties observed in CNTs. Furthermore, recent studies based on the semiclassical transport model coupled with bandstructure of nanoribbons using a single pz -orbital tightbinding method have shown that the upper-limit performance of ballistic GNR-FETs is similar to CNT-FETs and should be able to outperform silicon MOSFETs in terms of drive current capabilities by over 100% [17]. In addition, more panoptic atomistic simulations based on quantum transport theory, in terms of the nonequilibrium Green’s function (NEGF) approach, self-consistently coupled to a 3D Poisson’s solver for the treatment of electrostatics has been implemented to investigate the current–voltage characteristics of GNR MOSFETs and GNR Schottky barrier (SB) FETs [21,22,96]. This approach can capture the tunneling behavior and a realistic real-space potential profile which are overlooked in the classical model. However, these play an important role in the short channel effects of nano-scale FETs, such as leakage current, caused by the direct tunneling from the source to the drain, and drain-induced-barrier lowering (DIBL). Based on simulation results [96], it has been found that GNR MOSFETs with 1.5 nm width might have the potential to outperform a double-gate 10-nm-scale Si MOSFETs in terms of SS, DIBL, and on-current. However, tunneling processes should bar the larger width GNRs from such applications because tunneling will degrade the performance of the GNR MOSFET-type device. It also indicates that graphene with an infinite width is not suitable for digital MOSFET applications. However, the high tunneling rate in GNR through the direct band gap may find other potential applications such as GNR MOSFETs operating in band-to-band tunneling (BTBT) mode or tunneling FETs, which will be introduced in Section 19.4.2. Another important aspect of the GNR FET device is that for the SB contacts, the metal should be deposited in the source and drain region, which might be challenging and expensive from the fabrication and experimental point of view. On the other hand, graphene/doped graphene can be treated as a metal with high mobility. As a result, it is of great interest to make use of the graphene sheet itself as the devices’ contacts to have a full graphene device, and understand the dependence of the device behavior of the GNR FETs on the contact types and shapes of the graphene sheet [97]. As shown in Figure 19.2, the effect of the following five different types of contacts has been investigated: (a) the semi-infinite normal metal with constant surface density of states in the energy region of interest (L and W → ∞), (b) the semi-infinite graphene sheet contacts (L and W → ∞), (c) the finite-size rectangular graphene type of contacts, (d) the finite-size wedge-shaped contacts, and (e)

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(a) S

(b)

SiO2

tins

SiO2

tins

(d) D

L W

2D contact SB FET

Source

∞ Drain

(e) L

∞

W (f )

(c)

W


∞ L

∞

FIGURE 19.2 (a) Schematic of the simulated dual-gate graphene nanoribbon SBFETs. The oxide thickness (tins) is 1 nm and the channel length is 12.5 nm. (b–f) Top view of (a) for different contact shapes. (b) The source and drain parts are composed by a semi-infinite metal (L and W→∞). (c) The source and drain parts are composed by a semi-infinite graphene (L and W→∞). (d) The source and drain parts are composed by a finite rectangular shape graphene electrode. (e) The source and drain parts are wedge shaped graphene sheets with zigzag edges. These contacts gradually decrease their width from infinite (far from the channel) to the size of the channel (at the contact points). (f) The GNR contact with zigzag edges and same width as the channel. (Adapted from G.C. Liang et al., Nano Letters, vol. 8, no. 7, pp. 1819–1824, Jul, 2008.)

the 1D zigzag GNRs contacts. Note that the nanoribbons are designated as zigzag or armchair by the shape of their edge; it is in a sense opposite to the designation of CNTs. As shown in Figure 19.3, it is observed that the intrinsic (undoped) semiinfinite graphene contacts have poor performance, but the doped (chemically or electrostatically) graphene can exhibit a better performance in terms of Ion to Ioff ratio. Furthermore, the finite-size wedge-shaped graphene contacts and the finitesize rectangular-shaped graphene contacts show better Ion to Ioff ratios compared to the two former cases. The best of these different graphene contacts might be zigzag GNRs which not only show promising Ion to Ioff ratios but also high Ion because of their strong metallic nature. It has also been found that they could be the candidates for interconnects [98] between the metallic or graphene electrodes and the channel. All of the results introduced so far have been based on coherent transport. However, in realistic devices, scattering mechanisms play an important role in the carrier transport and normally reduce device performance. For example, the experimental results suggested that at low VDS, Ion preserves only about 15% of ballistic efficiency whereas at high VDS, the ballistic efficiency of Ion can reach up to 40% [41]. This interesting phenomenon can be attributed to mainly two scattering mechanisms, phonon vibrations and edge roughness (ER) (disorders). The former includes acoustic and optical phonons that commonly exist at room temperature in most materials. It has been understood that the acoustic phonon can reduce current for long channels, though its effect is negligible in short-channel devices. For the optical phonon, its mfp is around 10 nm, which although of the order of the device channel under study, has less significance on impact on the device


performance [99]. It is mainly the high optical phonon energy around 160 meV that results in less probability of backscattering in the device channel. Another important effect is ER in GNRs, which has been identified as the most challenging work from the fabrication’s point of view due to the difficulty in making perfect edges, even though some groups have claimed to fabricate smooth-edged GNRs. As has been discussed in Chapter 26 of Volume 2, the electronic structure of a GNR is very sensitive to its width. Even for a very small change, it can cause significant variation in the band gap and its effective mass, which subsequently affects the carrier transport properties. Several studies have shown similar results that the ER can degrade the device dramatically [100]. For example, an average leakage current for 2.2 nm wide GNR SBFET increases by 2.7 times when the ER increases from 5% to 10%, whereas for 1.4 nm width it increases by a factor of 11.2. In addition, a small ER of 5% is tolerable for all GNR SBFETs, with the average Ion /Ioff lowered from 4012 to 3075 for 1.4 nm width. However, a further increase in ER to 20% degrades the performance significantly, dropping Ion / Ioff to 273. Therefore, it becomes an important challenge to maintain the reliability of GNR FETs in real applications, and therefore requires more efforts to overcome this issue to realize a more practical device in the future [101].

19.4.2 Tunneling Transistors Although novel channel materials, such as III–V materials, GNR, etc., might enhance device performance and keep the device successfully scaling down in the near future, it increases the power consumption in each chip. It has been predicted that

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Graphene Science Handbook MOS FET off-state

10–6

TFET off-state

IDS (A)

10–8 N

10–10 10–12

0

0.2

0.4 VG (V)

0.6


IDS (A)

10–8

10–10

0.2

0.4 VG (V)

0.6

FIGURE 19.3 (a) Transfer characteristics of the armchair GNR SBFET with widths of 1.4 nm (solid), 1.6 nm (dashed), 3 nm (dotdashed), and 4 nm (triangle) under VDS = 0.5 V. The contact in all cases is a semi-infinite normal metal. The bandgaps for these different width armchair GNRs are around 0.66, 0.95, 0.5, and 0.26 eV respectively. The 1.6 nm wide armchair GNR FET shows the best Ion/Ioff ratio compared with the other three types because it has the largest bandgap. (b) Transfer characteristics of the 1.6 nm wide GNR SBFET with different types of graphene type of contacts: the semiinfinite normal metal (dashed line), the semi-infinite graphene sheet [solid line, intrinsic (undoped) and dot-dashed line, doped], finite size rectangular shape graphene sheet (L = 3 nm, W = 5 nm as in Figure 19.2d; square markers), wedge shape graphene sheet (L = 3 nm, W = 5 nm as in Figure 19.2e, triangle markers), and zigzag GNR contacts (L = 3 nm, W = 1.6 nm as in Figure 19.2f, diamond markers). The ON (Imax) to OFF (Imin) ratio are 1.5×105, 4×103, 1×104, 3×104, 5×103, and 3×104 for the contact cases: normal metal, intrinsic graphene sheet, doped graphene sheet, rectangle shape graphene sheet, the wedge shape graphene sheet, and the 1D armchair GNR, respectively. VDS = 0.5 V is applied in the simulations. (Adapted from G.C. Liang et al., Nano Letters, vol. 8, no. 7, pp. 1819–1824, Jul, 2008.)

the power density in a high-end microprocessor can soon reach the level of a nuclear reactor and even the level of the sun’s surface in decades, a situation which is obviously untenable. The reason is that the power density, due to dissipated heat in chips, has been increasing exponentially with the increase in the number of transistors per chip. Unfortunately, this problem may not be overcome with conventional CMOS technology because power dissipation constitutes a fundamental limit of the conventional operation principle of MOSFETs due to its reliance on thermionic electron transport, that is, 60 mV/ decade of the SS at room temperature. This thermionic mechanism limits the ability to down scale the operating bias, resulting in high power consumption in MOSFETs [102]. As a result, novel device structures based on different device physics and


Length

N

P

I on-state

N

Length

FIGURE 19.4 Schematics of operation principle of MOSFETs and TFETs.

10–6

0

I on-state

carrier transport mechanisms have been suggested to reduce the bias and power consumption of electronic devices. Among the different devices proposed, tunneling field-effect transistors (TFETs) have attracted a lot of attention from the device engineering community because of their simple operation principle and a device structure which is similar to MOSFETs, the latter reason being of greater interest for the semiconductor industry. Unlike MOSFETs, the TFET is a three terminal p–i–n device. As shown in Figure 19.4, the off-state current of TFETs is regulated by the electron tunneling through the source to the drain. Due to the long tunneling path, the current is suppressed and should be very low. As a positive gate bias is applied, the channel potential moves down until the conduction band edge of the channel and the top of the valence band edge of the source align, when the current abruptly increases due to the short tunneling path and a strong electrical field between the tunneling junctions. It is identified as the on-state current. Since this device is not relying on the thermionic electrons to transport through the barrier, the operation bias can be small, few hundred mV in principle, resulting in a significant reduction in the power consumption of each device. Although Si-based TFETs have been studied previously, their on-state current is too small because of their heavy effective mass and indirect band gap, which renders them unsuitable for practical applications. A few other improved structures have also been proposed, such as Ge TFETs, III–V TFETs, and broken gap TFETs, to provide a higher on-state current due to their smaller effective mass, direct band gap, and a sharper electrical field between the channel and drain. In addition to these materials, AGNR has also been considered a potential candidate for TFETs because of the smaller effective mass of the carrier and the tunablity of the band gap by controlling the GNR’s width. As a result, a heterojunction can be fabricated using the same materials to avoid lattice mismatch from different semiconductor materials. The previous theoretical studies [25] have shown that GNR TFETs can reach an on to off current ratio of more than 1010 with a gate voltage sweep of just 300 mV and the SS can be 109 A cm−2 [111]) without material breakdown. Additionally, low in-plane dielectric constant (κ) [112], large thermal conductivity [14], that pacifies electromigration, and large mfp (~1 μm [113]), hence high momentum relaxation time, positions GNR as a good interconnect material for high-frequency chips. However, monolayer GNR interconnect [114] has low mode density which makes it highly resistive, while interlayer coupling in multilayer GNR (MLGNR) degrades electron mobility. The intercalated zigzag-edged MLGNR (side contacts) of high specularity (p ~ 1), that is, inducing approximately no momentum change along the length of ribbon due to edge scattering, of sufficient interlayer separation is thus considered an imminent solution for power interconnects [115] and interconnects that carry low [116] and high [117] frequency signals. Note that subsequent discussion on GNR for interconnects refers to only doped zigzag MLGNR unless specified otherwise. A physics-based model of a GNR interconnect [118] is illustrated in Figure 19.6. Using this model it has been shown Rcontact

RQ/2 RSC dx

dx LM dx

RQ/2

Rcontact

LK dx CQ dx

CE dx

FIGURE 19.6 Transmission line equivalent circuit of GNR interconnects wire [116]. dx is small segment of wire, Rcontact the metal– graphene interface resistance, RQ the quantum contact resistance, RSC the scattering resistance due to defects, phonons, and ER (specularity), L M the magnetic inductance, LK the kinetic inductance, CQ the quantum capacitance, and CE is electrostatic capacitance. RQ = (h/2q2)/ NchNlayer, CQ = NchNlayer 4q2/hvf, LK = (h/4q2vf)/NchNlayer, Nch is number of modes, Nlayer number of GNR layers, vf Fermi velocity, h Planck’s constant, and q is charge. As can be seen from equations, CQ and LK start to dominate for low mode density and regulate high-frequency small-signal propagation characteristics of the wire [143].


[116] that stage-2 AsF5 doping in MLGNR of moderate specularity (p = 0.8) has much better (comparable) performance than Cu local (global) interconnects at 11 nm node, though SWCNT betters MLGNR for global interconnects (see Table 1 of Reference 116 for comparison among Cu, SWCNT, multiwalled (MW) CNT, and GNR for 11 nm technology node). The transient analysis [119] of step response and Nyquist stability of the MLGNR interconnect using the same model with finite contact resistance, furthermore, shows that although the propagation delays are smaller than SWCNT, it has marginally stronger overshoots and lesser stability which worsen as its width and length decrease. Therefore, if the overshoots are within the design constraints, MLGNR should enable faster signal propagation as a local interconnect. Next, the wire width can be of the order of 1 μm for global interconnects which is much larger than the skin depth at high frequencies (>1 GHz) [117]. The ensuing anomalous skin effect (ASE) redistributes the current– density in GNR and has to be modeled by self-consistently solving the Boltzmann equation with nonlocal electric field in the wire [120]. Comprehensive simulations estimate [120] the resistance of MLGNR, even of low specularity, to be lower than the resistance of the SWCNT bundle (Cu) up to 200 GHz (entire μW range). There are two key differences between the experiments [111,121,122] and side-contact MLGNR model discussed above. Substrate-induced doping shifts the Fermi energy from the neutral point, but the effect decreases exponentially [110] toward top layers. The disparate conductance of each GNR layer results in divergence from the uniformly conducting independent layer model. Second, contacts are connected on top of the MLGNR in experiments [111]; therefore, unlike the assumption that conductance increases with number of GNR layers, conductance has recently been shown [123] to saturate with layers because the contacts effectively couple only with few top layers. The signal delay and energy-delay product (EDP) is minimized for an optimal number of layers, which is a function of interconnect length, interlayer coupling, and specularity. Top-contacted MLGNR interconnect with very smooth edges may still perform better than Cu for short lengths, though with doping optimizations [124] the performance can be improved even for longer interconnects. It should also be noted that MLGNR may transition to graphite [125] around eight layers of thickness rending it useless for interconnects. This puts an upper boundary on choice of optimized number of layers calculated from the analytical model. For more comprehensive review on performance evaluation of GNR interconnects against copper/low-κ interconnects, the reader is referred to Reference 126.

19.5 SPINTRONIC DEVICES Graphene manifests a rich set of characteristics conducive for spintronic devices. Long spin-diffusion length, high thermal conductivity, and band gap tunability has been maneuvered for new device possibilities as discussed below (also see Table 19.4).

289


TABLE 19.4 Summary of Graphene-Spintronic Devices Spintronics Devices

Challenges

1. Tunability of band gap and conductance in GNRs by magnetic fields [128,129] 2. The MR ratio of GNRs is stable against edge roughness

Spin diode

The transmission selection rule in even-N ZGNRs allows highly spin-polarized currents to be generated and tuned by source–drain voltages and/or magnetic configurations [18,131] A complete set of logic gates (AND, OR, NAND, and NOR) can be designed based on the above spin diode [28] The current flowing through magnetized ZGNRs can be driven by a temperature difference between the source and drain [29] Datta-type spin transistor by introducing spin–orbital coupling into graphene sheet through the proximity effect using a ferromagnetic insulator or through the hybridization effect with heavy 5d-elements [134,135] BJT- or FET-type spin transistors exploited the edge states of ZGNRs [27,131]

Spin-logic device Spin caloritronic device Spin transistor


Features

Magnetoresistance device

19.5.1 Magnetoresistance Device Theoretical studies have predicted n = 0 Landau level in the presence of a very high magnetic field [2], a property unique to graphene-based materials. Although it is difficult to observe this phenomenon for practical magnitudes of magnetic field, a recent experimental study has successfully reported a decrease in the band gap of GNR with the increase in magnetic field [127] as expected from theoretical studies of this phenomenon. According to this interesting characteristic, the electron conductance can be modulated by the magnetic field resulting in magnetoresistive effects in GNR devices [128,129]. A very large magnetoresistance (MR) has been demonstrated experimentally [127]. The benefit of this device is that unlike conventional spin-valves which need ferromagnetic lead, this MR is the intrinsic material behavior and just requires a full graphene (GNR) sheet, which should be easier for industrial fabrication. Furthermore, unlike MOSFETs, TFETs, and RTDs in which ER degrades the performance significantly, for GNR MR-devices, the impact of ER is relatively less because the Lorentz force bounds the electron to the edge that results in a high transmission rate. However, a theoretical study [19,128] has also found that to have a band gap modulation for smaller magnetic fields, a large width GNR with a small band gap is necessary. A small band gap also indicates that thermionic electrons can take over the transport properties and suppresses MR at a higher temperature due to the spread of the Fermi distribution function. Therefore, to circumvent this problem, a p–i–n heterostructure AGNR device has been theoretically proposed [130]. In this structure, a narrow GNR and a wide GNR are implemented in the contact and channel region, respectively. Like tunneling FETs, the function of the former is to block the thermionic electrons in the source due to its band gap and operate the larger width GNR in the channel under a small magnetic field. Moreover, because of the different size of channel and contacts, multiple GNR strips can be implemented as contacts to enhance the current to drive


Wide GNRs are required to have a reasonable band gap modulation with practical magnetic fields at room temperature Magnetized ZGNRs with smooth edges are necessary

Weak spin–orbital coupling and metallic states near the Fermi level due to the proximity or hybridization effect ZGNRs with smooth edges are necessary

B field

(a) Source

y x (b) μs μD

P

B=0

Nonequilibrium LOW-state

Channel

I Oxide gate (c) B > 0 μs μD

Drain N

Nonequilibrium HIGH-state

FIGURE 19.7 (a) A schematic of a back-gate p–i–n heterostructure AGNR device, consisted of the p-type source, intrinsic channel, and n-type drain. The external magnetic field is applied to modulate the bandgap of AGNRs in order to obtain MR. (b) and (c) Schematics of band profile under B = 0 T and B > 0, identified as LOW-state and HIGH-state, respectively. The inset in (b) shows the multiple sourcedrain channel strips used in the simulation. (Adapted from G. Liang et al., Applied Physics Letters, vol. 99, no. 8, pp. 083107, 2011.)

other devices in the circuit. As shown in Figure 19.7, it has been found that the MR of this p–i–n heterostructure AGNR device can reach three orders under 5 T of field, in contrast to around 10% MR using normal metal contacts.

19.5.2 Spin Diode In addition to half-metallic and spin filter effects, ZGNRs have been predicted to show MR effect, which is essential for graphene-based magnetic storage applications. Kim et al. [18] predict that very large MR can be obtained in a ZGNRs-based spin valve. They first find that a moderate magnetic field >2.2 T is enough to transit a wide ZGNR with 8.73 nm width for its ground state to a magnetized state; and a weaker magnetic

290

Graphene Science Handbook I

(a)

MR = 0

ML = 1

VR

G

VL

R N

ons

ectr ction of el

d

a le

Flow dire

G R N le ad

I

(b)

ons

tr ion of elec Flow direct


x

y

z

FIGURE 19.8 Schematic of a ZGNR-based bipolar spin diode. ML ,R represent the magnetization of the electrodes, whose values can be ±1 and 0 which correspond to magnetization along ±y direction and nonmagnetic lead, respectively. (a, b) For [ML ,MR] = [1,0], a positive (negative) bias can only drive spin-down (up) electrons through the device. The circuit diagram of this bias-controlled bipolar spin diode is shown in the inset. (Adapted from M.G. Zeng et al., Physical Review B, vol. 83, no. 11, pp. 115427, Mar 14, 2011.) [ML, MR] Bias

[1, 1]

[1, –1]

[1, 0]

[1, 0]

[0, 0]

+ –

FIGURE 19.9 Spin current flowing through ZGNR channel can be selected by source–drain voltages and magnetic configurations. (Adapted from M.G. Zeng et al., Physical Review B, vol. 83, no. 11, pp. 115427, Mar 14, 2011.)

field can be used for a ZGNR of larger width. They calculate the MR ratio as MR = (R AP − RP)/RP, where R AP and RP are the resistances in the magnetic parallel and antiparallel configurations, respectively. The calculated MR ratio can be as high as 106 for an 8-ZGNR at room temperature. The large MR is contributed to the transmission selection rule due to the matching/mismatching wave function symmetry in spin sub bands. A further design exploited the transmission selection rule in a spin diode shown in Figure 19.8, in which highly spin-polarized currents can be generated and tuned by the source–drain voltages and/or magnetic configurations [131], which is summarized in Figure 19.9.

19.5.3 Spin-Logic Device ZGNRs-based spin diodes make it possible to build spinlogic devices [28]. The logic inputs are encoded by the


magnetization of the terminals. The logic output is encoded to be 1 (0) if the output current includes (excludes) the spinup current. Figure 19.10 shows the schematic of a NOT gate. If the magnetization of the left electrode is set to −1 (logic input 0), the spin-up channel is conducting, corresponding to a logic output 1. On the other hand, the spin-down channel is conducting (logic output 0) when the magnetization of the left electrode is set to 1 (logic input 1). The NOT logic operation is thus realized. Similarly, other logic gates, such as AND, OR, NAND, and NOR gates, can also be realized based on the above design concepts. These logic gates allow further designs of complex spin logic operations and pave the way for the full implementation of spintronic computing devices.

19.5.4 Spin Transistor Long spin diffusion length and large spin relaxation time in graphene have attracted great attention for utilizing graphene as a channel for the Datta-type spin FET [132,133]. However, two crucial issues need to be resolved. Due to the fact that graphene is nonmagnetic, an efficient spin injection and detection at the source and drain requires ferromagnetic metals and a high-quality tunnel barrier. Moreover, the negligible spin–orbit coupling (SOC) in graphene is a strong limitation for designing Datta-type spin FETs. Using a ferromagnetic insulator (FMI) as the gate dielectric may overcome this limitation. The electric-field-controlled proximity effect originating from exchange interactions between graphene and FMI can induce a large spin splitting at graphene [134]. This externally induced large SOC has also been observed when Au is intercalated at the graphene–Ni interface because of the hybridization of Dirac electrons in graphene with Au 5d states [135]. New types of spin FETs can be designed by exploring the unique edge states in ZGNRs. Compared to Datta-type spin FETs, the chief advantage of these designs is to eliminate the requirement of SOC and ferromagnetic metals for spin injection and detection. 1. Bipolar junction transistor (BJT) type: Using ZGNR-based spin diodes as building blocks, threeterminal spin transistors can be designed [131]. Two designs of the transistor, one for spin-up current and another for spin-down current, are shown in Figure 19.11a and b, respectively. The side view and equivalent circuit diagrams of the device are shown in Figure 19.11c through e, respectively. Each transistor consists of three terminals, an emitter, a collector, and a base. The emitter is grounded and the collector voltage (VC) is fixed to a positive value, while the voltage of the base (VB) can be varied which controls the flow and polarization of the current. The polarity of the spin transistor is determined by the magnetic configuration between the emitter and the collector. As shown in Figure 19.11f, the current gain (IC /IB) increases dramatically when VB /VC = 1/2, indicating a high amplification for spin-polarized currents with a suitable bias condition. Transistors operating as voltage amplifiers can be designed similarly.

291


Input

Mi = 1

≡ ‘1’

Mi = 1

≡ ‘0’

Spin-up current Spin-down current

(i = 1 or 2)

Include spin up current ≡ ‘1’

Output

Y

0

1

1

0

Mref Reference of magnetization

Exclude spin up current ≡ ‘0’

Y

Y

Mref = 0


A

Mref = 0

M1 = –1

M1 = 1

A=0

A=1

NOT A

Y

Y=A

FIGURE 19.10 Schematic illustrations of the spin NOT gates. The input and output terminals are labeled as A and Y, respectively. A magnetization-fixed terminal (Mref) is used as a reference. The logic input and output 1 (0) are, respectively, encoded by the magnetization 1 (−1) of the input terminals and the output current for 1 (0) including (excluding) the spin-up current. (Adapted from M.G. Zeng et al., Applied Physics Letters, vol. 98, no. 9, pp. 092110, Feb 28, 2011.) (a)

(ME, MB, MC) = (1, 0, –1) E V1 –

(b)

C IE

IC

E

V2 –

Spin-up transistor

B

IB

E B C

C (g) 0

→ H

V1

IE VBE

V2 B

ID

IC IB

G

E

B IC

IB

→ H

→ H

Substrate

M (1, –1)

ZGNR → H

M (–1, 1)

5 0 0.0

(h) Iin

ZGNR V

IE

C

→ H

10

0

FM

+

15

Spin-down transistor

C

E Iin

(f )

B

Spin-down current (e)

E

–

→ H

IC

+

Spin-up current (d)

→ H

(c)

C IE

IB B

+

(ME, MB, MC) = (–1, 0, 1)

0.2

→ H

0.4

VBE E

VB/VC

0.8

Diffusion current (ID) B

IE

0.6

C

FM

V

1.0

G

ID Substrate

FIGURE 19.11 Schematic illustrations of ZGNR-based BJT-type transistors. (a)–(c) Top and side view of a spin current amplifier. Their circuit symbols are shown in (d, e). (f) Current gain (|IC /IB |) as a function of (VB /VC). (g, h) Top and side views of a Johnson-type spin voltage amplifier. (Adapted from M.G. Zeng et al., Physical Review B, vol. 83, no. 11, pp. 115427, Mar 14, 2011.)

In Figure 19.11g and h, a Johnson-type voltage amplifier has been designed. Here, a ferromagnetic cobalt electrode is used as the collector to detect the spinpolarized current. The spin-polarized current flows from the emitter to the base under a bias voltage and then diffuses from the base to the collector, generating a voltage difference which can be measured. With proper choices of the parameters, it is possible for the transistor to act as a voltage amplifier. 2. FET type: Besides the above bipolar-like transistors, Guo et al. [27] propose a ZGNR-based spin FET in


which source–drain conductance is controlled by a transverse gate electric field [27]. The proposed device consists of a transport channel which is modulated by two pairs of electrodes. The voltages on the left pair of electrodes are fixed; and the source–drain conductance is controlled by a transverse electric field generated by the right pair of electrodes. Transmission of spin-up or spin-down electrons can be effectively controlled by the value and direction of the transverse electric field. The on/off ratio can reach 103 when the transverse field is varied from −0.1 to +0.1 V/A.

292


(a)

T S–T SD

TS

TD

R M-ZGN

TS

Back gate

working nanoelectronic device and open the door to carbonbased spin caloritronics applications. Besides the magnetized ZGNRs, the effect of thermally induced spin currents has also been investigated in ZGNRs-based heterostructures and spin valves [136,137]. The reason for the ZGNRs system to be a good candidate for creating thermally induced spin currents is the fact that its low-energy electronic states are sensitive to the environment, such as different edge terminations, external magnetic, or electric fields, which breaks the electron–hole symmetry and gives rise to thermal-induced spin currents. Moreover, it is found that the local magnetic moment around a magnetic atom in a ZGNRs-based spin valve is strongly related to the thermal bias [136,137]. This thermally controlled magnetic distribution provides an effective way for storing information in a spin valve. As shown in Figure 19.13, the ZGNR-based spin valve is in the antiparallel configuration and with a Ni atom absorbed on one edge of the ZGNR. For TSD = 0, the absorbed Ni atom in the ZGNR carries a magnetic moment around −0.01 µB. This value is much smaller than that of an isolated Ni atom, which can be as large as 5.6 µB. The quenching of the Ni magnetic moment in the ZGNR indicates the strong coupling, or charge transfer, between the Ni atom and its surroundings. Interestingly, as shown in Figure 19.13b, the thermally induced current can considerably restore the magnetic moment of the Ni atom, which can be enhanced greatly to 1 µB by applying a thermal bias of TSD = 40 K. Therefore, despite the strong coupling between the Ni atom and its surroundings, the injected spin currents can partially align the Ni magnetic moment to its original value.

(b)

5

Current (nA)

Even without an external bias voltage, spin-polarized currents can be generated in ZGNRs with a thermal bias. Figure 19.12a shows the schematic illustration of a ZGNR-based spin caloritronic device [29]. The current flowing through the magnetized ZGNR (M-ZGNR) is driven by a temperature difference (TSD), the difference between the source temperature (TS) and the drain temperature (TD), that is, TS − TD. As shown in Figure 19.12b, opposite flowing spin-up and spin-down currents can be generated in M-ZGNRs with a temperature difference. This interesting spin Seebeck effect is attributed to the asymmetric transmission spectra of spin-up and spin-down electrons in M-ZGNR. Furthermore, a back-gate voltage can be applied to control the spin currents shown in Figure 19.12c. Spin currents (ISD) increase and reach saturation as VG is fixed and TSD increases, indicating a thermal spin transistor. Moreover, for a fixed TSD and TS, spin currents with complete polarization can be achieved by tuning a back-gate voltage. In addition, as shown in Figure 19.12d, a very large thermal MR effect is found when the magnetic state of ZGNRs is transformed from the ferromagnetic state to its ground state. The sensitivity of thermally induced spin currents to the magnetism of ZGNRs provides a unique way to distinguish the electronic states of ZGNRs. The flexible control over thermally induced spin-polarized current in M-ZGNR, by thermal (i.e., temperature), electrical (gate voltage), and magnetic means, provides a rich set of thermal spin components (spin filter, spin diode, spin FET, and MR device). Theses spin components help to dissipate heat in a

0

TSD = 20 K, spin-up TSD = 40 K, spin-up

–5

TSD = 60 K, spin-up TSD = 20 K, spin-down TSD = 40 K, spin-down

–10

TSD = 60 K, spin-down

100 150 200 250 300 350 400 TS (K) (d) 600

Spin-up Spin-down Current (nA)

300 0 –300

GS-ZGNR M-ZGNR

30

5.0 × 104

20 10

0.0

0

–600 –0.4

40

–0.2

0.0 0.2 VG (V)

0.4

0

MR

MR (%)

(c)

Current (nA)


19.5.5 Spin Caloritronic Device

50

100

100 150 TSD (K)

200

200

250

FIGURE 19.12 (a) Schematic of thermally induced spin currents in a M-ZGNR. A temperature bias can induce opposite-flowing spinup and spin-down currents in the M-ZGNR (spin Seebeck effects). (b) Spin-dependent currents as a function of TS for different TSD. (c) Gate-dependent spin polarized currents (TSD = 60 K, TS = 400 K). (d) Spin currents as a function of TSD for M-ZGNR and GS-ZGNR (VG = −0.02 V, TS = 400 K). The inset shows MR can be as high as 5 × 104% by translating ZGNRs from ferromagnetic to ground state. (Adapted from M.G. Zeng, Y.P. Feng, G.C. Liang, Nano Letters, vol. 11, no. 3, pp. 1369–1373, Mar, 2011.)


Applications of Graphene-Based Materials in Electronic Devices (a)

19.7 CONCLUSION

TSD = 0 K

S

Scattering region

D

0.2600 0.1933 0.1265 0.05975 –0.0070 –0.07375 –0.1405 –0.2073 –0.2740

D

1.030 0.8656 0.7012 0.5369 0.3725 0.2081 0.04375 –0.1206 –0.2850

Ni

(b)

TSD = 40 K

S


Ni

FIGURE 19.13 Thermal-controlled magnetic moment of a magnetic impurity in a ZGNR-based spin valve. (a, b) Spatial magnetic moment in the scattering region for TSD = 0 and 40 K, respectively. The magnetic moments of the Ni atom in (a) and (b) are −0.01 µB and 1 µB, respectively. (Adapted from M.G. Zeng, W. Huang, G.C. Liang, Nanoscale, vol. 5, no. 1, pp. 200–208, 2013.)

19.6 RECENT COMMERCIAL DEVELOPMENTS Graphene devices have yet to be commercially deployed in electronic systems. The implementation of GNRs for electronic device applications still has a long way to go due to performance degradation caused by the ER and precise control of nanoribbon size and direction. To realize GNR devices, more efforts from both the academic world and industry are required. On the other hand, the recent progress [138] in fabricating large wafer-scale [34] graphene sheets has, however, brought down the cost from $100,000,000/cm2 in 2008 [139] to