built-in input filter forward converter (BIFFC) - IEEE Xplore

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Input Filter Forward Converter (BIFFC) Tonfiguration is proposed. Without adding extra components, this configuration can perform core reset, turn-off snubber,.
A Novel Forward Configuration for DC-DC Application: Built-in Input Filter Forward Converter (BIFFC) Fred C. Lee

Ching-Shan Leu and Jiunn-Bin Hwang

Virginia Power Electronics Center The Bradley Department of Electrical Engineering Virginia Polytechnic Institute and State University Blacksburg, VA 24061-0 111

Power Electronics Section Chun-Shan Institute of Science & Technology Taiwan 32500, R. 0. C . Abstrtrct - Employing the transformer leakage inductance and two cross-coupled capacitors, a Built-in Input Filter Forward Converter (BIFFC) Tonfiguration is proposed. Without adding extra components, this configuration can perform core reset, turn-off snubber, voltage-clamped and input filter functions. Consequently, low voltage stress, high efficiency performance and reduced input current ripple can be achieved. In this paper, the circuit operation is analyzed by using the PSpice software. Based on the simulation results, the design guideline is provided and an experimental circuit on a 300 KHz, 50 W converter was breadboarded for performance evaluation.

Fig. l(b), causes additional power loss and generates undesired current harmonics in the source (Fig. l(c)). I in

D1

I

Vi

s1

t

1. INTRODUCTION

Due to circuit simplicity, the fonvard topology has been widely used for low-to-mid power applications. A number of fonvard configurations have been addressed in recent iiteratures, such as pulse-width modulation ( P W ) , quasi-resonant. multi-resonant and P W M zerovoltage-transition (ZVT) [ 1:4]. However, these efforts were emphasized on solving part of the inherent problem:; such as core saturation, voltage spike. switching loss and noise problem. Consequently, core reset. turn-off sfiubber. voltage-clamped and input filter sub-circuits are required in the mature product. PWMZVT, for instance. can reduce the voltage stress, the conduction loss and switching loss on the main switch and the rectifier diodes. Therefore, higher frequency operation can be achieved and the size of the output filter components as well as the power transformer can be reduced. Hoivevcr. a large input filter is still needed to alleviate the noise problems caused by the pulsating input current, the common characteristic of the buck family converter. Figure I(a) is the circuit diagram of the Tertiary-winding Fonvard Convener (TFC) without input filter. The inherent pulsating input current. as shown in

Fig. 1 (a) circuit diagram, (11) pulsatiiig input current ~vvavekiiiii.and ( c ) hamionic spectrum ofthe input cunnit ot'lhc 'I'FC.

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To reduce the ripple and harmonics of the input current, several topologies have been presented, like interleaving forward converter[5] and symmetrical push-pull converter[b]. The former is designed to cancel the ac component of the input current. Under nominal line and full load operating condition, zero-ripple output current and reduced-ripple input current can be achieved at the expense of increasing the complesity of the circuit. With d (duty cycle) < 0.5. input current becomes pulsating shape, though. Although the latter maintains in a nonpulsating input current waveform, the voltage waveform still has ringing during the dead-time period due to the leakage inductance energy. For a low-to-medium power application. simple circuit implementation and nonpulsating input current are preferred and can be achieved by the proposed configuration, Built-in -Input Filter Fonvard Converter (BIFFC). As shown in Fig. 2(a), it is built by splitting and relocating the input filter capacitor as the cross-coupled capacitors to the splitting transformer windings of the TFC. Figures 2(b) and 2(c) show the improved non-pulsating input current waveform with its significantly reduced harmonic components. respectively. Moreover, the circuit parasitic components are absorbed and become part of the lossless snubber circuit. Thus. the leakage inductance energy is stored and recovered through cross-coupled capacitors. Consequently, the main switch (SI)as well as the clamped diode (Dc) is released from voltage spike and the efficiency of the converter is improved. In this paper. the circuit operation is analyzed by using PSpice software. Based on the simulation results, the design guideline is provided. Finally, an experimental circuit on a 300 KHz. 50 W converter was breadboarded for performance evaluation.

40mA :

Fig. 2 (a) circuit diagram, (b) input

CUITZII~wavefomi. aiid ( 5 ) I~i~ililoiiic

spzctrum of'ths BIFFC.

2. ANALYSIS AND CIRCUIT OPERATION

Lin, is formed by the leakage inductailcc of the transformer and any stray inductance between the input source and the transformer primary winding.

Figure 3 shows the circuit diagram and the key waveforms of the BIFFC. The primary side of the power stage consists of a switch. SI.a clamped diode. Dc, two cross-coupled capacitors. C1 and C2 and a transformer. The transformer comprises four identical priniav uindings and one secondary winding with 0.5:0.5:0.5:0.5:N turns ratio. The input filter inductor.

To simplify the analysis, the output filter inductance is sufficiently large to be approximated by a current sourcc with a value equal to the output current. Io. The crosscoupled capacitor is assumed suficicntly largc so thar the voltage across it can be assumed constant. Undcr steady-state operation. five operation stagcs csisl w i h i i i one snitching cycle (s1iov.n in Fig. 4):

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S , is turned on at To. The forward diode. D,. is turned on and the freewheeling diode, D,, is turned off. Besides the main current loop to transfer the energy to the load via Lpl-SILp,, two additional circulating current loops, C,-Lp,-Lp3 and C,-Lp,-Lpl, are formed in a resonant fashion to recover the energy from C, and C, to the load The voltage across the parasitic capacitance of clamped diode, C,. increases up to 2Vi and remains constant during this time interval. S, is turned off at TI. C, is linearly charged by the reflected filter inductor current, I@. When V, reaches Vi. the forward diode, D,. is turned off. The freewheeling diode, D,, is turned on at the same time. This intend lasts until T,, when V, ramps up to 2V,, and the clamped diode. Dc, is turned on. C, and C , are charged by the source through Lp, -C,-Lp, and Lp,-C,- Lp,, respectively. (c) T,-T,: Dc is turned on and V,, is thus clamped to 2Vi during this time interval. (d) T3-T4:Dc is turned off at T,. This interval ends at T,, when V,, decreases and V, ramps up to

D1

w

t

'

GS

'

DS

t--

I

I

Dc

---___--

t

'DC

' '

cl c2

I Cl I c2

Vi. (e) T,-T,: At T,, VDs reaches Vi and keeps constant during this time interval. At To, S I is turned on again. starting another switching cycle.

I LP1

I LP2 I LP3 I LP4

From above description, cross-coupled capacitor plays an important role in the circuit operation. Four main functioas are performed:

Fig. 3 The circuit diagrain and key wavefonris of tliz BIFFC.

(1) Each capacitor operates as a voltage source with a

value equal to the input voltage, Vi, under steady-

and Lp4-C2-Lp2, to avoid interrupting iLpl

state condition. During off-time period, VDs is

iLp2 when S i is turned off. A built-in turn-off

clamped to 2V, by cross-coupled capacitors and

snubber function is thus achieved.

clamped diode. Hence, a reset voltage across the

and

(3)Along with the input inductor (Lit,),each capacitor

transformer. VI. is provided and can be expressed

performs the built-in filter function to maintain

ilS

v, = v,, +- v,, - vi = vi

the input current in a non-pulsating fashion. (1) (4) Each capacitor stores and recovers the leakage

The maximum d u b cycle is thus limit to SO% so that the core can be fully reset .

inductance energy within one cycle so that the converter's efficiency is improved.

(2) Each capacitor provides a current loop, Lpl-Cl-Lp3

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Consequently, the input current maintains in a nonpulsating shape, decreases its RMS value as well as the ripple, reduces undesired harmonic components, and transfers the energy to the load when Si is turned on thereafter.

D1

Due to the circulating current loop, the output power is contributed by all the four primary windings i n the primary side when Si is turned on. At T2, DCis turned on and the voltage across Si. Vlls. is

clamped at 2Vi. DC operates as the voltage-clanipcd component instead of being a reset diode to return the energy to the source in TFC configuration.

L

3. SIMULATION Vi

PSpice program has been used to simulate the converter with 5 0 V input voltage and 5 V output voltage at 50 W of output power[7]. The switching frequency is 3 0 0 KHz. and the duty cycle is 0.41. A resistor of 0.05 ohins is placed in series with each cross-coupled capacitor to improve convergence. For simplicity. S, is simulatcd by voltage-controlled switch. VSWITCH. Besides the Transient Analysis. the Fourier Analysis is also executed to compare the input current harmonic coiiipoiiciits between TFC and BIFFC as shown i n Figs. l(c) and 2(c).

LP3

LP2 D1

in

L

4. DESIGN CONSIDERATION

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Besides achieving a non-pulsating waveform. the abatement of the input current ripple becomes anotlier design goal. Several circuit parameters in the primary side, such as input filter inductance. Li,,. magnetizing inductance of the transformer, L,,, cross-coupled capacitance. Ci/C2, output capacitance of the MOSFET. C,. and parasitic capacitance of the clamped diode. Cl). are investigated.

L

To sliov the effects of these circuit parameters oil Ihc

input current ripple. lA, -Po curves are plotted as shou n in

in

~

VI

c2 LP3

1 TrTl D1

LP2

It can be seen that L,,, and C,/C, are tuo

major factors Hence, f, and Z are discussed instead

L

where EN - Irrr(p-p)

R

cs

Fig 5

( e ) T4 - TO

/h?"

z = J m

(7)

.f, = f, I f s

(4)

f, : switching frequency and

Fig. J Eq&dc.tit circuits for ditlerent operation stages ofthe BIFFC.

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(2)

Figure 5(c) shows I , as the function of the output power With 41% of the extra with running parameter L,. turns of the winding, only 0.5% improvement of current ripple can be obtained at the expense of increasing the required window area. Hence. the effect from the L , , can be ignored.

is the natural frequency of filter comprised by Lin and C , = C, = C,.

i,, as the fkction of the output power with running parameter Cs is shown in Fig. 5(d). It can be seen that the current ripple can be reduced by increasing Cs. However, 1% ripple improvement resulting in increasing three times of capacitive turn-on loss, 1/2 fs(~',,L:2 of the 0

power switch.

hl

z=02 5

5

The effect from parasitic capacitance of the clanipcd diode is not obvious as shown in Fig. 5(e). Thus. the design procedures can be provided as:

1-p 5 . ...

.

c

= 1~001,f

fs:

~p .I

5

.......

(1) Based on the specs. and the available components. select the optimal switching frequency

%=15009f

. .. .................... .

(2) Set fN

c,= 5oopf

= 0.1, if

5% of current ripple is accepted;

(3) Pick one value of Z. for instance, 0.2 and Lin and Cr can be calculated from Eqs (3), (4) and ( 5 ) .

5. EXPERIMENTAL RESULTS A 40-60 V input and 5 V output voltage at 50 W output power forward converter was implemented. It operates at 300 KHz. For the purpose of the comparison, the same breadboard is used with diffcrent allocation of C, and C , as shown in Figs. 6(a) and 6(b). respectively. Several circuit performance comparisons were made. Figure 7 shows the oscillograms of the input current ripple operating at full load condition. The pulsating waveform, I has 3.5 A (peak-peak) as shown in Fig. 1, 7(a). With an input filter stage added, the ac component of input current, I,, is reduced to 70 niA (peak-peak) as shown in Fig. 7(b). Still, the trapezoidal like waveform has higher harmonic component than that in BIFFC. As shown in Fig. 7(c), I, has the least ripple value (50 mA peak-peak, i, = 4%) with sinusoidal like waveform.

Figure 5(a) is plotted with Z = 0.2. It shows I,,, as the function of the output power with normalized frequency,

f,.. as the running parameter. It can be seen that (1) i, maintains near constant for each value of f,, (2) lower the

fh,

leads to lower l,,

and (3) curves are

almost averlapped each other when f, is set from 0.112 to 0.059. With .fn, = 0.112, the characteristic impedance, Z, becomes the fine-tuning parameter as shown in Fig. 5(b). It can be seen that i, can be adjusted in a 3% range and it can bz further reduced to 2% by setting Z = 1.

Figure 8 shows the oscillograms of the voltage across SI. VDs, operating at low line and full load condition.

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Because the leakage inductance energy can't be absorbed in the TFC, a 146 V voltage spike happens at SI

87.9%, is achieved under low line and half load condition.

turning-off as shown in Fig. 8(a). Hence, a turn-off snubber circuit and a higher voltage rating MOSFET are required. On the contrary, BIFFC configuration has spike-free VDSwaveform as shown in Figure 8(b) due to its built-in snubber circuit.

I2

'

I1

!"

D1

L

T1

50iiia/drv -sus

OUS

Frequency 308.379 KHz

5th

Duty Cvcle 41 O X 8 O O

Fig. 7 l i e oscillogniis of the input current waveforms (a) TFC puldiiig

I3

Ti

waveform, (b) TFC with iiiput filter. (c) BIFFC without inpiit filter ...

- .

.

'GS 1OVidiv

", \ -

Y I

I

1

TI V A C A ~ ~ ~ ~ ~ ~ S X D F I S U M ~ M ~ ~ ~ ~ ~ T ~ T ~ T ~ T ~ T

c1 c 2 22u11oov D1 M 62CNQO30

C 6&1*2rlu'l+Zu*3

L 20uH

S1 IRFPZW

Dc IN5417

Fig. 6 The circuit diagrams of the (a) TFC and (b) BIFFC.

-sus

011s

SUS

Fig. 8 The oscillogram of VDS: (a) TFC with 146 V \.olta~cspike. (b)

BIFFC without spike and clamped at 80 V .

Another concerned issue is the EM1 test. A MIL-STD461 C conducted emission interference test was taken without input and EM1 filters[7]. It shows that EM1 filter is strongly required to meet the conducted emission specifications in both cases. However, the comparison shows that BIFFC has less conducted emission interference than that of the TFC in the whole frequency range and an 81 dl3uA improvement was achieved at 300 KHz with BIFFC configuration.

6. CONCLUSION

A 300 KHz, 50 W BIFFC with a 10-60 V input was implemented. The built-in input filter function is achieved by using transformer leakage inductance and cross-coupled capacitors(C,) without additiona1 input filter circuit. Consequently, the input current maintains in a non-pulsating shape. decreases its RMS \ d u e as well as the ripple. reduces undesired harmonic components. and transfers the energy to the load \vhen SI is turned on thereafter. Also. the energy stored in leakage inductance is absorbed to eliminate the \.ohage spike across !he main switch and improve thc convcrtcr's

Finally, the efficiency of the power stage of the BIFFC is measured under different load and input range operation condition as shown in Fig. 9. A maximum efficiency.

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adding C,,

as shown in Fig. lo@). There is an important feature such that the duty cycle can escecd 50%. These circuits will be presented in the future.

efficiency. The design guideline of two key parameters LiI1and Cr is provided to achieve low input current ripple.

REFERENCES [ l ] K. H. Liu and F. C. Lee, "Secondary-Side Resonance for High-

E

.$

Frequency Power Conversion," IEEE Applied Power and Electronics 84

Coilfirence Proc.. 1986, pp, 83-89.

E

[2] W. A Tabisz and F. C. h e , "A Novel Zero-Voltage-Switclie~Multi82

Resonant Forward Converter," Hi& Frequency P o w r Conversion Conference Proc.. 1988. pp. 309-3 18.

80

78

[ 3 ] H. J. Kim, C. S. Leu, R. Farrington, and F. C. Lee: "Clamp hlode

'

Zero-Voltage-Switched Multi-Resonant Converters,"

IEEE Power

I

2

4

6

E

10

Electronics Conference Record, 1992, pp. 78-84.

12

Outpul Current [A]

[4] G. Hua, C. S . Leu, and F. C. Lee, "Novel Zero-Voltage-Transitioii

PWM Converters,"

IEEE Power Electronics Coilfsrence Record.

1992, pp.55-61

Fig. 9 The nieasured eficiency of the power stage of BIFFC

[ 5 ] K. K. Hedel. "High-Density Avionic Power Supply."

IEEE

Transactions on Aerospace and Electronics Systenis. Vol. 4 < S - 16. No.5. Septenilxr. 1980. pp. 615-619

[ 6 ] Edward Herbert, "Aialysis of the Near Zero Input Current Ripple Condition in a Syimnetrical Push-Pull Power Conve~~er."High Frequency Power Conversioa Coiterence Proc.. 1989. pp. 357-371. [7] C. S. Leu, and J. B. Hwang "A Built-in Input Filter F o n ~ i - d

Converter," IEEE Power Eleclroiiics Conference Record. 1994. pp. 917-921.

Fig. 10 TIic improved version of BIFFC

However. this configuration has two minor disadvantages: ( 1 ) the realization of the four-winding transformer is difficult and ( 2 ) a floating driver circuit is required. Two variations of BIFFC are deyeloped as shown in Fig. 10. Simplified transformer construction without driver transformer version is shown in Fig. lO(a). Moreover. an improved trrsion can be implemented by

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