Can V 2 control be applied to boost converter? Guohua Zhou, Sheng Zhong He, Xin Chen and Hengfeng Cui It is 18 years since the V 2 control was proposed in 1996. Many publications have shown that the V 2 controlled switching converter exhibits an ultra-fast load transient response. Recently, it has been reported that the conventional V 2 control is inherently a peak V 2 control, based on which V 2 control can be classiﬁed as peak V 2 and valley V 2 controls. However, till now the switching converter with V 2 control is almost a buck converter. This leads to the investigation of whether the V 2 control can be applied to a boost converter.
Introduction: With the rapid development of microprocessors and central processing units for electronic devices, power supplies are required to have a fast load transient response. To meet this requirement, V 2 control was proposed in 1996  and has been widely applied to switching converters owing to its unique feature of fast transient response [2, 3]. However, it is shown from previous research works that the converter with V 2 control is almost a buck converter. It is generally implied that V 2 control cannot be applied to a boost converter and other converters. Recently, Zhou et al.  thought that the conventional V 2 control of a buck converter is inherently a peak V 2 control, in which the peak value of the output voltage is controlled to turn off the power switch. In , V 2 control is classiﬁed as peak V 2 control and valley V 2 control, and it is pointed out that valley V 2 control is the duality of conventional V 2 control, where the valley value of the output voltage is controlled to turn on the power switch. Both peak V 2 and valley V 2 controls depend on the equivalent series resistance (ESR) of the output capacitor. For these reasons, we analyse the output voltage ripple of the boost converter, based on which we ﬁnd that the valley V 2 control can be applied to a boost converter. The stability of a valley V 2 controlled boost converter is also investigated. Output voltage ripple of boost converters: A boost converter is shown in Fig. 1a, where vg is input voltage, vo the output voltage, Rc the ESR of the output capacitor C, L the inductor, iL the inductor current and io is the load current. Its main steady-state waveforms are shown in Figs. 1b and c when the boost converter is operates in continuous conduction mode (CCM), where Fig. 1b shows the case of small ESR and Fig. 1c shows the case of large ESR.
L + v – g
a S1 on
iLP iL vo
Valley V2 control for boost converter: A valley V 2 controlled boost converter and its operation waveforms are shown in Fig. 2, where Kv is the output voltage sensing coefﬁcient, the valley V 2 controller consists of an error ampliﬁer, a comparator, a latch and a clock clk. From Fig. 2, it can be seen that the output voltage is used to generate both the control signal Vc and the ramp signal vs. The control objective of valley V 2 control is to make the valley value of vs follow Vc generated by compensating the error signal between the reference voltage Vref and vs through the error ampliﬁer, which is the same as in . L + – vg
C Kv comparator
latch S vQ Q R
valley V 2 controller
Fig. 2 Valley V2 controlled boost converter and its operation waveforms a Boost converter with valley V 2 controller b Operation waveforms with large ESR
At the beginning of each switching cycle, clk resets the latch and makes the driver signal vQ be at a low level to turn off the switch S1, which causes iL to decrease linearly from the initial value. The inductor current ripple ΔiL will ﬂow through the output capacitor when S1 is off. In the case of a large ESR, the voltage ripple of vs will approximately be KvΔiLRc. When vs decreases to Vc, S1 is turned on, which makes iL increase and vs decrease until the end of the present switching cycle.
from off to on, where iLP and iLV are the peak value and the valley value of the inductor current, respectively. In the conventional V 2 control, the switch S1 of the buck converter is turned on at the beginning of each switching cycle and turned off after the output voltage increases to a control signal. Obviously, for the boost converter, after the switch S1 is turned on, the output voltage is not increasing but decreasing. The conventional V 2 control (peak V 2) is thus not suitable for the control of a boost converter. According to Zhou et al. , with the valley V 2 control, the switch S1 of the buck converter is turned off at the beginning of each switching cycle and turned on after the output voltage decreases to a control signal. It is just the case with a boost converter during the off state of switch S1 in Fig.1b. Therefore, valley V 2 control can be applied to the boost converter. However, if a small ESR for the output capacitor is used, the output voltage ripple is dominated by the capacitor voltage ripple, which is nonlinear and increasing during the off state of switch S1, as shown in Fig. 1c. In this case, valley V 2 control cannot be applied to the boost converter. In other words, the valley V 2 controlled boost converter will be unstable.
Fig. 1 Boost converter and its steady-state waveforms a Boost converter b Steady-state waveforms with large ESR c Steady-state waveforms with small ESR
In Fig. 1, the output voltage is the sum of the capacitor voltage and the voltage across the ESR. If a large ESR for the output capacitor is used, the output voltage ripple is dominated by the ripple voltage across the ESR and looks piecewise linear, as shown in Fig. 1b. When the switch S1 is on, inductor current iL increases and the capacitor C is discharged to supply power to the load which makes the output voltage decrease. When the switch S1 is off, iL decreases, C is charged and L and C supply power to the load. In this duration, output voltage decreases due to the large ESR. There exists two jump voltages in each switching cycle Ts. The positive jump voltage RciLP happens in the transition from on to off, and the negative jump voltage RciLV happens in the transition
Simulation results under different ESRs: The circuit parameters are chosen as follows: vg = 4 V, Vref = 1 V, L = 20 μH, C = 1000 μF, R = 10 Ω, Ts = 20 μs and Kv = 0.1. The error ampliﬁer is designed as a proportional–integral compensator, where the proportional term KP = 1.5 and the integral term KI = 300. A circuit simulation model has been built using PSIM software. Fig. 3 shows the simulation results of steady-state output voltage, inductor current and driver signal waveforms of the valley V 2 controlled boost converter under different ESRs. As shown in Fig. 3a, when Rc = 15 mΩ, the valley V 2 controlled boost converter operates in CCM and stable state, and the output voltage of the boost converter looks piecewise linear, which are the same as the theory analysis from Fig. 2. However, when Rc = 10 mΩ, the converter operates in an unstable state. As shown in Fig. 3b, subharmonic instability exists in the output voltage, inductor current and driver signal. In this case, the decreasing voltage is visibly nonlinear during the off state of switch S1. It is thus thought that there is a critical ESR Rcrit, when Rc > Rcrit, and the valley V 2 controlled boost converter is stable, otherwise it is unstable. Critical ESR for stability: The sampled-data modelling method is used to investigate the critical ESR for the stability of the valley V 2 controlled boost converter. A sampled-data model describes the responses of inductor current iL and capacitor voltage vC at the switching instants, which can ﬁt naturally with the operation of switching converters .
ELECTRONICS LETTERS 10th April 2014 Vol. 50 No. 8 pp. 627–629
Denote iL and vC at the beginning of the nth switching cycle as in and vn, respectively. When the switch S1 turns on, inductor current in + k and capacitor voltage vn + k can be expressed as in+k = in − m2 toff vn+k = vn +
in − io m2 2 toff − t C 2C off
where m2 is the decreasing slope of the inductor current and toff is the off time duration of switch S1 in the nth switching cycle. Similarly, the inductor current and capacitor voltage at the end of the nth switching cycle can be obtained as in+1 = in+k + m1 (Ts − toff )
io (Ts − toff ) C
vn+1 = vn+k −
where m1 is the increasing slope of the inductor current.
where the capital letters are the corresponding variables in steady state and Δ = IL − Io − M2(RcC + Toff ). The two eigenvalues of A are derived to be l1,2 = 0.5(a11 + a22 ) + 0.5 (a11 − a22 )2 + 4a12 a21 (7) where the expression aij (i, j = 1, 2) can be found from (6). The stability of the valley V 2 controlled boost converter requires that both eigenvalues are inside the unit circle. It can be seen that |λ1,2| < 1 if Rc . Rcrit =
L (1 − D)2 Ts + and D . 0.5 RC(1 − D) 2C(2D − 1)
where D is the steady-state duty ratio and equals 1 − Kvvg/Vref. It is found that instability exists in the valley V 2 controlled boost converter when D < 0.5, which is the same as the valley V 2 controlled buck converter [4, 5]. By substituting the previous circuit parameters into (8), we can obtain D = 0.6 and Rcrit = 13 mΩ. The ESR in Fig. 3a is larger than Rcrit, which indicates that the converter is stable, whereas the ESR in Fig. 3b is smaller than Rcrit, which implies subharmonic instability in the converter.
Conclusion: By analysing the output voltage ripple of the boost converter under large ESR and small ESR of the output capacitor, it is found that if we consider the duality of the conventional V 2 control, the valley V 2 control can be applied to the control of a boost converter. Owing to the important effect of ESR on the stability of the valley V 2 controlled boost converter, the critical ESR for the stable operation is derived in this Letter. These results can provide useful design guidance and widened industrial applications for the switching converter with V 2 control.
9.96 4 3 2 1 1 0
78.64 time, ms a
Acknowledgments: This work was supported by the National Natural Science Foundation of China (grants 61371033 and 51177140), the Specialised Research Fund for the Doctoral Program of Higher Education (grant 20130184120011), the Fok Ying-Tong Education Foundation for Young Teachers in the Higher Education Institutions of China (grant 142027) and the Sichuan Provincial Youth Science and Technology Fund, China (grant 2013JQ0033).
10.02 10.00 9.98 4 2 0 1
© The Institution of Engineering and Technology 2014 1 February 2014 doi: 10.1049/el.2014.0379
78.64 time, ms b
Guohua Zhou, Sheng Zhong He, Xin Chen and Hengfeng Cui (School of Electrical Engineering, Southwest Jiaotong University, Chengdu 610031, Sichuan, People’s Republic of China)
Fig. 3 Simulation results of valley V2 controlled boost converter with different ESRs
E-mail: [email protected]
a Rc = 15 mΩ b Rc = 10 mΩ
For the valley V 2 control, the sensed output voltage at the turn-on instant of the switch S1 is equal to the control voltage Vc; therefore the control constraint can be expressed as follows: Kv [(in+k − io )Rc + vn+k ] = Vc
Equations (1)–(5) form a complete sampled-data model of the valley V 2 controlled boost converter. The nonlinear functions in + 1 and vn + 1 can be linearised with respect to in and vn to derive a small-signal model for stability analysis. The state transition matrix A of the corresponding small-signal model is obtained as 1 IL − Io − M1 (Rc C + Toff ) (M1 + M2 )C A= (6) −Io − M2 Rc C −IL Rc − Io Toff /C D
1 Goder, D., and Pelletier, W.R.: ‘V2 architecture provides ultra-fast transient response in switch power supplies’. Proc. HFPC Conf., Las Vegas, NV, April 1996, pp. 19–23 2 Redl, R., and Sun, J.: ‘Ripple-based control of switching regulators – an overview’, IEEE Trans. Power Electron., 2009, 24, (12), pp. 2669–2680 3 Sun, J.: ‘Characterization and performance comparison of ripple-based control for voltage regulator modules’, IEEE Trans. Power Electron., 2006, 21, (2), pp. 346–353 4 Zhou, G.H., Xu, J.P., and Wang, J.P.: ‘Constant-frequency peak-ripple-based control of buck converter in CCM: review, uniﬁcation and duality’, IEEE Trans. Ind. Electron., 2014, 61, (3), pp. 1280–1291 5 Zhou, G.H., Xu, J.P., Sha, J., and Jin, Y.Y.: ‘Valley V2 control technique for switching converters with fast transient response’. Proc. ICPE-ECCE Asia Conf., Jeju, Korea, May 2011, pp. 2788–2791
ELECTRONICS LETTERS 10th April 2014 Vol. 50 No. 8 pp. 627–629