Collisionless Multiple Access Protocols for

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To Appear in the International Journal in Computer Simulation, 1992

Collisionless Multiple Access Protocols for Wavelength Division Multiplexed Star-Coupled Photonic Networks Kalyani Bogineni, Michael Carrato and Patrick W. Dowd

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Department of Electrical and Computer Engineering State University of New York at Buffalo Buffalo, NY 14260 Abstract This paper introduces a collisionless wavelength division multiple access protocol for a passive star-coupled photonic network that possesses significant performance and flexibility advantages over alternative approaches. This protocol is compared in terms of relative performance and network architecture to the dynamic time-wavelength division multiaccess (DT-WDMA) protocol proposed in [1] through an extensive simulation study. The protocols are control channel based: one of the WDM channels is used to reserve data channel access for data packet transmission. Both protocols achieve access arbitration of the control channel through time-division multiplexing and eliminate the long synchronization delays typical in networks with time-multiplexing employed on the data channels. The proposed approach eliminates the linkage between the number of nodes, channels, and packet length as proposed in [1]. Variable sized data packets in a collisionless environment are supported without utilization degradation. Furthermore, an overlapping mechanism is introduced that relaxes the constraints on the switching times of the optical components by decreasing the performance sensitivity. The performance is compared in terms of network throughput, packet delay, and control and data channel utilization. In particular, this paper examines the performance impact with variations in the number of nodes and data channels, packet generation rate, data packet length, and the optical device switching latencies. Index Terms: media access protocol, performance analysis, wavelength division multiplexing, photonic network architecture.

1 Introduction This paper introduces a collisionless multiple access protocol for an optical wavelength division multiplexed (WDM) star coupled system. The performance of this protocol is compared to the protocol proposed in [1] through detailed simulation studies. A multiple access environment can be achieved through a variety of optical channel topologies [2]. System size limitations in terms of the optical power budget were compared in [3, 4] and the star-coupled configuration was shown to exhibit superior fanout characteristics over optical bus-based systems. The work presented in this paper is based on a star-coupled configuration due to its fanout characteristic and high network fault tolerance. Media access control (MAC) protocols for WDM based optical star-coupled systems have been studied recently [1, 5, 6, 7, 8, 9]. Although much terminology and technique have been borrowed from previous work in computer communication, there are significant differences between high speed photonic networks and past work on multiple access protocols. For example, in the past bandwidth was the critical resource and a MAC protocol was optimized to maximize its utilization. In this environment, bandwidth is not the primary limiting factor: it is the speed mismatch between the optical and electronic interface components. WDM is an approach to circumvent this speed mismatch problem by partitioning the huge optical bandwidth into many, more manageable, channels. The channels operate at a data-rate limited by the electronic interface components, and the MAC protocol provides access arbitration for all the WDM channels. Media access control protocols developed for this environment may be broadly classified into control channel and non-control channel based protocols [10, 5]. Control channel based approaches [1, 7, 8, 9] partition the channels into 1 This work was supported by the National Science Foundation under Grant CCR-9010774 and ECS-9112435; and utilized the computing facilities at the National Center for Supercomputing Applications, University of Illinois at Urbana-Champaign through NSF Grant TRA-910321.

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control and data. Typically, the system has one control channel. The remaining channels (denoted as data channels) are used for data packet transmission. The control channel is used to reserve access on the data channels. Non-control channel based architectures employ all the channels for data transmission [5, 6]. A non-control channel based protocol typically preassigns a channel to an individual node (or to disjoint sets of nodes if the number of nodes exceed the number of channels) [5]. A node has a home channel that is assigned based on its node number, and only receives (or transmits) data on that channel. A source node determines the home channel of its destination (target) node through a simple computation based on the destination node number [5, 11]. A possible configuration is a system where each node has one tunable transmitter, and one receiver permanently tuned to its home channel. A main advantage of this configuration is that fast tunable receivers are not required. A node must receive and decode all traffic along its home channel. Crossbar connectivity and optical self-routing is achieved when the number of nodes equal the number of channels, since a home channel is not shared. When the number of nodes exceed the number of channels, a home channel is shared and partial self-routing is achieved. DT-WDMA [1] can be viewed as a hybrid approach in this classification scheme: each node must be assigned a home channel for transmission, and a control channel is used to inform the destination node (the destination node then tunes its receiver to the home channel of the source node). Control channel based protocols offer flexibility in the use of data channels when they are not statically allocated, particularly when there are far fewer channels than nodes. Any data channel that both the source and destination nodes agree upon may be used for transmission. The control channel is used by the source node to inform the destination node of its intention to transmit, the data channel to expect the data packet, and its size. Depending on the implemented protocol, collisions may occur during control and data packet transmission [7, 8]. The control channel based MAC protocols proposed for star-coupled systems in [6, 7, 8] are based on random access schemes. Habbab et al. in [7] introduced a first approach to achieve media access control for WDM star coupled networks that capitalized on the flexibility of the multiple channels. The channels were shared by all nodes on a contention basis, and random access schemes were employed on both control and data channels. Different combinations of random access protocols for the control channel and the data channels were studied. For example, [7] considered (ALOHA,ALOHA), (Slotted ALOHA, ALOHA), (ALOHA,CSMA), (CSMA,ALOHA) and (CSMA,Nserver switch); where (X,Y) denotes the case where MAC protocols X and Y are implemented on the control channel and data channels, respectively. The performance of the protocols in terms of throughput capability were compared with varying packet lengths. The average packet delay was considered through a highly simplified model. Of the combinations, (CSMA,N-server switch) proved to have better throughput characteristics as the traffic on the network increased. This protocol maintained high throughput with very large packet lengths, but the performance suffered a severe degradation with smaller packet lengths and heavy traffic as expected with the CSMA protocol. Packet collisions occurred with both control and data packet transmission. A data packet was transmitted even if the control packet was not successfully transmitted. A modification to this basic idea was proposed in [8], where the data packet is transmitted only if the control packet was successfully transmitted. This modification required two receivers: one to monitor the control channel (to sense collisions), and a tunable receiver for data packet reception. A static allocation MAC protocol is collisionless, has low implementational complexity, and provides excellent performance with heavy traffic where random access protocols degrade. The staticly allocated control channel based scheme DT-WDMA [1] was proposed with fixed wavelength transmitters and tunable receivers. All nodes have fair access to the control channel through a time division multiaccess scheme, and each data channel is owned by a node for data packet transmission. A destination node must tune its receiver to the home channel of the source node to receive the packet. Each node has two transmitters, and two receivers. One transmitter is for control packet transmission, and the other for transmitting data packets. The two receivers have a similar configuration as in [8]: one fixed receiver for control packets, and one tunable receiver for data packets. DT-WDMA data packet transmission is synchronized to control cycle boundaries [1]: a node transmits its data packet at the beginning of the control cycle following the control cycle in which it sent the control packet. The time reserved on a data channel is fixed, equal to the control cycle length (which is proportional to the number of nodes). This protocol limits the system size to the number of available channels. The proposed protocol [9], denoted as TDMA-CS following the notation introduced in [7], aims at decoupling the maximum system size and the number of data channels. Furthermore, the relation between data packet length and the number of interconnected nodes is eliminated: variable sized packets are supported without loss of utilization with small packets. This protocol achieves collisionless data packet transmission without requiring the allocation of home 2

channels. This collisionless control channel based protocol provides flexibility in using the available data channels. The proposed architecture employs a single tunable transmitter per node for both control and data packet transmission. Each node has two receivers: a fixed receiver to continually monitor the control channel, and a tunable receiver for data packets. Packet collision due to destination node or data channel contention is eliminated through status tables at each node tracking the availability of destination nodes and data channels. Time multiplexing on the control channel provides each node a chance to transmit per control cycle. A simple overlapping scheme is introduced for this protocol that reduces the performance sensitivity on the optical device switching speed. The performance of the network is studied in terms of network throughput and average packet delay. The metrics are evaluated in terms of variations in the number of nodes, the average arrival rate of new traffic, and the number of channels in the network. Section 2 describes the network architectures for the two protocols, along with a brief description of the optical devices. The protocols are defined and their operation described in Section 3. Section 4 describes the simulators developed and the performance metrics measured. Section 5 studies the behavior of the protocols, based on the simulators developed in Section 4, in terms of the performance metrics and varying system parameters.

2 Optical Interconnection Potential areas of applications for this class of photonic networks are expanding rapidly, due to the significant advances in wavelength tunable laser diode transmitters and wavelength tunable receivers. Tunable receivers can be achieved via wavelength tunable electro-optic or acousto-optic filters with direct detection, or coherent receivers [12]. Tunable filters with direct detection and coherent detection can be viewed as complementary approaches: coherent receivers have higher sensitivity, selectivity and cost; whereas direct detection has reduced performance levels but reduced complexity and cost. This expands their region of application in the performance-cost requirement spectrum. For example, in addition to having application in a large telecommunications environment, this approach is now suitable to Local Area Network (LAN), LAN interconnection [13, 14, 15], and supporting interprocessor communication in a parallel computer environment [4, 10, 11, 16]. Characteristics such as increased fanout, very large bandwidth, high reliability, low power requirements, reduced crosstalk, and immunity to EMI make optical networks highly desirable. Multiple optical channels can be formed on a single optical fiber through wavelength multiplexing to form Wavelength Division Multiple Access (WDMA) channels. This is an approach to circumvent the speed mismatch between the optics and the interface electronics: multiple channels are created on a single fiber rather than creating a single (very) fast channel. The WDM channels form a set that can be individually switched and routed. However, tunable transmitters and receivers are required to achieve wavelength division multiplexing. The following sections describe the tunable optical devices, the star-coupled configuration, and the network architecture considered in this paper.

2.1

Optical Devices

The low loss region of a single mode optical fiber has an optical bandwidth of about 30THz [17]. Rather than increase usable bandwidth through spatial- or time-division multiplexing, WDM is an alternate approach that partitions the large bandwidth of the fiber into smaller, more manageable channels. Tunable lasers can be achieved through thermal, mechanical, injection-current, and acousto-optic means [18]. Thermal tuning is slow and has a limited range of about 1 nm. Mechanical tuning is also slow but has a greater range. Injectioncurrent has fast tuning: on the order of a few ns. The range of a Distributed Feedback (DFB) laser diode has a limit of 10-15 nm, due to heating and nonradiative recombination [19]. A Distributed Bragg Reflector (DBR) laser diode was demonstrated in [19] to achieve 50 separate channels, with a switching time between channels of 15 ns. Wavelength selectivity at the destination can be achieved either with a coherent receiver, or a tunable filter with direct detection. The first approach is more expensive, but has a higher channel selectivity: channels can be placed closer together so a greater number of channels can be formed in the tunable range [18]. Passive filters achieve wavelength

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M: C: mi : c0: ci: T: T 0: T 1: R0: R1: : L: : ?:

t: Udc :

number of interconnected nodes number of data channels in the network (C=M for DT-WDMA) address of node i; 1  i  M control channel data channel i, 1  i  C tunable transmitter in TDMA-CS fixed transmitter in DT-WDMA tunable transmitter in DT-WDMA fixed receiver tunable receiver switching latency ratio of length of data packet to length of control packet packet generation rate at each node throughput of the network in packets per unit time average delay per packet utilization of data channels Table 1: Summary of notation.

selectivity by varying a mechanical element. Examples are Fabry-Perot and Mach-Zehnder filters where 30 channels have been separated with ms switching speed [17]. Active filters are based on wavelength selective polarization transformation with either electro-optic or acousto-optic control. A filter bandwidth of 1 nm has been achieved with both approaches [18]. However, acousto-optic devices have a tuning range across the full 1.3-1.56 m range, while electro-optic devices are limited to about 15 nm [12]. Acousto-optic filters have slower switching speeds (s) than electro-optic filters (ns). Acousto-optic tunable filters are based on mode coupling mechanisms using acousto-optic effects [18, 20]. Acoustooptic filters have an advantage that by superimposing multiple acoustic control signals, multiple channels can be selected by a single acousto-optic filter [20]. This property makes this device useful in the operation of WDM channels in the proposed architecture with dual receivers connected to the network through a single acousto-optic filter.

2.2

Network Configuration

There are two major classes of WDM networks: Wavelength Routing (WR), and Broadcast and Select (BS). Wavelength selectable devices are contained within a WR network, and the transmitted wavelength completely determines the path through the network. A BS network is passive with no internal wavelength selectivity. Selectivity is obtained through the use of tunable laser sources, and/or tunable wavelength filters or receivers. Dense WDM BS networks have become possible through the significant advances in narrow linewidth DFB and DBR tunable lasers and filters, and low cost star couplers [18, 19]. Both protocols have been developed for a passive optical star-coupled architecture. This architecture has the advantage of superior fanout capability over optical bus based systems, and high fault tolerance characteristic due to the large connectivity and passive nature [3, 4, 21]. Table 1 summarizes the notation definitions.

2.2.1

Architecture for the DT-WDMA protocol

The architecture for DT-WDMA has M nodes, numbered fm1 ; m2 ; : : :; mM g. This system requires that the number of data channels equal the number of nodes, so M + 1 channels (1 channel for control, numbered c0 ; and M data channels, numbered ci , 1  i  M ) are required. The protocol preassigns to each node a channel for transmitting data packets: node mi is assigned channel ci , 1  i  M , as its home channel. 4

T0 T1

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Figure 1: Star-coupled photonic networks. (a) Architecture of the DT-WDMA protocol with two fixed transmitters ( T 0,T 1), one fixed receiver (R0) and one tunable receiver (R1); (b) Architecture of the TDMA-CS protocol with a tunable transmitter ( T ), one fixed receiver (R0), and one tunable receiver (R1).

Each node in this configuration has two transmitters: one tuned to the control channel for transmitting control packets (T 0), and the other transmitter is tuned to its preassigned home channel for data packet transmission (T 1). A coupler is used at each node to combine the output of the two sources. The signal from the output of the coupler is then connected to the star-coupler. Each node has two receivers: one is permanently tuned to the control channel wavelength to monitor and receive control packets (R0). The second receiver is tunable, it can be tuned to receive data packets on any of the M data channels from any of the M nodes in the system (R1). The signal from the star-coupler is split at each node to interconnect the two receivers. The architecture is shown in Fig. 1(a).

2.2.2

Architecture for the TDMA-CS protocol

The architecture for this protocol also has M nodes, numbered fm1 ; m2 ; : : :; mM g. This approach eliminates the requirement that the number of interconnected nodes equal the number of data channels. The data channels in this system can be used with flexibility to transmit data packets: any data channel that has been agreed upon by the source and destination nodes can be used for transmission. The system has a total of C + 1 channels, C  M , where C denotes the number of channels allocated for data packet transmission and one channel is dedicated as control. The channels are numbered fc0 ; c1 ; : : :; cC g. The control channel is defined as c0 ; and ci , 1  i  C , denotes a data channel. Each node has a single tunable transmitter, denoted in Fig. 1(b) as T , capable of tuning to any channel. Concurrent data packet transmission and data packet reception is supported. The receiver subsystem consists of two receivers. The first receiver, denoted as R0, continually monitors the control channel, receiving and decoding all transmitted control packets. The second receiver, denoted as R1, is tunable and used to receive data packets along any of the C

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data channels. This configuration does not require the use of couplers to join multiple transmitters as with DT-WDMA. The use of splitters in the DT-WDMA configuration result in an additional optical power budget expense which may reduce the maximum system size. The TDMA-CS architecture has system size expansion advantage due to optical power budget considerations, and the independence of system size and number of channels in the system.

3 Protocol Description Both the DT-WDMA and TDMA-CS protocols are control-channel based. Access to the control channel is based on a static cyclic slot allocation scheme. Each node is assigned one control slot per cycle, and all nodes have the opportunity to transmit a control and data packet during each cycle. The slot allocation is static, and does not change with load. The protocols differ in their allocation of the data channels: DT-WDMA statically allocates its data channels whereas TDMA-CS allows (collisionless) random access to the pool of data channels.

3.1

Format of Control and Data Packets

The two protocols differ slightly in their requirements on the content of the control packet. Two goals of TDMA-CS is to provide flexibility in data channel allocation, and support variable packet lengths. The TDMA-CS control packet has four integer fields: s, 1  s  M , identifies the source node address ms ; d, 1  d  M , identifies the destination node address md ; i, 1  i  C , identifies channel ci as the selected data channel, and L indicates the data packet length. Note that the s control field is not necessary since the source can be identified by its position within a control cycle. A DT-WDMA control packet has three fields: d, 1  d  M , identifies the destination node address md ; t, denotes the delay experienced by a packet since its generation at a node till it reaches the hub; m, indicates the transmitter mode: packet-switched or circuit-switched. DT-WDMA preallocates the data channels to each node, so information pertaining to the data channel wavelength need not be transmitted. Time is normalized to the control slot, the time required for the transmission of a control packet, and is taken to be one unit of time. A control cycle is defined as the time required to allow each node the opportunity to transmit a control packet, as shown in Fig. 2. DT-WDMA data packets are bounded: the maximum transmission time of a data packet must be less than or equal to the length of a control cycle. TDMA-CS data packets are taken to be L times the length of a control packet, where L is an integer L  1. Note that this protocol does not restrict data packets to fixed lengths: the collisionless nature of the protocol is retained with variable sized data packets. The following two sections define the protocols where access to the control channel is governed by a static allocation scheme.

3.2

DT-WDMA Protocol

Every node has an assigned control slot it uses to inform the destination node of its intention to transmit a data packet. Each node is assigned a home channel to transmit its data packets. To receive a packet, the destination node tunes its receiver R1 to the home channel of the source node. This avoids having tunable transmitters. Node mi , 1  i  M , transmits a control packet in control slot Ti if it is backlogged, as shown in Fig. 2(a). The data packet is transmitted on the home channel of the source node, synchronized to the beginning of the next control cycle. All the nodes receive all the control packets. If a node identifies itself as the destination of a data packet from a particular node, the tunable receiver R1 of the destination node is tuned to the wavelength of the home channel of the source node to receive the data packet. Multiple nodes may request the same destination node during a control cycle. An arbitration algorithm is executed at the destination node to choose from the contending packets at the end of a control cycle. Each potential source node also executes the same arbitration algorithm to determine which node will transmit its data packet to the destination node during the next control cycle. The successful node transmits its

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1 control cycle T1 Chan 0

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control packet C data channels Chan 1 data packet Chan 2 α

L

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Figure 2: Time-Space diagram illustrating access to the control channel and transmission on the data channels. (a) DT-WDMA, and (b) TDMA-CS.

data packet during the next cycle, and the remaining contending stations are forced to remain idle and wait for the following control cycle to reattempt access. The basic control cycle of DT-WDMA consists of M control slots. The switching time is defined as the time required to receive and decode the last control packet, and tune its optical component to the appropriate data channel. The switching latency per cycle ( ) for this protocol is composed of three components: the switching time of the optical devices, the time to receive and decode the control packet from the last slot in the control cycle, and the time required to execute the arbitration algorithm. The basic control cycle must be extended by the switching latency . The switching latency enables the destination nodes to be ready at the beginning of the control cycle to receive the data packets irrespective of the time when the control packet was sent in the control cycle, as illustrated in Fig. 2(a). The features of DT-WDMA are:

} } } } } } }

No packet collisions on either the control or data channels An arbitration algorithm is required to be executed at the end of a control cycle to resolve destination conflicts Time reserved on a data channel is fixed to the control cycle length Data packet length is bounded by the cycle length The number of nodes must equal the number of data channels The control cycle has to be extended to include the switching overhead The system size is limited by the number of channels and the optical power budget.

Data packet transmission with DT-WDMA is synchronized to control cycle boundaries: a node transmits its data packet at the beginning of the control cycle following the control cycle in which it sent the control packet. Therefore 7

the time reserved on a data channel is fixed, equal to the control cycle length (which is proportional to the number of nodes). The design must specify the maximum data packet length. If the data packet transmission time exceeded the duration of a basic control cycle, the control cycle could be extended to the data packet transmission time. This change would be permanent: the control cycle length cannot be altered between cycles. When the control cycle is extended, the percent increase from the nominal control cycle to the extended control cycle is equal to the percent of control channel utilization lost. This may become important if the system is control-channel limited, as discussed in the analysis section. In operation with packet transmission times smaller than the (extended or nominal) control cycle duration, the percent difference between the control cycle length and the data packet transmission time is the utilization lost per data channel.

3.3

TDMA-CS Protocol

A control cycle consists of M control slots, as shown in Fig. 2(b). Every node has an assigned control slot used to reserve access on a data channel if backlogged. In Fig. 2(b), mi transmits a control packet in control slot Ti , 1  i  M . The source node then waits for time slots before transmitting the data packet on the selected data channel. The delay is the switching latency. The switching latency is defined for this protocol as = maxfts; tr g, where ts is the time required by the transmitter T of the source to switch to the selected wavelength, and tr is the time required by the target node to receive and decode the control packet and switch R1 to the selected data channel. As discussed later in this section, TDMA-CS has introduced a simple overlapping mechanism that reduces the performance sensitivity on . Collisionless transmission is achieved by this protocol through the use of status tables. Each node maintains two tables: a table to track the status of the data channels to eliminate data channel collision, and a table to avoid destination conflict by tracking the status of the R1 receiver at each node. This is the reason why each node has receiver R0 parked on the control channel: all transmitted control packets are received by all nodes (including the node which transmitted the control packet). R0 updates the two status tables at the end of each control slot after receiving and decoding a control packet. If mj transmits a control packet targeting mi on data channel ck , all nodes would add L + against entry i in their node status table and entry k in the channel status table. The entries indicate the number of time slots that the resources will be busy. All positive entries of each table are decremented at the end of every control time slot to update the remaining busy control slots. A VLSI chip has been designed to be used in the receiver subsystem for maintaining the channel and node status tables [22]. The chip is designed to receive serial data at a speed of 2 Giga bits per second. The data is decoded, the entries in the tables are identified and updated. The chip was designed using Octtools on a MOSIS tiny chip frame and fully simulated with MUSA. The design of the chip incorporated the results of the performance analysis of Section 5 where it is shown that the optimum ratio of nodes to channels is 2:1. The chip was designed in a modular fashion, each implementing the status tables for 4 nodes and 2 channels, such that an array of chips could be used for larger systems. A backlogged node checks its status tables at the beginning of its preallocated time slot. If the target node of the first queued packet has a status table entry of less than or equal to 0, it is considered idle. If the target node is idle, the transmitter then checks for an available data channel. A data channel is considered idle if its status table entry is less than or equal to . This achieves overlap of the switching latency . The control packet is then formed with the source, target and selected data channel identifiers. If a node is not backlogged, its control slot remains idle during that cycle. In case the target is busy or an idle data channel is not available, the source node waits until the next cycle to attempt transmission. The features of this proposed protocol are:

} } }

No collision on either the control or data channels Arbitration is not required at the end of a cycle Supports variable sized data packets 8

} } } } }

Overlaps switching latency to decrease impact on performance Flexibility in using data channels Breaks linkage between the number of nodes and channels Easily adaptable to a change in the number of interconnected nodes and channels Reduced architectural complexity

TDMA-CS eliminates the requirement of synchronizing data packet transmission to the start of a control cycle. In DT-WDMA, the data packet is transmitted during the following control cycle, increasing the packet delay by one half the control cycle length on average. TDMA-CS reduces this latency by immediately transmitting the data packet control slots following the transmission of the control packet. The performance of the two protocols are studied in the following two sections by an extensive simulation study. The simulation models are used to study the impact to performance with changes in the numbers of nodes, channels, data packet length, packet generation rate and switching latency.

4 Performance Model The performance analysis studies protocol behavior with variations in system parameters such as M , C , L, Table 1 summarizes the architecture parameters and the notation used to denote the performance metrics.

and .

The performance metrics of primary concern are throughput and packet delay. Throughput of the network is studied in terms of packets per time unit when comparing cases with equal packet lengths, and data channel utilization is used when comparing cases with different packet lengths. The model assumptions are: 1. All nodes are assumed to behave independently. 2. Two cases are considered for data packets lengths: (a) Fixed with lengths L.

(b) Variable with lengths having an exponential distribution with mean length L. The objective is to develop an understanding of the relationship between data packet length and obtained performance. For example, Section 5 shows that optimal performance of DT-WDMA occurs when M = C = L + . 3. Packet generation follows a poisson process with a rate  packets per unit time per node. 4. A data packet can be transmitted on any idle data channel with equal probability for TDMA-CS protocol. 5. Data packet synchronization:

} }

TDMA-CS protocol - synchronization at control slot boundaries; DT-WDMA protocol - synchronization at control cycle boundaries.

6. Uniform reference model: a packet generated at 1  i  M and 1  j

mi

is targeted to

 M ; and with probability 0 when i = j .

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mj

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1

M ?1

for

i 6= j ,

The simulators are based on a stochastic self-driven discrete event model, written in the C programming language with SimPack. SimPack is a C based library of routines that provide discrete-event and random variate facilities [23, 24]. The simulation was performed using the computing facilities at the National Center for Supercomputing Applications, University of Illinois at Urbana-Champaign. Steady state transaction times and throughput were measured. Simulation convergence was obtained through the replication/deletion method [25] with a 98% confidence in a less than 2% variation from the mean. The performance metrics of the two protocols studied in Section 5 are the average packet delay t, the throughput of the network in packets per unit time ?, and the data channel utilization Udc . Average Packet Delay: The packet delay is defined as the time taken from the instant a packet is generated at the node to the instant it is received at the target node. This includes the waiting time, synchronization time, and the packet transmission time. Data Channel Utilization: The percent of time the data channels are busy transmitting data packets defines the data channel utilization (Udc ). This represents the total network utilization. Network Throughput: Throughput is expressed as the number of packets successfully transmitted across the network per unit time. The throughput of the network in terms of packets per unit time, denoted as ?, is ? =

Udc . L

An objective of TDMA-CS is to achieve performance levels equal to that achieved by DT-WDMA, but with fewer data channels. Furthermore, when systems with an equal number of channels are compared, TDMA-CS achieves superior performance and supports a larger number of nodes. To accomplish this goal, we need to identify whether the performance achieved by TDMA-CS is control limited, or limited by data channel starvation. Data channel starvation occurs when data packet transmission is blocked due to the unavailability of a data channel when the target node is not blocked (since C  M ). A system is defined as control limited when the throughput is bound due to destination blocking or insufficient access to the control channel. Control limitations occur for both TDMA-CS and DT-WDMA. For example, an increase in the number of data channels improves performance characteristics for a protocol limited by data channel starvation, but has little or no effect on a control limited system. The maximum possible throughput when the system is data channel limited is ?max

=

C L

packets per unit time,

C per unit time per node. This issue is examined in greater detail therefore the saturation traffic per node is sat = ML in Section 5.

The next section analyzes the protocol in terms of the parameters given in the above sections for variations in the system parameters.

5 Performance Analysis This section analyzes the performance of the proposed protocol TDMA-CS, and compares the results to the performance achieved by the DT-WDMA protocol proposed in [1] through extensive simulation. The performance metrics of interest are the average packet delay and throughput of the network. The effect of varying the packet generation rate, the data packet length, the number of nodes, the number of data channels, and the switching latency are analyzed in the following sections. DT-WDMA has been analyzed for C = M . The performance of TDMA-CS is evaluated at C 2 fM; M=2; M=4g.

5.1

Variation in Packet Size

This section compares the performance of the two protocols in terms of packet delay and throughput as a function of packet generation rate at each node for variations in data packet length.

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Figure 4: Effect of variations in variable packet length with mean L on average packet delay and network throughput with (a) M 16 (b) M 32 (c) M 64.

=

=

=

12

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C = M for all cases.

Fig. 3 considers the behavior of the protocols with varying packet sizes of L 2 f16; 32; 64g. Data packets are assumed to be of constant length. All cases assume that C = M and = 0. Fig. 4 considers the behavior of the protocols when the data packet length is exponentially distributed with mean L 2 f16; 32; 64g. Note that in Fig. 3, for the cases when M = C = L, the best case of DT-WDMA is compared to the worst case of TDMA-CS. The case of M = 16, M = 32 and M = 64 is considered in Fig. 3(a), Fig. 3(b) and Fig. 3(c), respectively. In all the cases, DT-WDMA has higher delay for lower packet generation rates. This is because data packet transmission with DT-WDMA is synchronized to control cycle boundaries: the packet waits an average of (M2?1) + control slots before being transmitted, whereas it is in TDMA-CS. The ideal case for DT-WDMA is when L = M . However, L as an integral multiple of M represents the worst case of TDMA-CS. This is because the TDMA-CS data packet transmission starts at the end of a control slot. When = 0 and L is a multiple of M , the data packet transmission completion for TDMA-CS coincides with its slot in the control cycle. If this node had another packet to transmit, it would have to wait the remaining (M ? 1) control slots to transmit the control packet. This is due to the implementational differences in the two architectures. DT-WDMA has been designed for architectures with two transmitters, whereas TDMA-CS has been designed for an architecture requiring only one transmitter. However, as shown in Fig. 4, this limitation is shown not to degrade the performance of TDMA-CS. The advantage of TDMA-CS breaking the restriction of control cycle synchronization is illustrated by Figs. 3(b)-(c) when L < M . In this case DT-WDMA suffers a loss of data channel utilization since all data channels are forced to remain idle for M + ? L time units per cycle. This results in a reduction in the capacity of the DT-WDMA network: the saturation point of TDMA-CS is shown to be larger than DT-WDMA for these cases. For a lightly loaded system, both protocols exhibit little waiting time due to queueing; the delay is due to synchronization of data packet transmission with either the control cycle (in DT-WDMA) or a control slot (in TDMA-CS). The delay of the lightly loaded DT-WDMA protocol is comprised of four components: the initial synchronization delay for the node’s place in the control cycle, control packet transmission, the delay until the start of the next control cycle, and the data packet transmission On the average, this delay is:  M + 2 +time. L if L  M tmin DT ?WDMA = (L+ ) + 2(L + ) ? M if L > M . 2 2 The delay of the lightly loaded TDMA-CS protocol is comprised of four components: the initial synchronization delay for the nodes place in the control cycle, control packet transmission, control slot switching latency, and the data packet transmission time: (M ? 1) tmin + 1 + + L. TDMA?CS = 2 Fig. 4 shows the behavior of the two protocols when the packet length varies. The data packet length is taken to be exponentially distributed with mean L 2 f16; 32; 64g. Figs. 4(a)-(c) show the performance with M 2 f16; 32; 64g. For all cases of L = M , L < M , and L > M , TDMA-CS is shown to be consistently superior to DT-WDMA. The saturation points are significantly higher than the DT-WDMA protocol. In practical situations, support of variable data packet lengths is considered essential. The graphs in Fig. 3 illustrate the penalty the TDMA-CS network pays due to synchronizing the data packet transmissions at control cycle boundaries. For example, Figs. 3(b)-(c) illustrates that the DT-WDMA throughput is bound by the L = M case for the cases of L < M . Figs. 4(a)-(c) show the throughput of the network in the two protocols with variable packet sizes. In all the cases considered, TDMA-CS achieves a higher throughput than DT-WDMA, and significant improvement is achieved when L < M .

5.2

Impact of the Switching Latency

This section studies the effect of varying the switching latency for the protocols. This assumes that the transmitter must allow sufficient time for the target node to receive and decode the control packet, and then tune its receiver to the specified data channel (denoted as ). This paper introduced an overlapping mechanism for TDMA-CS 13

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Figure 5: Impact on average packet delay and network throughput with varying switching latencies for DT-WDMA and TDMA-CS protocols. Variation with 2 f0; 1; 2; 4g, variable packet lengths with mean L 2 f16; 32; 64g and M 32. DT-WDMA with C 32 (a) Average Packet Delay (b) Network Throughput. TDMA-CS with C 8 (c) Average Packet Delay (d) Network Throughput.

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for all cases and variations in fixed

designed to reduce the impact of this delay. The objective was to reduce the performance sensitivity on the switching characteristics of the optical components, propagation delay, and control packet decode time. This section examines the results of this overlapping mechanism on the delay and throughput characteristics. In particular we are interested in the case when data channel starvation may occur (C < M ). Fig. 5 shows the effect of the overlapping mechanism on the delay and throughput of the TDMA-CS and DT-WDMA protocols. Fig. 5 plots the effect of varying 2 f0; 1; 2; 4g (multiples of control slots) on the delay and throughput. Each graph considers variable packet sizes with an exponential distribution with mean length L 2 f16; 32; 64g. DT-WDMA considered M = 32 and C = 32, while TDMA-CS used M = 32 and C = 8. Figs. 5(a)-(b) plot the delay and throughput for DT-WDMA, and Figs. 5(c)-(d) plot the delay and throughput for TDMA-CS. Each graph contains a total of 12 plots. As is increased from 0 to 4, the delay is shown to increase in proportion to for TDMA-CS. However, the graphs show that this increase is not significant when the entire delay is considered. The effect of varying is shown to have a greater effect on the DT-WDMA delay. The graphs shows that TDMA-CS throughput is highly insensitive to increases in for all the combinations of packet lengths under consideration. This advantage is achieved with the simple overlap scheme described in Section 3. The effect on the throughput of DT-WDMA is pronounced because the control cycle must be extended by in this protocol.

5.3

Variations in System Size

This section analyzes the effect of variations in the number of nodes and packet length on the delay and throughput when the number of data channels remain constant at C = M . Fig. 6 shows the effect of variations in system size on average packet delay and network throughput with varying packet sizes of L 2 f16; 32; 64g. Data packets are assumed to be of constant length. The graphs show how the protocols behave with increases in system size at a value of traffic per node for a specific packet length. Fig. 6(a) plots the delay for L = 16. This graph considers the case when L  M . TDMA-CS is shown to achieve increased saturation capacity over DT-WDMA for M > L. This is because of the loss of data channel utilization due to control cycle synchronization with DT-WDMA. The case of M = C = L = 16 illustrates the best case of DT-WDMA, and shows that the saturation point is higher than that of TDMA-CS under this condition. The effect of fixed packet lengths which are multiples of M on TDMA-CS can be seen in the Figs. 6(b)-(c). Figs. 6(a)-(b) show that TDMA-CS can take advantage of smaller packet lengths (L < M ) and reduce the average delay and increase the system capacity. Figs. 6(a)-(c) illustrate an advantage of time multiplexing the control channel rather than the data channels: the (M ? 1) (M ? 1)L synchronization delay is approximately rather than . The result is that doubling the size of 2 2 the system does not double the delay with light traffic with both protocols. Figs. 6(a)-(c) shows that TDMA-CS consistently achieves lower delay than the DT-WDMA approach for lightly loaded systems. Fig. 7 shows the effect of variations in system size on average packet delay and network throughput with variable data packet lengths. The data packet length is assumed to be exponentially distributed with mean L 2 f16; 32; 64g. In all the cases of M , TDMA-CS performs better than DT-WDMA: it has lower average packet delay and higher saturation points. The series of graphs in Figures 6 and 7 show that only when the packet length is fixed and M = C = L does DT-WDMA achieve superior performance over TDMA-CS. Figs. 6(a)-(c) also show the effect of varying M and L on network throughput with a constant number of data channels. The graphs consider the case of C = M with M 2 f16; 32; 64g and L 2 f16; 32; 64g. Fig. 6(a) plots the throughput for L = 16 and M 2 f16; 32; 64g. For L = 16 and M = 64, TDMA-CS achieves a 33% improvement in maximum throughput over DT-WDMA. As the system size increases, the throughput increases for TDMA-CS whereas DT-WDMA becomes control limited. The effect of control channel limitation can be seen with TDMA-CS in Fig. 6(a), but at a reduced extent.

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Figs. 6(b)-(c) consider the cases of L = 32 and L = 64, respectively. As the packet length increases, the limitation due to the control channel becomes less significant with DT-WDMA. Fig. 7 shows the behavior of the protocols with variable packet lengths. As before, this case is considered to provide a more accurate picture of the resulting performance when there are variable data packet lengths. In all the cases, TDMA-CS has consistently higher network throughput than DT-WDMA.

5.4

Variations in Data Channels

This section analyzes the effect on delay and throughput due to variations in the packet length and the number of data channels. Only TDMA-CS is considered because DT-WDMA is restricted to an architecture where C = M . The objective is to see if the performance levels of DT-WDMA can be achieved by TDMA-CS with fewer data channels. Furthermore, we wish to identify if the system is control limited or data channel limited. A control channel limited system will receive no benefit from an increase in the number of data channels. Figs. 8(a)-(c) illustrate the performance of TDMA-CS with varying numbers of channels. In particular, we plot the cases of C = M , C = M=2 and C = M=4. Delay is plotted against network throughput for L 2 f16; 32; 64g in Figs. 8(a)-(c) respectively. In each case, the delay characteristics are plotted for M 2 f16; 32; 64g. For a lightly loaded system, the protocol exhibits the same delay characteristics for each channel configuration, since there is little channel contention. The delay for the C = M=4 in each case saturates at relatively low packet generation rates, as compared to C = M=2 and C = M , since there are fewer channels available for data packet transmission. The degradation is much less pronounced for C = M=2, where the delay is comparable to the C = M delay even at high packet generation rates. The saturation point for the C = M case is only slightly higher than the C = M=2 case. This slight increase in delay may be exchanged for an M=2 reduction in channels. For each case considered in the graphs of Fig. 8, the performance of the C = M=2 and C = M are similar. It can thus be concluded that the performance of TDMA-CS seen in the previous sections can be achieved with 50% fewer data channels than the DT-WDMA protocol. Additional data channels are available as C increases, decreasing the probability of a control packet being blocked due to data channel starvation. The saturation point thus increases with an increase in C when the system is data channel limited. The maximum throughput under this condition was shown to be ?max

C therefore the saturation traffic of this configuration is sat = LM

=

C L

packets per unit time,

packets per unit time per node. Below this point an increase in the number of data channels does not provide significant improvement in performance since there are sufficient channels, and data channel starvation has a low probability. The network throughput is also plotted for L 2 f16; 32; 64g in Figs. 8(a)-(c), respectively. In each case, the throughput characteristics are plotted for M 2 f16; 32; 64g and C 2 fM; M=2; M=4g. In Fig. 8, it is shown that for all the cases there is little variation in the throughput of C = M and C = M=2. This is because the throughput is limited by destination contention in the C = M case. The throughput is limited by both data channel contention as well as destination contention for the C = M=2 and C = M=4 cases. This is indicated by the fact that for equal channels operating on different system sizes, the maximum throughput is the same. Fig. 8(a) shows the performance of M = 64 with L = 16 for varying values of C . The throughput of the network is the same in all three cases of C . This shows that the system is control channel limited for such large values of M , and any increase in the number of data channels does not improve the network performance. This means that beyond a certain system size, the same performance can be achieved with fewer data channels. This makes TDMA-CS more suitable for architectures with a very large number of nodes. This can also be seen in Fig. 9 where the performance of DT-WDMA with C = 32 is exceeded by TDMA-CS with C = 16. The plots in Figs. 9(a)-(c) show the utilization of the channels for both TDMA-CS and DT-WDMA with variable packet sizes. Total network utilization is plotted, so the maximum utilization for a configuration is equal to C . All three plots consider the M = 32 case, and TDMA-CS varies the number of data channels as C 2 f8; 16; 32g. Figs. 9(a)-(c) plot L 2 f16; 32; 64g, respectively. All three graphs show that near maximum utilization is achieved 17

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Figure 7: Effect of variations in system size on average packet delay and network throughput with C with mean L. (a) L 16 (b) L 32 (c) L 64.

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Channels are varied for TDMA-CS, and kept constant for

in the C = 8 configuration, indicating that the system is data channel limited. Near maximum utilization is seen for C = 16 in Fig. 9(c) for L = 64. For C = 32, the highest utilization is observed when L = 64 in Fig. 9(c), and even then only 47% (15=32) of the network bandwidth is utilized. This reduced utilization is a result of destination node blocking. DT-WDMA is shown to achieve a maximum of 44% data channel utilization. This is due to destination blocking and also due to synchronization at control cycle boundaries as discussed in the previous two sections. In all three cases, TDMA-CS exhibited higher channel usage for C = M=2. For example, in Fig. 9(b) when L = 32 (the optimum case for DT-WDMA), the TDMA-CS uses an average of no more than 12 out of 32 channels, and TDMA-CS uses an average of nearly 13 out of 16 channels at high arrival rates. This means that an increase in performance over DT-WDMA can be achieved by TDMA-CS with half the channels.

6 Conclusions This paper introduced a collisionless wavelength division multiple access protocol targeted to a star-coupled photonic network. The network architecture has nodes with one tunable transmitter and two receivers. One of the receivers is fixed and used for sensing the control channel, and the other receiver is tunable for the data packets. Static allocation is employed on the control channel, providing maximum throughput and high network stability with heavy traffic. The protocol was compared to a recently proposed protocol also based on static allocation of the control channel through extensive simulation. The performance analysis showed that the new protocol can achieve superior performance even with 50% fewer data channels, and support large system sizes. The proposed protocol was shown to be more suitable for environments that require variable packet length support. A simple mechanism was introduced that overlapped the switching latencies, decreasing the performance sensitivity on the optical component switching speeds.

References [1] M. S. Chen, N. R. Dono, and R. Ramaswami, “A media access control protocol for packet switched wavelength division multiaccess metropolitan area network,” IEEE J. Select. Areas Commun., vol. 8, pp. 1048–1057, Aug. 1990. [2] M. Fine and F. A. Tobagi, “Demand assignment multiple access schemes in broadcast bus local area networks,” IEEE Trans. on Comput., vol. c-33, pp. 1130–1159, Dec. 1984. [3] M. M. Nassehi, F. A. Tobagi, and M. E. Marhic, “Fiber optic configurations for local area networks,” IEEE J. Select. Areas Commun., vol. SAC-3, pp. 941–949, Nov. 1985. [4] P. W. Dowd, “Optical bus and star-coupled parallel interconnection,” in Proc. 4th International Parallel Processing Symposium, (Los Angeles, CA), pp. 824–838, Apr. 1990. [5] P. W. Dowd, “Random access protocols for high speed interprocessor communication based on a passive star topology,” IEEE J. Lightwave Tech., vol. 9, pp. 799–808, June 1991. [6] A. Ganz and I. Chlamtac, “Path allocation access control in fiber optic communication systems,” IEEE Trans. on Comput., vol. 38, pp. 1372–1382, Oct. 1989. [7] I. M. I. Habbab, M. Kavehrad, and C. E. W. Sundberg, “Protocols for very high-speed optical fiber local area networks using a passive star topology,” IEEE J. Lightwave Tech., vol. LT-5, pp. 1782–1793, Dec. 1987. [8] N. Mehravari, “Performance and protocol improvement for very high speed optical fiber local area networks using a passive star topology,” IEEE J. Lightwave Tech., vol. 8, pp. 520–530, Apr. 1990. [9] K. Bogineni and P. W. Dowd, “Collisionless media access protocols for high speed communication in optically interconnected parallel computers,” in SPIE Proceedings Vol. 1577, (Boston, MA), Sept. 1991. [10] P. W. Dowd, “High performance interprocessor communication through optical wavelength division multiple access channels,” in Proc. 18th International Symposium on Computer Architecture, (Toronto, Canada), pp. 96–105, May 1991. [11] P. W. Dowd, “Wavelength division multiple access channel hypercube processor interconnection,” IEEE Trans. on Comput., (To Appear), 1992. [12] T. P. Lee and C. E. Zah, “Wavelength-tunable and single frequency semiconductor lasers for photonic communications networks,” IEEE Commun. Mag., pp. 42 – 52, Oct. 1989.

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[13] M. S. Goodman, H. Kobrinski, M. Vecchi, R. Bulley, and J. Gimlettet, “The lambdanet multiwavelength network: Architecture, applications, an demonstrations,” IEEE J. Select. Areas Commun., vol. 8, pp. 995–1004, Aug. 1990. [14] P. S. Henry, “High-capacity local area networks,” IEEE Commun. Mag., pp. 20–26, Oct. 1989. [15] J. A. McEachern, “Gigabit networking on the public transmission network,” IEEE Communications Magazine, vol. 30, pp. 70–78, Apr. 1992. [16] K. Bogineni and P. W. Dowd, “Performance analysis of two address allocation schemes for an optically interconnected distributed shared memory system,” in Sixth International Parallel Processing Symposium, (Beverly Hills, CA), pp. 562–566, Mar. 1992. [17] C. A. Brackett, “Dense wavelength division multiplexing networks: Principles and applications,” IEEE J. Select. Areas Commun., vol. 8, pp. 948–964, Aug. 1990. [18] H. Kobrinski and K.-W. Cheung, “Wavelength-tunable optical filters: Applications and technology,” IEEE Commun. Mag., pp. 53 – 63, Oct. 1989. [19] H. Kobrinski, M. Vecchi, M. Goodman, E. Goldstein, T. Chapuran, J. Cooper, M. Tur, C. Zah, and S. Menocal, “Fast wavelength switching of laser transmitters and amplifiers,” IEEE J. Select. Areas Commun., vol. 8, pp. 1190–1202, Aug. 1990. [20] K. W. Cheung, D. A. Smith, J. E. Baran, and B. L. Heffner, “Multiple channel operation of integrated acousto-optic tunable filter,” IEE Electron. Lett., vol. 25, pp. 375–376, Mar. 1989. [21] P. W. Dowd, “Optical interconnections for computer communications,” Tech. Rep. TR01.A961, IBM Corporation, Apr. 1989. [22] K. Bogineni, A. Ranganathan, P. W. Dowd, and R. Sridhar, “Design of a VLSI chip for use in the receiver subsystem in an optically interconnected parallel computer,” Tech. Rep. TR-CES-91-0802, State University of New York at Buffalo, Department of Electrical and Computer Engineering, Dec. 1991. [23] P. A. Fishwick, “Simpack: C-based simulation seed tool package,” tech. rep., Dept. CIS, University of Florida, Gainesville FL, 1990. [24] M. MacDougall, Simulating Computer Systems. The MIT Press, 1987. [25] A. M. Law and W. D. Kelton, Simulation Modeling and Analysis. McGraw Hill, 1991.

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