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COMPLETE SET OF PIEZORESISTIVE COEFFICIENTS OF CMOS n+-DIFFUSION Michael Mayer, Oliver Paul, and Henry Baltes Physical Electronics Laboratory, ETH Zurich, HPT-F16, CH-8093 Zurich, Switzerland Fax +41-1-633 10 54, Tel. +41-1-633 29 98, e-mail: [email protected] Abstract

The piezoresistive behavior of n+-diffusions in monocrystalline CMOS-processed silicon is calibrated by independent measurements of the three piezoresistive π-coefficients. These are obtained by subjecting integrated resistors on test chips to three distinct stress fields, (a) using a four-point bending bridge [1-4] and (b) applying a pressure perpendicular to the die surface. This represents a novel method to calibrate stress sensor test chips. The experimentally induced stresses are computed by finite element analysis. Values of π11 = (-3.68 ± 0.24) x 10-4 MPa-1, π12 = (2.24 ± 0.18) x 10-4 MPa-1, and π44 = (-1.59 ± 0.09) x 10-4 MPa-1 are obtained. Introduction Integrated stress sensor test chips have been widely used to characterize microelectronic packaging technologies [2, 5]. The effect most often exploited is the piezoresistivity of silicon. For such a demanding application, careful calibration of the relevant piezoresistive coefficients π11, π12, and π44 is necessary. These parameters depend on dopant level and temperature. Previous work [4] has reported values of πS = π12 + π11 and π44 measured using a four-point bending bridge (FPBB) and resistors with orientation [110] parallel and [110] perpendicular to the bending plane. To separate πS into its two components, the approximate relation π11 ≈ -2 π12 [2] has often been used, which is valid only for n-silicon. This paper reports the independent determination of all three π-coefficients of an n+-diffusion of a commercial CMOS process in view of its use in integrated stress sensors. Two linear combinations of the π-coefficients are measured with a conventional FPBB [3, 4]. A third combination is accessed by subjecting n+-resistors to a perpendicular pressure. The resulting stress field is complementary to that achievable with the FPBB. Test structures and chips We designed two n+-doped serpentine resistors on (100) p-substrate. Their layout is shown in Fig. 1. Six terminals enable accurate four-wire resistance measurements on each resistor. Each has a resistance of roughly 10 kΩ at 25°C. The resistors are located on test chips of size 4.58 mm x 4.79 mm x 0.52 mm. The distances of the left resistor in Fig. 1 from the left and lower edges of the chips are 1.675 µm and 345 µm, respectively. The resistors were fabricated with the commercial 2 µm CMOS process alp2lv of EM Microelectronic-Marin SA, Switzerland. The NMOS source/drain diffusion with a sheet resistance of approximately 21 Ω was used for the resistors.

[110]

[110]

y z

108 µm

x

n+-diffusion 126 µm

metal line

Layout of n+-silicon piezoresistors, each with a resistance of roughly 10 kΩ, connected to six terminals for four-wire measurements.

Fig. 1

Experimental The test chips were attached onto the center of 0.9 mm thick, 20 mm wide, and 130 mm long steel ribbons, with the [110]-resistor parallel to the long sides of the ribbon. The die attach material, STYCAST® 2651, has a thickness of 35±15 µm. Electrical contact was established by wire bonds connecting the bonding pads on the chip to a PCB, and from there to the measurement instruments. The PCB is locally glued to the ribbon in such a way that it minimally influences its bending deformation. 0.2

0 -0.01

[110]

-0.2 -0.4 -0.6 [110]

-0.8

∆R/R [10-2]

∆R/R [10-2]

0

-0.02 -0.03 -0.04

-1

-0.05

-1.2

-0.06 0

Fig. 2

0.5 1 1.5 Rod displacement [mm] (a)

0 1 2 3 4 5 Plastic tool pressure [MPa] (b)

Relative change of resistance ∆R/R induced by (a) the four-point bending bridge and (b) the perpendicular pressure.

In the FPBB setup [1], the ribbon is bent by two pairs of rods, the outer and inner pairs being 120 mm and 40 mm apart, respectively. A series of controlled stress levels was applied by moving the inner rods upwards from 0 mm to 2 mm in steps of 0.5 mm. Resistance changes of each resistor were determined after each step. This induces linearly increasing in-plane stresses in the resistors. Resulting relative resistance changes are shown in Fig. 2(a). Slopes of the experimental data are (-7.35 ± 0.04) x 10-3 mm-1 and (6.35 ± 0.10) x 10-4 mm-1 for [110]- and [110]-oriented samples,

respectively. Sample-to-sample variations may be due to different adhesive thicknesses and process-inherent doping variations and are shown in Fig. 2(a). The two slopes yield two linear combinations of the π-coefficients. In the second experiment, the chips were subjected to a vertical force. The load was exerted by the circular base of a plastic tool 320 µm in diameter mounted at the end of a lever with movable weight. This situation induces perpendicular as well as in-plane stresses in the test structures. Relative resistance changes as a function of perpendicular pressure are shown in Fig. 2(b). The experimental slope is (-1.24 ± 0.03) x 10-4 MPa-1. This corresponds to a third linear combination of the π-coefficients. Numerical Simulation and Results To evaluate the π-coefficients, the stress levels caused by the experimental deformations must be quantitatively known. We used the finite element (FE) analysis toolbox SOLIDIS [6] to compute the stresses at the sensor locations. The finite elements chosen are well suited for geometries with high aspect ratios. Figure 3 shows examples of meshes used to simulate the FPBB and vertical force setups. The accuracy of the results were verified with different meshes with element counts between 2000 to 20000. The results varied by less than ± 2 %. The mechanical anisotropy of silicon was fully taken into account by way of its stiffness matrix, as given in Ref. [2]. 220 MPa [7] and 5 MPa [8] were taken for Young’s moduli of, respectively, the steel ribbon and the adhesive. Corresponding Poisson’s ratios are 0.29 [7] and 0.33 [9]. pressure tool

40 MPa 46 MPa

-1 MPa -0.6 MPa

(a) Fig. 3

(b) B

(a) Finite element mesh and simulated stress σ x in FPBB setup. Only a quarter of the symmetric bridge and chip is shown. (b) Finite element P mesh and simulated stress σ z in vertical pressure setup.

For a rod displacement of 1 mm in the FPBB setup, the simulated stress averaged B B B over the sensor area is σ x = (48.3 ± 2.0) MPa, σ y = (-1.90 ± 0.05) MPa, σ z = (-0.07 ± 0.01) MPa. For the definition of the x-, y-, and z-directions see Fig. 1. The absolute B values of the shear stress components are less than 2 % of σ x . In the perpendicular P P pressure experiment, an applied pressure of 1 MPa results in σ x = σ y = (-0.74 P ± 0.01) MPa and σ z = (-1.03 ± 0.02) MPa. The absolute shear stresses are smaller

than 0.1 MPa.The π-coefficients were extracted from these values and the relative resistance changes, using the equation

π 11 (1)

1 π 12 = --2 π 44

B σx

+

B σy

B σx

+

B σy

+

B σz

B

B

σx + σy + σz

P

P

σx + σy + σz

σx + σy σx + σy

B

B

B

P

P

P

B σy



B

B σx B

σx – σy 0

–1

∆R ⁄ R

B [ 110 ]

∆R ⁄ R

B [ 110 ]

∆R ⁄ R

P

The results are π11 = (-3.68 ± 0.24) x 10-4 MPa-1, π12 = (2.24 ± 0.18) x 10-4 MPa-1, and π44 = (-1.59 ± 0.09) x 10-4 MPa-1. The errors of π11 and π12 originate mainly from variations in the contact area of the plastic tool, while that of π44 is mainly due to the accuracy limit of the FE analysis. The π-values are consistent with those reported in Ref. 2 for degenerately n-doped silicon. Conclusions We determined the three piezoresistive coefficients π11, π12, and π44 of n+-diffusions fabricated in commercial CMOS technology. This was achieved by a combination of the conventional approach using a four-point bending bridge with a novel, complementary, experimental setup with vertically applied pressure. The experimental values of π11 and π12 show that relations such as π11 ≈ -2 π12 have to be considered with care. Acknowledgments Technical support by H. Hediger of the ETH Hoenggerberg mechanical workshop and by S. Schlumpf, J. Langer, K. Hegglin, and D. Bolliger of ESEC SA are gratefully acknowledged. This work was supported by the Swiss Priority Program MINAST. References [1] [2]

[3] [4]

[5] [6] [7] [8] [9]

R. van Gestel, Reliability Related Research on Plastic IC-Packages: A Test Chip Approach, Delft University Press, 1994, pp. 211 J. H. Lau, Ed., Thermal Stress and Strain in Microelectronics Packaging, van Nostrand Reinhold, New York, 1993, chapter 7: “Die Stress Measurement Using Piezoresistive Stress Sensors”, by J. N. Sweet, pp. 221 R. C. Jaeger, Jeffrey C. Suhling, A. A. Anderson, “A (100) Silicon Stress Test Chip with Optimized Piezoresistive Sensor Rosettes”, Proc. 44th ECTC, New York, USA, 1994, pp. 741 J. N. Sweet, D. W. Peterson, J. A. Emerson, “Liquid Encapsulant and Uniaxial Calibration Mechanical Stress Measurement with the ATC04 Assembly Test Chip”, Proc. 44th ECTC, New York, USA, 1994, pp. 750 D. A. Bittle, J. C. Suhling, R. E. Beaty, R. C. Jaeger, R. W. Johnson, “Piezoresistive Stress Sensors for Structural Analysis of Electronic Packages”, J. of Electronic Packaging, 113, 1991, pp. 203 J. G. Korvink, H. Baltes, “Microsystem CAD,” Proc. SPIE Conf. on Micromachined Devices and Components II, Austin, Texas, USA, Vol. 2882, 1996, pp. 170 H. Kuchlin, Taschenbuch der Physik, Leipzig; Köln, Fachbuchverlag, 1995 Technical Bulletin 7-2-10A, STYCAST®2651MM, by Emerson & Cuming Europe N. V., Oevel, Belgium Personal communication, Ablastik®, California, USA