control solutions for interleaved boost converters

This paper is a postprint of a paper submitted to and accepted for publication in ELECTRIC POWER COMPONENTS AND SYSTEMS and it is subject to Taylor & Francis Copyright 1 The copy of the record is available at http://www.tandfonline.com/doi/abs/10.1080/15325008.2014.880969.

A rapid prototyping scenario for PFC in PMSM drives: control solutions for interleaved boost converters Gionata Cimini∗ , Maria Letizia Corradini∗∗ , Gianluca Ippoliti∗ , Giuseppe Orlando∗ and Matteo Pirro∗ ∗ Dipartimento di Ingegneria dell’Informazione Università Politecnica delle Marche Via Brecce Bianche 12, 60131, Ancona, Italy ∗∗ Scuola di Scienze e Tecnologie Università di Camerino Camerino, Italy

Abstract—Rapid prototyping of control is one of the most important technologies for designers and researchers to shorten design and testing of control algorithms. This paper presents power electronics opportunities provided by PSIM software and high performance DSP. The field of application examined is the motor control and switching mode power supplies. In particular more emphasis to the theoretical treatment of linear and nonlinear power factor controllers has been given and the performances of examined algorithms in both the simulated and the real world have been verified. Finally, a good matching between the results of these two configurations has been documented.

I. I NTRODUCTION The continuous growth of device complexity we are facing in recent years, which in turn demand for more and more advanced control techniques, claim for hardware and software design algorithms of increasing complexity as well. Therefore, the use of powerful development tools become crucial both for reducing design time and costs, and to minimize the probability of errors, which of course increases with the complexity of design. Generally speaking, developing and testing physical prototypes can be very expensive. To minimize costs, two approaches are commonly adopted, namely simulation and rapid prototyping. In particular, the prototype developing method reduces time of control algorithms development, since hardware error can be ignored and developers can concentrate only on the control algorithm performances. The so-called Rapid Control Prototyping (RCP) method is widely used in industrial frameworks because it allows to save the time needed for developing high level algorithms for different devices, and accordingly, development costs can be reduced by 30% to 40%. In literature several rapid prototyping systems have been proposed in different fields of application [1]– [3]. An application of PSIM simulation software for rapid prototyping of DSP based power electronics control systems has been illustrated in [4]. A number of papers are available dealing with the implementation of a rapid prototyping system, which involves the design of DSP algorithms using Matlab and Simulink blocksets or other powerful tools, automated code generation and downloading of executable code to the

Texas Instruments’ evaluation modules such as [5]–[7]. Rapid prototyping enable system- and component-level design and simulation, automatic code generation, and continuous test and verification. Users can directly generate executable codes from models and download them into the DSP board for realtime control, which reduces developers’ boring programming burden. On the other hand, a disadvantage of rapid prototyping is that instead of hand-in programming, standard procedures are used requiring standard hardware platform. It is worth mentioning that rapid prototyping systems can be effectively used as educational tool [8] for learning digital signal processing (DSP) techniques and implement in real-time the studied algorithms, for both undergraduate and postgraduate levels. An application field where the rapid prototyping can have a strategic role is the control of the power converters and electric drives, in particular in the study of algorithms for the improvement of power quality. The increasing penetration of single-phase power electronic-based appliances into the different segments of end-use demands the establishment of adequate harmonic current limits. The harmonic reduction requirements imposed by regulatory agencies (IEC 1000-3-2 and EN 61000-3-2) have accelerated interest in active power factor corrected preregulators for switching power supplies. AC-DC converters are extensively used in various applications. An important application field of Power Factor Correction (PFC) techniques is electric motor control [14], [21], [22]. In fact motor drives reject a high number of harmonics in the line current and the PFC method is a good candidate for AC-DC switched mode power supply in order to reduce the harmonics in the line current, increase the efficiency of motor drives. AC-DC electronic equipments use a rectifier as input stage and a large capacitor as a filter on the DC side. Non-linear loads draw non-sinusoidal currents and this will result in large current harmonics: a poor Power Factor (PF) is a by-product of these injected harmonics. The most important effects of harmonics in current due to lagging PF are i) deformation of supply voltage waveform, ii) I 2 R losses on the “utility side” of the grid, iii) the increase in current flow in the capacitors which results in additional heating and reduced life, iv)

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the increase, especially due to triplen harmonics, of currents magnitude in three phase systems over the neutral line (usually not sized appropriately for large currents), v) the over-heating in transformers and induction motors. Harmonic contamination and low PF in power systems caused by power converters have been a great concern in industrial applications and research. Regulations from international bodies prohibit from drawing too much non-sinusoidal current; the implementation of a Power Factor Control (PFC) technique forces the equipment to draw a sinusoidal current and thus is a required feature for a good quality power converter system which needs to meet stringent specifications on efficiency, harmonic distortion and voltage regulation. Extensive research papers have been presented to reduce system cost and complexity, from either control techniques or topological implementations [9], [10]. There are two general types of PFC methods to obtain a unity PF: analog and digital techniques. In the past, due to the absence of fast microprocessors and DSPs, analog PFC methods were the only choice for achieving a good PF [11]. Many control strategies using analog techniques have been experimented such as hysteresis control [16], average current control [12] and peak current control [13]. The most common solution in the industrial field is a boost preregulator driven by a monolithic control ICs [17] implementing the average current mode control technique. Conventional active PFC converters use classical PI controllers to carry out power factor correction. Several approaches [15], [29] have been also proposed to take into account the nonlinear dynamics of the system.With the constant updates in the microprocessor and DSP technologies, there is the possibility to implement complex PFC algorithms using these fast processors [18]. In this paper a rapid prototyping scenario for PFC of Permanent Magnet Synchronous Motors (PMSM) drives has been considered. Well known linear and nonlinear PF controllers available in the literature have been implemented, and performances of the analyzed algorithms have been tested for the simulated and the real system. In particular, the main contribution of this paper is the exploitation of a rapid prototyping system, allowing to reduce the development time and make testing simple and easy. Indeed, among all nonlinear techniques Passivity Based Controller (PBC) has been used, [19], [20] and references therein. The goal of PBC is to modify the closed loop energy dissipation and potential energy properties of nonlinear passive systems; thus it is particularly suited for the class of dynamical systems in which the energy exchanged with the environment plays a central role as in power converters. The paper is organized as follows. Section II presents an overview on control objective, proposing a solution for interleaved boost converter dynamics modeling and giving a general control scheme suitable for both linear and non-linear current controllers; in addition outer voltage control loop and intermediate input voltage feedforward stage are explained. Moreover the current control design with a linear technique and a passivity based solution [19] has been presented. Section III gives a detailed description of the rapid prototyping environment and of the steps to be followed. PFC and voltage regulation performances have been compared taking into account the two

CIMINI, CORRADINI, IPPOLITI, ORLANDO AND PIRRO

different control solutions in both simulated and real scenarios; experimental proof of interleaving technique improvements has been reported. II. P ROBLEM S TATEMENT AND M OTIVATIONS A. Power Factor Control PF is defined as the ratio of the real power to apparent power; it is a measure of how efficiently the current is drawn from the source. PF index varies between 0 and 1 and when the current and voltage waveforms are in phase, unity PF is obtained in absence of distortion. Unity PF is reached making the circuit looking purely resistive (apparent power equals real power). In PMSM drives, the 3-phase inverter stage and the motor act as a nonlinear load to the PFC stage which draws harmonic currents from the power stage. Harmonics result in reactive power which causes the real power to be less than apparent power, reducing PF and resulting in losses. Harmonic current with high Total Harmonic Distortion (THD) can also distort the line voltage. The purpose of PFC is to draw a sinusoidal current from the line, with less distortion as possible, in phase with line voltage. PF and THD indexes are related by the following equations.   I1   √   2   DF =  s  ∞ I2  P  n (1) I02 + n=1 2 r 1 − DF 2 P F = DF cos(θ1 − φ1 ) T HD = DF 2 with DF the distorsion factor, I0 the current DC component, I1 the current fundamental component and (θ1 − φ1 ) the difference between fundamental components phase of voltage and current. B. Interleaved boost converter model In order to extend the power limits, it has been proposed the parallel connection of PFC boost converters operating in interleaved mode. The interleaved boost converter is simply two boost converters operating out of phase. The input current is the sum of the two inductor currents. Because of the inductor ripple currents are out of phase, they soften each other and the total ripple amount of the input current reduces: the best cancellation occurs at 50% duty cycle. In addition, a smaller input ripple current results in many benefits such as a smaller RMS ripple current for output capacitors, or a lower current stress for each parts (including switches, diodes, inductance) [23]. To get equal input current sharing many proposals have been studied: programming average current technique [26], current control mode, master-slave configuration [24], [25]. These approaches are the most common techniques, but it is required that both inductors and diodes of the two phases have equal characteristics; only in that way current sharing is guaranteed. With master-slave technique, adopted in this work, the master branch operates freely, driven by output dutycycle control; whereas slave branch follows master with a 180◦ phase shift.

A RAPID PROTOTYPING SCENARIO FOR PFC IN PMSM DRIVES: CONTROL SOLUTIONS FOR INTERLEAVED BOOST CONVERTERS

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The dynamic model of the interleaved boost converter is derived using the state-space averaging method. The variables are averaged over one switching period Ts , leading to the following equivalent low-frequency model of the converter: 2 RL RDSon dhig (t)i = (hvg (t)i − hig (t)i − d(t) hig (t)i− dt L 2 2 Rd − d0 (t)hv(t)i − d0 (t) hig (t)i − d0 (t)Vd ) 2 1 dhv(t)i 1 0 = d (t)hig (t)i − hv(t)i dt C R (2)

Fig. 1. Boost PFC Control Scheme with Linear Current Controller.

where L, C and R are respectively the inductance, the capacitance and the load value, Vd is the diode threshold, Rd is the diode resistance, RDSon is the mosfet on-resistance, d(t) = 1 − d0 (t) is the duty cycle of the PWM and finally hv(t)i and hig (t)i are respectively the averaged output voltage and inductor current, expressed as hx(t)iTs =

1 Ts

t+T Z s

x(τ )dτ.

(3)

t

For interleaved boost modeling and control it is taken into account the relationship between shunt sensed current and inductor branches (see Fig. 1), i.e. ig (t) = il1 + il2 , which is valid with equivalent inductor branches. C. Controllers 1) Voltage loop: In order to regulate the DC output voltage v(t) at the desired value vref , driving the signal vcontrol (t) used in feedforward stage, a linear compensator Gcv (s) (see Fig. 1) has been designed, considering the following transfer function vˆ(s) Pav = vˆcontrol (s) sC V¯ Vcontrol

kv vcontrol (t)vg (t) vg,rms (t)2

3) Linear Control: The current compensator Gc (s) in Fig. 2 drives to zero the error between ig (t) current measure and igref (t) current reference. Thus boost converter current dynamic (first Eq. in (2)) can be linearized obtaining the transfer function for current loop; current ig (t) is sensed with an op-amp circuit over a shunt resistor. In AC-DC boost converter, small signal assumption [11] is valid respect to the converter output voltage, thus hv(t)iTs = V + vˆ(t)

(4)

where s is the Laplace variable, V¯ and Vcontrol represent the DC output voltage and the DC control signal, respectively, Pav is the average rectifier power and C is the boost capacitance, [27]. The designed linear compensator Gcv (s) consists of a PI with anti windup technique, [11].The output voltage controller has minimize the negative effect of the Right Half Plane (RHP) zero; as a rule of thumb, setting the overall control loop bandwidth to 1/3 of the RHP zero is enought to provide the closed loop stability, but requires a compromise in the control performance. 2) Input voltage feedforward: Derivation of inner control reference from input voltage vg (t) makes the current ig (t) following a sinusoidal wave shape, proportional to the input voltage. Multiplier feedforward stage implements the following equation: vref 1 (t) =

Fig. 2. Boost PFC Control Scheme with Passivity-Based Current Controller.

(5)

where kv is a design constant, vcontrol (t) is the control signal of the compensator Gcv (s), vg (t) is the rectified input voltage and vg,rms (t) is the computed vg (t) RMS value, [11].

(6)

with V quiescent (DC) operating point and vˆ small-signal component (|ˆ v (t)| |V |); whereas variations in duty-cycle d(t) and rectified input variables (vg (t) and ig (t)) are relevant and small signal assumption is not valid for these measures. Taking into account loss-free version of (2) boost current dynamic equation hîg (t)i = hvg (t)i − d0 (t)hv(t)i (7) dt dynamic for inner control loop can be linearized combining (6), (7) and discarding non-linear term −d0 vˆ(t) 2L

hîg (t)i = hvg (t)i − d0 (t)V (8) dt Thus transfer function for inner current loop is derived from (8) 2L

ig (s) V = d(s) s2L

(9)

where ig (s) is Laplace transform of hig (t)iTs , d(s) is Laplace duty-cicle function, V is DC output voltage and L is the inductance value.

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4) Passivity Based Control: PFC control scheme using Passivity-Based current Control is shown in Fig. 1. A passivity controller for interleaved boost converter has been derived following PBC methodology in [19]; for reader’s convenience the main equations have been reported. The averaged model (2) has been used in an Euler-Lagrange (EL) matrix equivalent formulation as DB z(t) ˙ − (1 − d(t))JB z(t) + RB z(t) = εB (d(t))

(10)

Storage function Hd =

1 T z˜ DB z˜ 2

(11)

has been considered, where z˜ = z − zd and zd is the desired trajectory for state variables. To impose a suitable damping, Rayleigh error dissipation term can be chosen such as Fd =

1 1 T z˜ RBd z˜ = z˜T (RB + R1B )˜ z 2 2

(12)

with R1B =

R1 0

0 ; R2

R1 > 0; R2 > 0.

(13)

Error dynamics associated to storage function (11) is DB z˜˙ (t) − (1 − d(t))JB z˜(t) + RB z˜(t) = Ψ(d(t))

(14)

where Ψ(d(t)) = εB (d(t)) − (z˙d (t) − (1 − d(t))JB zd (t)+ +RB zd (t) − R1B z˜)

(15)

is the perturbation term. Unperturbed error dynamics, obtained setting Ψ(d(t)) = 0 in (14), with the injection designed term (13) is exponentially convergent; in fact the time derivative of Hd along solutions of unperturbed dynamics is H˙ d = −˜ z T RBd z˜ < 0

(16)

Controller dynamics are derived from (10) and unperturbed version of (14), obtaining

III. R APID P ROTOTYPING A. Experimental Setup The process of rapid prototyping can be summarized in three basic steps: 1) the construction of a system level or a circuit level model for the several functional blocks; 2) the integration of the individual blocks and the simulation of the overall system for the controller design; 3) the implementation on real hardware for plant models validation and controller perfomances validation; All the three steps have been completed with the proposed approach starting from the circuit design to the real hardware implementation. The following subsections provide the description of the proposed rapid prototyping approach for PMSM drive fed by a controlled interleaved boost converter power supply. 1) Model Construction: The rapid prototyping steps have been carried out on the the TI Dual Motor Control and PFC Developer’s Kit provided by Texas Instruments.The kit includes an interleaved boost converter for PFC with 4-A high speed low-side MOSFET drivers (UCC27424), an Anaheim Automation BLY172S-24V-4000 PMSM and a high performance, integrated dual full bridge motor driver (DRV8402).Thus, the various component models have been created looking at the existing hardware. Models have been realized in PSIM, a powerful simulation software designed for power electronics, motor control, and in general for dynamic system simulation. Circuit level and system level simulations are very fast due to a strong algorithm dedicated to electrical circuits that significantly reduces simulation times and convergence problems. Fig. 3 shows two PSIM screenshots. In the first one (Fig. 3(a)) the boost converter block is displayed: a boost converter, a current sensor, two voltage sensors and the feedforward voltage sensing circuitry are visible, as well as PSIM block for DSP PWM emulation. Boost design has been made taking into account key specifications using following equations:

DB z˙d (t) − (1 − d(t))JB zd (t) + RB zd (t) − R1B z˜d (t) = εB (d(t)). (17) The implicit definition of Passivity-Based Control, particularized for the interleaved boost converter configuration, is given as

− V acLL η · V 2 acLL · V√out 2 L≥ √ 2 · Vout · Pout · fsw(min) C=

thold−up · 2 · Pout 2 −V2 Vout min

(20)

(21)

where L and C are respectively boost inductance and capacL z˙1d + r(d)z1d + (1 − d)z2d − R1 (z1 − z1d ) = vg − (1 − d)Vd itance, V ac LL is the minimum input voltage, V acHL is the 2 (18) maximum input voltage, Vout is the output voltage, Vout(max) z2d C z˙2d − (1 − d)z1d + − R2 (z2 − z2d ) = 0. (19) is the maximum output voltage, Pout is the maximum outR put power, fsw(min) is the minimum switching frequency, Regulating z1 (t) = iL (t) towards a desired value z1d (t) = Vripple(p−p) is the output voltage ripple, thold−up is the holdup time and η is the estimated efficiency. Usually for the sizing vref 1 (t) , provided by input voltage feedforward stage, in of L the worst case is considered, which consists in low line Rs [19] it has been shown that zero-dynamics associated with voltage and full power; instead for the dimensioning of C, it controller (18) and (19) is locally stable around the only must be large enough to ensure a stable output voltage for half phisically meaningful equilibrium point. the line period (1/120Hz or 1/100Hz).


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Instead diode and FETs are choosen to meet efficiency requirements η = 95%. Diode losses are calculated with Pdiode =

Pout Vd ≈ 0.6W 2Vout η

(22)

where Vd is the diode threshold voltage, while FET losses are given by the contribution of different terms as shown in the equation: PF ET = Pswitch(T on) +Pswitch(T of f ) +PCOSS +PGAT E +PRDS(on) ≈ 5W (23) where PRDS(on) = IF ET (rms) RDS(on) are the FET losses on RDS(on) and IF ET (rms) is the RMS value of the FET current, PGAT E = Qof f VGS(max) fsw are the FET gate losses and 2 Qof f is the gate charge, PCOSS = 21 COSS VOU T fsw are the COSS losses and Pswitch(T on) and Pswitch(T of f ) which are the switching losses at FET turn on and turn off, respectively, are calculated as follows: Pswitch(T on) = fline

iterations X

IINton (nST EP )VOU T ton(delay)

n=1

Pswitch(T of f ) = fline

(a) Interleaved Boost Model.

(b) Motor Control Model. Fig. 3. PSIM Schemes for Boost and Motor Control.

(24)

iterations X

IINtof f (nST EP )VOU T tof f (delay) software, or exported in a CSV format for a more complex processing in numerical computation softwares. (25) 3) Real Implementation and Validation: This step includes where fLIN E is the line frequency. The total dissipated power the C-code implementation of control procedures on a Texas is: Instruments T M S320F 28335 MCU fitted on the TI Dual MoPT OT = 2PF ET + 2PDIODE ≈ 12W (26) tor Control and PFC Developer’s Kit. The command signals for boost and inverter have been generated using the PWM that plently meets efficiency requirements. Finally, the following are the most significant parameters: unit of the MCU and have been applied to the transistors. The L1 = L2 = L = 56µH, C = 3000µF , Vd = 0.8V , Rd = MCU has a 32-bit core and operates up to 150M Hz frequency. AC source has been provided by a 50W AC adapter with a 0.58Ω, RDSon = 26.5mΩ. The Motor Drive Module included in PSIM provides the peak value of 13V . The control algorithms have been designed necessary elements for motor drive system studies. Different and tested in the simulation environment to avoid possible machine models and mechanical load models are available. In errors and tune properly the controllers, facing up the system this work the PMSM with sinusoidal back EMF element has RHP zero negative effect. The MCU has been programmed been used; indeed it can be easily replaced with a DC machine with the suitably tuned controllers. Finally, the accuracy of the element or a 3-phase induction machine element. In Fig. 3(b) entire prototyping procedure has been verified by comparing the motor control block is displayed: an inverter, a voltage results in performed simulations with the experimental ones. sensor and the motor block are shown, as well as PSIM block The reliability of the system in terms of deviation between for PMSM simulation. The following are the most significant real and simulated results, both for variables trends and for parameters: Rs = 0.79Ω, Ld = Lq = 1.2mH, V pk/krpm = PFC indexes, has been illustrated in detail in the following 3.72, 8poles, J = 4.8µKg ∗ m2 and τm = 0.0794s; with J paragraphs.Measurements on the board have been made with an oscilloscope Tektronix TDS1001C-EDU with a bandwidth the moment of inertia and τm the shaft time constant. 2) Integration and Simulation: The various system parts of 40M Hz and a sampling frequency of 500M S/s. have been then linked to each other via their interface con- B. Experimental Results and Simulations n=1

nections. The simulation software provides the possibility of co-simulate circuit components and system level components allowing to work at different layers of abstraction: this is a key component in rapid prototyping system. Furthermore, some parts of the control algorithms have been written directly into C-code; this is particularly convenient and practical for the MCU implementation. Nonetheless, a special attention should be given to the choice of the simulation step: the software automatic setting does not always prove error-free; in this work a simulation step of 0.5µs has been chosen. The trends of the signals obtained from the simulation can then be easily visualized by Simview, the native interface of the simulation

The simulated and real results have been collected in several scenarios, to show the realiability of the approach in different control situations; graphical and numerical results, in terms of PF and THD, have been provided.The Control purpose of test scenarios is to drive a brushless motor at 750RPM with a rectified DC-bus at 24V without degrading AC power quality. The motor drive is equipped with a Discrete Time Variable Structure Control (DTVSC) scheme [28], well suited for low-cost DSP implementation. In particular, for the power stage four different configuration have been tested; both linear and passivity based control have been designed for the interleaved converter and the same algorithms have

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PID with PFC PF Simulated Results 99.59% Real Results 99.28% TABLE I

VP F C (V),IP F C (A)

Simulated PFC Variables − PID Controller VPFC

1

IPFC

0.8 0.6

THD 9.5% 11.34%

P ERFORMANCE COMPARISON BETWEEN SIMULATED AND REAL RESULTS PID CONTROLLER WITH PFC.

0.4 0.2 0 0

0.005

0.01

0.015

0.02

0.025

Time (ms) VPFC

1

Simulated PFC Variables − PBC Controller

IPFC

0.8 0.6 0.4 0.2 0 0

0.005

0.01

0.015

0.02

0.025

Time (ms)



Real PFC Variables − PID Controller

V

PFC

1

IPFC

0.8 0.6 0.4 0.2 0 0

0.005

0.01

0.015

0.02

0.025

Time (ms)

Simulated and Real DC−Bus − PID Controller

v(t) (V)

30 DC−Bus − Simulated DC−Bus − Real

20


Fig. 4. Ig and rectified Vg Trends With Input Voltage Feedforward. Comparison between Simulated and Real behavior using PID Controllers.

Real PFC Variables − PBC Controller VPFC

1

IPFC

0.8 0.6 0.4 0.2 0 0

0.005

0.01

0.015

0.02

0.025

Time (ms)

10

0 0

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

Time (ms)

Fig. 6. Ig and rectified Vg Trends With Input Voltage Feedforward. Comparison between Simulated and Real behavior using PBC.

Simulated and Real DC−Bus − PBC Controller

v(t) (V)

30 DC−Bus − Simulated DC−Bus − Real

20

10

0 0

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

Time (ms)

Fig. 5. DC-Bus trend with PID Controller.

been tested in a non-interleaved configuration which requires both hardware and digital control re-design.The results show the power and reliability of the rapid prototyping system: real results are well aligned with those simulated in all the four tests made. Therefore, it is really possible to focus only on the algorithms and control without bothering to what happens in the implementation stage. 1) Linear Control Results: Fig. 4 shows voltage and current line time evolutions in simulation and real test scenarios using a PFC scheme as in Fig. 1. PFC related indexes are calculated over Fig. 4 curves and collected in Table I; increase of PF and THD indexes has been attained in relation with results obtained without the PF correction stage, showing a quasiunity power factor (99.59% in simulation scenario and 99.28% in real tests) and a low current THD (9.5% in simulation scenario and 11.34% in real tests), respect to the 75.6% PF and the 71.23% THD values without any power factor correction. Output voltage regulation performance is shown in Fig. 5; 24V reference value is correctly tracked within 1s for both PID and PBC control scheme. Both line variables and output voltage performances for simulated and real scenario are comparable: this is the most important feature to evaluate de reliability of prototyping approach. In particular the obtained performances indexes in terms of PF and THD are comparable. 2) PBC Control Results: Voltage and current line trends in simulation and real test scenarios have been shown in Figure 6 using a PBC scheme. A quasi-unity PF (99.07% in simulation scenario and 98.98% in real tests) and a low

current THD (10.52% in simulation scenario and 11% in real tests) have been obtained with passivity-based current loop. Output voltage reference tracking hasn’t been shown because analogue to results obtained with PID controller. Also for this scenario the power performance indexes are very increased respect to the non-PFC controller and these indexes are comparable for simulation and real experiments. Both line variables and output voltage performances for simulated and real scenario are comparable; results are presented in Table II. Speed motor trends in the examined configurations are not significantly different; therefore the authors have decided to report a single trend in the case of passivity-based controller, in order to focus attention on the comparison the simulated track with the real one. Results have been shown in Fig.7: the reference value of 750RP M is reached within 1s. PBC with PFC PF Simulated Results 99.07% Real Results 98.98% TABLE II

THD 10.52% 11%

P ERFORMANCE COMPARISON BETWEEN SIMULATED AND REAL RESULTS PBC CONTROLLER WITH PFC.

Fig. 7. Simulated and Real PMSM Rotor Speed.


Interleaving Performances Interleaved PID Control - PF 99.59% PID Control - THD 9.5% PBC Control - PF 99.07% PBC Control - THD 10.52% TABLE III

Not Interleaved 97.78% 21.09% 97.47% 22.68%

P ERFORMANCE COMPARISON BETWEEN CLASSICAL AND INTERLEAVED BOOST CONFIGURATION .

3) Interleaving Technique: Interleaving technique performances have been compared in this section and experimental results have been collected in Table III. In order to evaluate improved performances of interleaving technique, a simulation scenario with a single inductance branch has been considered, reformulating inner current control loop for both PID and PBC schemes. Results have been compared to those obtained in previous scenarios, in particularly simulation results of Tables I and II: interleaved boost converter has been shown a notable improvement in both PF and THD line indexes and results are comparable between PID and PBC control, with an increase of approximatively 2% in power factor and a notable 10% decrease of distortion over line current. C. Comments The possibility of making a rapid prototyping of algorithms allowed to reduce time of control algorithms development and made simple and easy to perform several tests varying the design parameters of the algorithms. In particular the current control design with a linear technique and with passivity based solution have been presented and their performances investigated and compared in both simulated and real scenarios. Current and voltage trends in simulated tests are very similar to the ones made on the real system with the aid of rapid prototyping tool. Therefore, it is really possible to focus only on the algorithms and control without bothering to what happens in the implementation stage. The comparison has been easy to be done and parameters for the optimal functioning of the controllers have been quickly identified: many errors have been avoided and developers have been able to concentrate them only on the control algorithm performances. IV. C ONCLUSION In this paper a rapid prototyping scenario for PFC and Field Oriented Control for PMSM drives has been developed exploiting power electronics research opportunities provided by PSIM simulation software and high performance floating point DSP controller. Rapid prototyping method provides an early functional prototype of the control system and its functional behavior is estimated by a simulator. Simulation allows comprehensive and safe tests in the laboratory; digital simulation offers several appealing advantages over analog simulation with regard to the dynamic range of variables, flexibility and reproducibility of results for each scenario. R EFERENCES [1] W. Zhang, Y. Zhang, R. Wang, and X. Pan, “A model-based DSP control platform for rapid prototype of SVPWM,” in Signal Processing (ICSP), 2010 IEEE 10th International Conference on, 2010, pp. 2523–2526.

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