Control Strategies for Mutually Commutated Converter Systems without Cycloconverter Turn-off Capability Stephan Meier∗ , Staffan Norrga and Hans-Peter Nee School of Electrical Engineering, Royal Institute of Technology, Stockholm, Sweden ∗ Email: [email protected]
Telephone: +46 8 790 7779 Fax: +46 8 205 268
Abstract—Mutually commutated converter systems consisting of a voltage source converter and a cycloconverter connected by a medium-frequency transformer allow bidirectional AC/DC conversion as well as voltage transformation and isolation by the transformer. However, such converter systems require an extra power conversion stage compared to conventional converter systems, which may result in low system efficiency despite the soft-switching commutation scheme. In order to reduce the power losses in the cycloconverter, it is desirable to utilize fast thyristors instead of IGBTs. As a consequence, the cycloconverter valves lack turn-off capability because a thyristor can not be turned off by its gate. This paper describes and evaluates the most common control strategies in order to control a thyristor-based cycloconverter in a mutually commutated converter system. The behaviour of the cycloconverter depends strongly on the chosen control strategy when one of the output currents approaches zero, which may inherently affect the harmonic properties of the output voltages and currents. Experimental results from a 20 kVA prototype show that it is possible to successfully operate a mutually commutated converter system without turn-off capability.
I. I NTRODUCTION Isolated AC/DC converter systems incorporating a voltage source converter (VSC) and a cycloconverter, connected by a medium-frequency (MF) transformer have been treated extensively in the literature –, . A wide range of applications has been envisaged, including uninterruptible power supply systems with integrated active filters , and interfaces for alternative power sources like fuel cells  or large scale wind farms . The basic functional principle of such a mutually commutated converter concept is that the VSC converts the DC voltage to an MF square-wave voltage that magnetizes the transformer. This voltage is then converted to a desired threephase voltage by the cycloconverter. This two-step power conversion, however, may result in a lower system efficiency compared to conventional converter systems, even though all semiconductor devices can be soft-switched by alternately commutating the VSC and the cycloconverter. By replacing the IGBTs in the cycloconverter with fast thyristors, as shown in Fig. 1, it is possible to reduce the power losses and the investment cost of the cycloconverter. However, the absence of turn-off capability of the thyristors demands for improved control strategies of the cycloconverter. Additionally, as will be explained in the next section, a thyristor must be reverse biased for a certain duration before a positive voltage can be reapplied without unintentional self-triggering of the thyristor. This condition appears to be an even greater limitation for the operation of
Medium-frequency 2-phase by 3-phase transformer cycloconverter
Ud/2 itr utr
Filter inductance AC side
Topology of the studied mutually commutated converter system.
the cycloconverter than the absence of turn-off capability. This paper, therefore, aims at describing and comparing different ways to handle these special requirements, and to show, by means of experiments, that the cycloconverter is capable of performing the commutations that are required for a proper operation of the cycloconverter. II. C YCLOCONVERTER
By alternately commutating the VSC and the cycloconverter, it is almost always possible to naturally commutate the cycloconverter phase legs , i.e. generally, the cycloconverter valves do not need any turn-off capability. The only exception is in case that one of the output currents changes sign prior to the corresponding phase leg commutation. Therefore, this section focuses on different control strategies during the zero crossing of the output currents. Whether or not the cycloconverter has any turn-off capability does not influence the basic choice of modulation strategy. Throughout this paper, a previously derived space vector modulation (SVM) method  is used in order to determine the base vector sequence and the commutation instants of the cycloconverter phase legs. The replacement of the IGBTs with thyristors in the cycloconverter valves implies more than just the absence of turnoff capability, which becomes obvious from a look at the switching characteristics of thyristors. A. Switching characteristics of thyristors Thyristors are minority-carrier devices and have the highest blocking voltage capabilities and the largest current conduction capabilities of any of the solid state power devices . They act as a latching switch, i.e. once turned on
iac > 0
? iac = 0
iac = 0
iac < 0
1P iac = 0
? iac = 0
Fig. 2. Typical current and voltage waveforms during thyristor turn-on and turn-off . Fig. 3. Finite state machine for commutation control of one cycloconverter phase leg.
by a gate current pulse, they continue to conduct and cannot be turned off by the gate. 1) Fast thyristors: Thyristors are inherently slow switching devices because of the nature of bipolar conduction and the amount of stored charge. This causes a large reverse recovery current Irr during the turn-off, see Fig. 2. An RCsnubber across the cycloconverter valves limits the reverse overvoltage during thyristor turn-off. In order to shorten the switching times (with measures taken during the semiconductor design stages), it is possible to decrease the carrier lifetimes, with the drawback of increasing the on-state losses. This is done by improving the charge recombination ability of the silicon by diffusing heavy metal ions or by neutron irradiation in the silicon. Such fast thyristors have a considerably shorter turn-off time tq , which represents the minimum time before a thyristor can be exposed to a forward voltage without risk to be selftriggered by the remaining charge carriers that have not yet recombined. Therefore, the turn-off time tq is usually several excess-carrier lifetimes in length . 2) Thyristor turn-on: In order to avoid device damage or failure, the current derivative di/dt of the on-state current must be limited to a certain level. Otherwise, the current will concentrate on a relatively small area around the gate region as the plasma only spreads slowly in the silicon. In a soft-switching application, this is rarely a problem. The cycloconverter phase legs are naturally commutated and the current derivative di/dt during turn-on (as well as during turn-off) is limited by the transformer leakage inductance and thus relatively low. 3) Thyristor turn-off: The only way to turn off a thyristor is that the external circuit forces the current through the device to be less than the holding current for a minimum specified duration . In order to ensure a complete thyristor turn-off process and to prevent a subsequent accidental turnon, two measures should be taken. First, the turn-off time tq specified by the manufacturer of the thyristor should be respected as mentioned before. Second, the voltage derivative dv/dt of a reapplied forward voltage across the thyristor must be limited to a certain level. Otherwise, the device may be triggered back into the on-state by induced displacement currents . Again, it is easy to fulfill these demands in a soft-switching application. The snubber capacitors of the VSC determine the voltage derivative dv/dt, which is thus relatively low. In order to respect the thyristor turn-off time tq , no phase leg
commutations are allowed during the time period tq prior to a VSC commutation. This is a significant drawback as it considerably reduces the maximum possible modulation ratio. B. Cycloconverter phase leg commutation In a mutually commutated converter system like in Fig. 1, the VSC and the cycloconverter are consistently commutated in alternation. Thereby, the commutation of one of the converters establishes soft-switching conditions for the other converter, and vice versa. In order to be able to naturally commutate a cycloconverter phase leg, the sign of the phase voltage has to be opposite to the sign of the corresponding output current. The commutation control for an individual cycloconverter phase leg is implemented as a finite state machine (FSM) according to Fig. 3. It should be noticed that the two antiparallel thyristors in a cycloconverter valve are individually controlled as it is essential to know their switching state. Principally, the active state of the FSM is moving back and forth either on the top (states 1P and 2N) if the output current is positive or on the bottom (states 1N and 2P) otherwise. However, twice every fundamental period, the output current is changing sign and a transition between the upper and lower part of the FSM becomes necessary. The behaviour of the cycloconverter during the zero-current crossing depends strongly on the chosen control strategy, as indicated by the question marks in the zero-current transition states of Fig. 3. Considering the requirements for continuous soft-switching conditions, the cycloconverter phase leg commutation should either result in a reversal of the phase voltage or a reversal of the output current in order to enable a snubbered VSC commutation. For example, if the state 1P is active after a VSC commutation, the control must ensure a safe state transition to either state 1N or 2N. Principally, three different cases are feasible, assuming that the cycloconverter valves do not have any turn-off capability: 1) 1P - 1N: In this case, the output current changes sign prior to the pending phase leg commutation. After the zero-current crossing, the commutation is not possible anymore and thus completely omitted during this particular commutation period. 2) 1P - 2N: This case corresponds to a normal phase leg commutation, initialized by the control signal ACC.
3) 1P - 2N - 2P - 1N: At first, this corresponds to a normal phase leg commutation as in the previous case. However, after the successful phase leg commutation, the output current changes sign. In order to re-establish soft-switching conditions, an additional phase leg commutation becomes necessary. This is not a problem as the current-sign reversal sets up the conditions for a natural phase leg commutation. However, in this case, all four thyristors in one phase leg have been conducting during the same commutation period, which puts high requirements on appropriate timing with respect to the thyristor turn-off time tq in order to avoid accidental short-circuits. C. Reference case with cycloconverter turn-off capability Fig. 4 shows typical voltage and current waveforms during a commutation sequence for a cycloconverter equipped with IGBTs, refer to . Assuming that the FSM of the third cycloconverter phase leg is in the state 1P after the VSC commutation, the case occurs where the output current is changing sign before the corresponding phase leg commutation. However, with the turn-off capability of the IGBTs, a forced commutation is still possible at any desired time instant after the zero-current crossing. A power reversal check at the end of the commutation cycle determines whether an additional commutation becomes necessary in order to re-establish soft-switching conditions. This is the case for the example in Fig. 4, which results in the final state sequence 1P - 1N - 2P - 1N. The time tprc for the additional phase leg commutation has to be allocated not only at the end of the commutation cycle but also at the beginning in order to eliminate its influence on the output voltage vector. This results in a maximum modulation ratio Mmax for the reference case given by: Mmax = 1 − 2fsw (∆tvsc + 3∆tacc + 2tprc ),
where fsw is the switching frequency of the VSC and ∆tvsc and ∆tacc are typical switching durations of the VSC and cycloconverter phase legs respectively. Without a complex, cost- and loss-intensive commutation circuit, a forced turn-off of a thyristor is not possible. Therefore, other solutions that do not rely on the turn-off capability of the cycloconverter valves have to be considered. D. Dead-time control strategy The so-called dead-time control strategy is the most common solution found in literature , . With this strategy, the gate pulses to the thyristors are simply stopped during a certain dead time td if the output current is lower than a given threshold value ith . Fig. 5 shows how the current iac3 is clamped to zero during the constant dead time. As a result, the dead-time control strategy causes harmonic distortion when the desired pulse pattern cannot be obtained during and after the dead time. Even worse, the dead time may delay a phase leg commutation in such a way that the subsequent VSC commutation will expose the just turnedoff thyristor to a forward voltage before the thyristor turnoff time tq has elapsed. This implies that the maximum modulation ratio Mmax is decreased drastically when using the dead-time control strategy, refer to Table I: Mmax = 1 − 2fsw (∆tvsc + 3∆tacc + 2tq + 2td ).
∆tvsc tprc ∆tacc1 utr
Maximum modulation duration [p.u.]: δmax=1-(∆tvsc+∆tacc1+∆tacc2+∆tacc3+2tprc)/tcyc
uac1 tacc1 tacc2
Forced commutation tcyc Fig. 4. Typical voltage and current waveforms during a commutation sequence with cycloconverter turn-off capability.
∆tvsc tq ∆tacc1 utr
Maximum modulation duration [p.u.]: δmax=1-(∆tvsc+∆tacc1+∆tacc2+∆tacc3+2tq+2td)/tcyc
uac1 tacc1 tacc2
Wrong pulse pattern
Constant dead time tcyc Fig. 5. Typical voltage and current waveforms during a commutation sequence with dead-time control strategy.
E. Circulating-current control strategy This solution makes use of a circulating current inside the cycloconverter when the output current is close to zero . The basic idea with this solution is that the current through the cycloconverter valves is always well defined, which facilitates the phase leg control. According to Iturriz et al. , the harmonic distortion caused by the dead-time TABLE I M AXIMUM POSSIBLE MODULATION RATIO Mmax Modulation method Theoretical maximum with turn-off capability (1) with dead-time control strategy (2) with current-clamping control strategy (3) 1)
PWM 1.00 0.92 1) 0.63 1) 0.79 1)
SVM √ 1.15 (= 2/ 3) 1) 1.06 0.73 1) 0.91 1)
Assumptions: ∆tvsc = 20 µs, ∆tacc = 10 µs, tprc = 1.5∆tacc = 15 µs, tq = 80 µs, td = tq = 80 µs, fsw = 500 Hz.
∆tvsc tq ∆tacc1 utr
Maximum modulation duration [p.u.]: δmax=1-(∆tvsc+∆tacc1+∆tacc2+∆tacc3+2tq)/tcyc
VSC with snubber capacitors
Controlled current-clamping release iac3
tcyc Fig. 6. Typical voltage and current waveforms during a commutation sequence with current-clamping control strategy.
control strategy is reduced, as the output current always has a possible current path. However, in order to introduce a circulating current inside the cycloconverter, it is necessary to short-circuit the phase leg where the current is close to zero, which generally is avoided under any circumstances. In order to reduce the amplitude of the circulating current, additional circuitry in the form of two supplementary inductors per phase leg is required . This control strategy has not been further considered in this paper. F. Current-clamping control strategy This solution is based on only stopping the gate pulses in the cycloconverter phase leg where the current is close to zero during a controlled time period . Thereby, the desired voltage vector can still be provided for any modulation interval by controlling the instant of the current clamping release. The other phase leg commutations are not affected by the current-clamping control strategy and no thyristor turn-off is delayed, see Fig. 6. This is the reason why the current-clamping control strategy, unlike the dead-time control strategy, does not involve any risk for accidental thyristor turn-on. The maximum modulation ratio is: Mmax = 1 − 2fsw (∆tvsc + 3∆tacc + 2tq ),
which is a substantial improvement compared to the deadtime control strategy, refer to Table I. The current-clamping control strategy is especially valuable for low power operation, where the current ripple is comparably large . In this case, the current-clamping control strategy may prevent the current vector from repeatedly moving back and forth between two current sectors, which is highly undesirable. A detailed description about the practical implementation of the current-clamping control strategy can be found in Section III-B2. III. E XPERIMENTAL
SETUP AND CONTROL STRATEGY
In order to experimentally verify the practical feasibility of a mutually commutated converter system without cyclo-
Photograph of the 20 kVA prototype converter system. TABLE II P ROTOTYPE PARAMETERS
Rated power DC link voltage Ud DC link capacitance VSC snubber capacitance, per valve Transformer operating frequency Transformer turns ratio Transformer leakage inductance Cycloconverter RC-snubbers AC side filter inductors
20 kVA 600 V 2.9 mF 0.22 µF 500 Hz 2:3 179 µH 0.1 µF / 25 Ω 24.4 mH
converter turn-off capability, a 20 kVA prototype converter system has been designed and manufactured, see Fig. 7. A. Prototype The VSC valves are implemented with standard IGBT modules, with a blocking voltage of 1200 V, designed for use in hard-switching converters . The cycloconverter, which is rated at 20 kVA, is equipped with Semikron SKKT 20/16E dual thyristor modules that are rated for 1600 V repetitive peak reverse voltage and 40 A on-state current. Their specified turn-off time tq is 80 µs. Every cycloconverter valve (consisting of two anti-parallel thyristors) is equipped with an RC-snubber circuit in order to limit the overvoltage during the thyristor turn-off (see Fig. 1). The basic design principle for the snubber circuit is that the capacitor should be chosen with regard to the energy loss in the snubber circuit, while the resistor determines the expected overvoltage. The MF transformer design is based on a conventional 50 Hz sine-wave transformer, but with oriented steel sheets for reduced no-load losses. The flux density and the number of winding turns have been adjusted in order to account for the increased operating frequency and the square-wave voltage that the transformer is exposed to. All relevant prototype parameters can be found in Table II.
JTAG (for programming)
IV. R ESULTS
FB_ ER_ Gate Drive C_ Units
ADC Fig. 8.
Control hardware overview.
B. Control system The control system is based on a 32-bit floating-point DSP (Analog Devices 21065L), supported by an FPGA (Xilinx Virtex XCV200) for timing and control of the commutation processes. Fig. 8 shows an overview of the control hardware. As the commutations of the VSC and the cycloconverter need to be precisely coordinated, it is desirable to be able to rapidly detect the switching state of the main circuit valves. Therefore, information about the voltage across each main valve is fed back to the FPGA (digital signals ’FB ’). In addition, A/D converters (ADC) allow sampling of the three output currents, as well as the DC voltage. 1) Implementation of dead-time control strategy: The dead-time control strategy is straight-forward and can be implemented by a counter that is activated whenever one of the output currents drops below a certain threshold value. While this counter is active, all thyristor gate pulses in the three cycloconverter phase legs are blocked. 2) Implementation of current-clamping control strategy: With the proposed current-clamping control strategy, control is regained over the phase leg in which the current is changing sign by actively controlling when to release the current clamping. However, such a control strategy is difficult to implement as it requires an accurate prediction of the current trajectory and the voltage vectors during the current clamping. The modified switching instants for the cycloconverter phase leg commutations have to be determined prior to the start of the modulation interval with the aid of a load model embedded in the DSP, see Fig 9. At the very beginning of a commutation cycle, the following information is available: The current vector i(x) , the phase leg commutation instants tacc1 , tacc2 , tacc3(x) , and the voltage reference vector for the next commutation cycle uref (x+1) . With the help of a load model, the current trajectory can be predicted for the ongoing commutation cycle and thus the current sector k(x+1) at the beginning of the next commutation cycle. This is a prerequisite in order to calculate the preliminary phase leg commutation instants t0acc1 , t0acc2 , t0acc3(x+1) with the standard SVM method . With the load model, the current vector trajectory during the next commutation cycle can be determined for the calculated preliminary base vector sequence. In this way, it can be predicted in advance at what exact instant the current vector leaves the initial sector. In case of an imminent change of current sector, there is enough time to alter the base vector sequence according to the current-clamping control strategy, either to prevent a temporary current transition caused by current ripple or to enhance a permanent current transition. In such a way, the definitive phase leg commutation instants tacc1 , tacc2 , tacc3(x+1) are calculated.
This section presents and discusses preliminary results from the prototype converter system. All measurements have been performed at 20 % of rated load, i.e. at an output power of approximately 4 kVA. A very rudimentary control strategy has been used, where either a current-sign reversal or a normal phase leg commutation was allowed during each commutation cycle. Neither dead-time nor current-clamping control were implemented. Therefore, occasional commutation failures were encountered. However, the measurements are a natural first step towards the implementation of more advanced control strategies. They show the feasibility of thyristor-based cycloconverters as well as the problems associated with the absence of turn-off capability and the tq requirements of the thyristor valves. Fig. 10 shows the measured line-to-line output voltages. The relatively high voltage ripple is mainly due to the low switching frequency, but also due to the fact that the desired reference voltage vector cannot always be provided, as shown later on. Fig. 11 shows the measured transformer voltage and current. The switching frequency of the VSC determines the square-wave voltage applied to the MF transformer. The waveform of the transformer current shows how the SVM method inherently maximizes the zero voltage vectors. During the zero voltage vectors, all three cycloconverter output terminals are connected to the same transformer terminal, with the consequence that no transformer current itr can flow (highlighted grey in Fig. 11). Fig. 12 shows the three output currents. A closer observation of the zero crossings of the currents reveals that they often are not very smooth. The zero crossings highlighted in grey seem to first swing back and forth, before eventually changing sign for good. This observation is verified when looking at the cycloconverter output voltages in Fig. 13. Whenever an output current changes sign during a commutation cycle, the corresponding phase leg cannot be commutated at all (highlighted in grey). For both the first and the second phase leg, the current is changing sign in three consecutive commutation cycles instead of just in one as in the third phase leg. This causes unnecessary distortion in the output voltage that could easily be avoided. A simple solution is to just allow one current-sign reversal per half a fundamental period. A. Conclusions from measurements The experimental results show that mutually commutated converter systems without cycloconverter turn-off capability can be operated even with a very rudimentary control strategy. Introducing a dead time during the zero-current crossing would definitively eliminate the risk for accidental short-circuits by ensuring the proper turn-off of the thyristor valves (refer to Section II-D). On the other hand, the dead time would considerably restrict the maximum possible modulation ratio and might cause further harmonic distortion, because the desired pulse pattern for the cycloconverter phase legs can not always be provided during the dead-time period. V. C ONCLUSION This paper shows that it is feasible to replace the IGBTs with fast thyristors in the cycloconverter of a mutually
x+1 uref (x+1) SVM
Maximum modulation duration [p.u.]: δmax=1-(∆tvsc+∆tacc1+∆tacc2+∆tacc3+2*tq)/tcyc
t’acc1, t’acc2, t’acc3 (x+1)
tacc1, tacc2, tacc3 (x) Load model
t tacc1, tacc2, tacc3 (x+1) acc1 tacc3
DSP calculating tADC ≈ 0.3 µs
tq = 80 µs
New data to FPGA
tsmpdel = ∆tvsc + 0.5*tq
∆tvsc < 20 µs tcyc
tcyc = 1 ms = 66’000 FPGA clk cycles Fig. 9.
Time diagram over two consecutive commutation cycles enabling current-clamping control strategy.
-100 -200 -300 0 Fig. 10.
10 t [ms] 15
Measured line-to-line voltages ull at 20 % of rated load.
25 20 15 10 5 0 -5 -10 -15 -20 -25
10 t [ms] 15
Measured output currents iac at 20 % of rated load.
600 utr [V] 600 0 -600
40 20 0 -20 -40
450 0 -450 uac2 [V]
5 6 t [ms]
Fig. 11. Measured transformer voltage utr and current itr at 20 % of rated load.
commutated three-phase converter system. However, an appropriate control strategy must ensure proper turn-off of the thyristors in order to avoid accidental short-circuits. This is particularly important whenever one of the output currents changes sign, which means that both anti-parallel thyristors in a valve have been turned on during the same commutation cycle. Both the dead-time and the current-clamping control strategy have in common that they delay the zero-current transition. With the dead-time control strategy, the current is clamped to zero for a constant duration, which increases harmonic distortion and reduces the maximum possible modulation
450 0 -450 uac3 [V] 450 0 -450 0
5 t [ms]
Fig. 13. Measured transformer voltage utr (top) and cycloconverter output voltages uac (bottom) at 20 % of rated load.
ratio. The current-clamping control strategy, on the other hand, controls the clamping time, which can never exceed the remaining duration of the actual commutation cycle, in order to be able to provide the desired voltage vector during every single commutation interval. The experimental setup presented in this paper is a natural step towards implementing the current-clamping control strategy. The measurements
show that only a software refinement remains to be done. An obvious future activity is therefore the implementation of the current-clamping control strategy according to Fig. 9. The main challenges are the requirements of accurate current measurements and the implementation of the load model, in order to be able to precisely predict the current vector trajectory two commutation cycles in advance. ACKNOWLEDGMENT The authors would like to express their gratitude to VindForsk and the Swedish Energy Agency for financial support. Many thanks to Mr. Christer Eriksson of AQ Trafo AB, Enk¨oping, Sweden, for invaluable help with the design and manufacture of the MF transformer.
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