DC Converter Providing

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the source consists of a series connection of several low voltage sources, in this ... simply regarded as a voltage source with an inner resistance. Thus, the input ...
Design of a Lightweight DC/DC Converter Providing Fault Tolerance by Series Connection of Low Voltage Sources Alexander Kaiser, Jörg Wangemann, Dirk Schawe

Wolfgang Höger

EADS Innovation Works TCC6, Energy and Propulsion 81663, Munich, Germany {alexander.kaiser,joerg.wangemann,dirk.schawe}@eads.net

University of Applied Sciences Munich Electrical Engineering and Information Technology 80335, Munich, Germany [email protected]

Future More Electric Aircraft equipped with bipolar High Voltage DC (HVDC) grids require lightweight high power DC/DC converters. One possible technology is the Cascaded Buck Boost Converter (CBBC). The CBBC is featuring a high power density and provides the possibility to buck or to boost the source voltage. The CBBC can be operated with various types of sources or storage devices such as batteries, fuel cells or ultracaps. To achieve maximum system power density, the DC/DC converter and the source must be optimized as entire system. The highest output power will be obtained when the source voltage is close to the grid voltage, i.e. for low voltage sources a series connection is appropriate to get an adequate CBBC input voltage. In case of deactivation or failure of a single source device the system shall remain operational with reduced performance. Regarding the interface to the HVDC grid, the CBBC is capable to operate in single mode supplying the grid alone, or in parallel mode supplying the grid together with any other power sources like e.g. a generator. Furthermore the CBBC can handle most commonly known normal and abnormal operating conditions in a HVDC grid such as common mode ripple or unbalanced loads. Simulation results of all relevant system operating modes are shown. Finally, a first prototype of the CBBC is presented. Boost; Buck; Bipolar; HVDC; DC/DC Converter; Common Mode; Power Electronic

I.

INTRODUCTION

The technical progress in the field of power electronics enables High Voltage DC power distribution systems to provide opportunities for many applications including aircraft industry. On the one hand, lots of electrical loads use DC power or have an internal DC link which is e.g. the case in electric drives and would therefore not require rectifier input stages anymore. On the other hand, the relevance of sources providing DC power, such as batteries or fuel cells, rises due to the progress in the automotive industry in the recent years. The benefits of HVDC power distribution are higher efficiency, reduced complexity and –which is key argument for aerospace– weight savings. A HVDC grid already became a standard in military aircraft [3] and was introduced for the first time in passenger aircraft within the Dreamliner [2]. However, the integration of a HVDC large scale system is still a field of

research [4] and is taken as baseline of this work. It is a +/-270VDC grid featuring low impedance to ground. There are several approaches to supply such a grid either by AC generators or DC sources e.g. fuel cells or batteries. In order to connect these different kinds of sources to the same grid DC/DC converters are required. One of the topologies that provide the highest power density is the buck converter [1]. Hence the source voltage must be higher than the grid voltage. Since, most DC sources have a low output voltage, a series connection is necessary to get the required supply voltage for buck operation. A fault of a single source does not necessarily result in a loss of the system. If the sum of the source voltages drops below the grid voltage, the converter will continue operation in boost mode. The application of the Cascaded Buck Boost Converter combines the high power density of the buck converter with safety aspects regarding the failure of a single source device connected in series. II.

OPERATION

Figure 1 shows the principal architecture of the power system. The DC/DC converter provides a bipolar grid interface and is supplied by a unipolar source. In the target application, the source consists of a series connection of several low voltage sources, in this case e.g. two fuel cell stacks [11]. Source SP

SN

Buck-Boost Converter ii

USP

=

US ui USN

Grid io,p uo,p uo,s

=

uo,n io,n

Figure 1 Topology of the power conversion system

In normal mode, all sources are active and the converter is working in buck mode, providing the full rated performance. If one source fails the source is bypassed through a diode and the

source voltage drops below the grid voltage requiring the CBBC to switch to boost mode as illustrated in Figure 2. Source SP

USP

SN

USN

Buck mode ii

Source SP

US ui

=

SN

Boost mode ii US ui

USN

=

the upper switch of the output side is closed by commanding ko = 1, while the input side is operated with the appropriate value of ki = 0…1. Accordingly, the upper switch of the input is permanently closed in boost mode. So, this topology behaves like a buck converter or a boost converter in the respective mode. An averaging model [12] is appropriate to explain the dynamic behavior and for the controller synthesis. Where uL is the voltage across the inductor and the current flowing to the input and the output side capacitor i Ci and i Co .

u L = k i ⋅ u i − k o ⋅ u o , k i , k o = 0..1

Figure 2 Full (buck) and reduced (boost) power mode

Figure 3 shows the power transfer capability of the CBBC to supply a grid of 540V depending on the input voltage. Best performance is reached when the input voltage is close to the output voltage. The PWM frequency can be reduced or even stopped which results in reduced switching losses.

uL = L ⋅

(1)

d iL dt

(2)

i Co = k o ⋅ i L − i o

(3)

i Ci = − k i ⋅ i L + i i

(4)

i Cx = C x ⋅

d u x , x = i, o dt

(5)

The device, connected to the input side of the CBBC is simply regarded as a voltage source with an inner resistance. Thus, the input current results in:

ii =

Figure 3 Power conversion capability of the CBBC and the sources

A common rating of the source and the converter is achieved by plotting the output characteristics of source in the same diagram. In the target application, this is the polarization curve of two stacks in series in full power mode and one stack in reduced power mode. III.

TOPOLOGY

L

US ui Ci

ki

ko

Since the basic topology of the CBBC is a unipolar converter, the bipolar HVDC grid cannot be interfaced in order to handle unbalanced loads at the grid. There are several approaches to overcome this limitation. The most straightforward approach is to mirror the schematic at the ground plane resulting in a positive and a negative side as illustrated in Figure 5. Source SP

Co

USP

USN

UGrid uo

Figure 4 CBBC with unipolar source and grid

They are operated using PWM with the duty cycles ki and ko either in constant or variable frequency mode. In buck mode,

ii,p

CBBC

ui,p

ui,n ii,n

= =

io,p

Grid

= uo,p uo,s

= uo,n io,n

Figure 5 CBBC with bipolar source and grid

Source

io

Shared Inductor

(6)

SN

The CBBC is often described in literature [5-9]. Figure 4 shows its principal topology. It consists of two half bridges, one on the input and one on the output side sharing the same inductor. ii

US RS

SP

SN

USP

USN

ii

CBBC

ui,p US ui,s ui,n

= =

io,p

Grid

= uo,p uo,s

= uo,n io,n

Figure 6 CBBC with unipolar source and bipolar grid

Both sides are completely separated by the ground plane and can be controlled independently from each other. To double all components results in the need for two independent sources always being in operation. In terms of reliability, the power system cannot benefit from the double installation of the sources. A fault in one source would results in loss of function. This limitation is resolved by removing the ground wire from the CBBC to the source as shown in Figure 6. Obviously, this configuration cannot be balanced by drawing different currents from the input. But since the source is not physically connected to ground, it is possible to control the input voltages ui,p and ui,n to different levels. Respectively, fully asymmetric operation is possible. Either the positive or the negative side can supply loads while the current to the other side is 0. Clearly, the direction of the power flow is always equal on both sides, since the input voltages ui,p and ui,n cannot reverse. Alternatively, the input difference voltage can be balanced. This method separates the source from common mode voltage disturbances that may occur on the grid as it would be the case with a DC/DC converter comprising galvanic insulation. The source is “virtually” grounded at US / 2. Figure 7 shows the topology of the proposed CBBC for supplying a bipolar HVDC grid. Sensors are installed to acquire the input voltages ui,p and ui,n, the output voltages uo,p and uo,n, and the inductor currents iL,p and iL,n. The PWM duty cycles are ki,p and ki,n for the input side and ko,p and ko,n for the output side half bridges. Furthermore, the capacitors Ci,pn and Co,pn are introduced to enable an independent design of the differential and common mode dynamic and EMC characteristics of the CBBC. ii

iL,p Ci,p

ui,s

Ci,pn Ci,n

Lp

ui,p ki,p

ko,p

ki,n

ko,n uo,n

ui,n

iL,n

Co,p uo,s Co,n

Ln

Co,pn io,n

Figure 7 Schematic of the CBBC with unipolar input and bipolar output

Extending the unipolar model (1-5) to the bipolar CBBC in Figure 7 is not straightforward. The connection of the three input and output capacitors comprising two independent states, which are the sum and the difference voltage. Thus, it is appropriate to describe the model by sum and difference states by applying the following transformation:

1   u x ,s  u x,p  1  u  = Tu ⋅  u  , x = i, o, L , Tu =   0.5 − 0.5  x,d   x,n 

(7)

 i x ,s  i x , p  0.5 0.5 i  = Ti ⋅ i  , x = L, C i , C o , Ti =    1 − 1  x,d   x,n 

(8)

(9)

Accordingly, the real component parameters of the capacitors and inductors have to be transformed to the sum and difference frame:

C x ,s = C x ,pn + 0.5 ⋅ C x ,p

(10)

C x , d = 2 ⋅ C x , p , C x , p = C x , n , x = i, o

(11)

L s = 2 ⋅ L p , L d = 0.5 ⋅ L p , L p = L n

(12)

The model of the bipolar CBBC, expressed by sum and difference states, can be derived as:

u L ,s = (k i ,s u i ,s − k o,s u o,s ) + 2 ⋅ (k i ,d u i ,d − k o,d u o,d )

(13)

u L ,d = 0.5 ⋅ (k i ,d u i ,s − k o,d u o,s ) + (k i ,s u i ,d − k o,s u o,d )

(14)

i Co ,s = k o,s i L ,s + 0.5 ⋅ k o,d i L ,d − i o,s

(15)

i Co ,d = k o,d i L,s + 0.5 ⋅ k o,s i L,d − i o,d

(16)

i Ci ,s = −k i ,s i L ,s − 0.5 ⋅ k i ,d i L ,d + i i

(17)

i Ci ,d = −k i ,d i L ,s − 0.5 ⋅ k i ,s i L ,d

(18)

This constitutes a multi input multi output (MIMO) system comprising cross couplings, which appear in all unbalanced states. Furthermore, the difference frame part is an unstable plant. IV.

io,p uo,p

 k x ,s  k x, p  1 1   k  = Tk ⋅  k  , x = i, o , Ti =   1 − 1  x,d   x,n 

CONTROL

The controller features being operated either in voltage or current controlled mode by commanding ur,s or ir,s. The voltage controlled mode is applied if the CBBC is the only source controlling the grid voltage or another source is connected by a high impedance feeder. In current mode, the controller receives the reference values from another superordinated instance or from another CBBC module operating in voltage mode. A. Algorithm The previously derived model is used for the synthesis of the control algorithm. Since the sensors in a real world CBBC acquiring positive and negative states, they are transformed to sum and difference states using the matrices Tu and Ti as illustrated in Figure 8. The duty cycles, computed by the controller, are then retransformed using the inverted matrix of Tk and applied to the plant. Regarding the sum and the difference states separately, both parts are featuring different characteristics in terms of structure and dynamics. Therefore, the control loops of each part are designed separately. Finally, the cross couplings are treated by a decoupling network and the duty cycles are calculated. Figure 9 shows the structure of the control algorithm.

Mode

ur,s or ir,s uo,p s,d uo,n p,n ui,p s,d ui,n p,n iL,p s,d iL,n p,n

uo,s uo,d ui,s ui,d iL,s iL,d

s,d-frame voltage and current controller

ki,s ki,d

p,n s,d

ko,s ko,d

p,n s,d

ki,p ki,n ko,p ko,n

Figure 8 Transformation of the sensed values p,n to s,d frame and back

The sum and the difference voltage control loops are both cascaded with inner current control loops. However, their internal implementation is different. Cascaded controllers are well known in the field of speed controlled drives, comprising inner current control loops. They are applicable to the CBBC as well [9], since their models have a similar mathematical structure. A major advantage is that current and voltage limitations can be implemented straightforward within the control algorithm. Mode

ur,s or ir,s uo,s

us

Voltage Controller

iL,r,s iL,s

iL,s

Current Controller

uL,r,s uo,s

Decoupling Network and uo,d PWM Value ui,d Calculator

ui,s Mode

uo,d ui,d uo,s ui,s

ud

Voltage Controller

iL,r,d iL,d

iL,s

Current Controller

uL,r,d

ki,s

Figure 10 Response to a differential mode step load

ki,d ko,s ko,d

Figure 9 Structure of the controller in the s,d frame

B. Differential mode To design the us and iL,s controller, the system is assumed to be in balanced state, enabling to treat the plant as unipolar CBBC. The implementation consists either of a PI current and a PI voltage controller treating the current limits by an anti wind up algorithm. In steady state, the integrator holds the value of the output voltage. Regarding the output voltage to be a disturbance to the plant from the perspective of the current loop, the integrator can be replaced by a disturbance feed forward to the plant using the sensed output and input voltage. Figure 10 shows the operation of the PI voltage and P current control loop in response to a step load, simulated using the ideally switching model. The controller levels out the system in less than 1ms. Naturally, the response is slower when operating in boost mode depending on the boost gain. Using the switching model enables the analysis of the voltage and current ripple that is induced by the PWM operation. Additionally, it is used to design and test the function of several PWM patterns and the interleaved operation of more than one CBBC module.

C. Common mode Since the common mode open loop is unstable in the case of unbalanced loads, the controller has to reliably stabilize the system. This can be achieved straightforward by controlling ui,d, applying sufficient loop gain. As introduced in chapter III, generally two modes of operation are applicable to common mode voltage control. Thus, commanding ur,i,d to be 0 implies balancing the source respectively separating the source from common mode disturbances at the grid. In that case the output difference voltage settles in steady state to:

u o, d = −

u o, s ⋅ i o, d 4 ⋅ i o, s

(19)

Optionally, steady accuracy can be achieved by implementing a proper integral gain. The plots at the left side of Figure 11 show the response to a common mode disturbance which is injected as current step io,d in this case. For a better illustration of the controller operation, the simulation was performed using the continuous model. The shape of the output current is due to the line impedance between the CBBC output and the load. If required, ur,i,d can be commanded to any appropriate value. Since ui,d and uo,d are coupled according to (13-18), controlling e.g. uo,d to 0 is feasible by overlaying an adequate control loop. In that case the input difference voltage settles in steady state to:

u i, d =

u i , s ⋅ i o, d 4 ⋅ i o, s

(20)

The plots at the right side of Figure 11 show the response of the CBBC to the same step disturbance io,d operating in such a control method. Apparently, the output voltage is controlled to keep balanced state while the input voltages settle to the respective unbalanced values (20). Respectively, controlling ui,d to 0, results in an unbalanced grid voltage (19).

D. Decoupling network The CBBC constitutes a MIMO system with couplings particularly in operation in unbalanced state. In the case of the proposed controller in Figure 9, the control performance is improved by an appropriate decoupling network. When using the P current controllers, this is also the suitable place to implement the disturbance feedforward to the plant of the MIMO system. The decoupling network is independent from the controller mode of operations described in section A and C of this chapter. E. PWM generation The decoupled inductor voltage sum and difference reference values uL,r,s and uL,r,d have to be distributed to the set values ki,s, ko,s and ki,d, ko,d, with respect to the limitation of k. In order to achieve the best efficiency, either ko,x or ki,x shall be 1, according to buck or boost operation. The straightforward implementation of this algorithm results in a discontinuous behavior at the transition from buck to boost mode. If necessary, a methodology enabling a smooth transition can be implemented [8]. However, it is not essential for the target application, because the CBBC is definitely operating in buck mode with two sources and in boost mode with one source active. Finally, the half bridges from the positive and negative stage are operated synchronously with the respective PWM duty cycle kx,p and kx,n in center aligned mode. Actually, only constant frequency operation is implemented but variable frequency is planned to further reduce the switching losses and improve the efficiency of the CBBC.

Figure 11 Response to a common mode step load (p,n frame)

F. Handling faults at the grid Of course, the CBBC has to provide an appropriate behavior at the event of a fault. For the bipolar HVDC grid, the relevant failure cases are: 1) Overload or short circuit at the terminals Self protection from being destroyed due to overload or short circuit at the grid is an essential function of every power converter. This is achieved straightforward by the limitation of the current reference values iL,r,d and iL,r,s, which may change, e.g. depending on the environmental temperature. Since, the function of the ud voltage controller is a matter of system stability, iL,r,d is considered in the us controller and is handled with priority.

Figure 12 Response to a common mode step load (s,d frame)

To illustrate the perspective of the control algorithm, Figure 12 shows the same test case with the transformed sum and difference states.

2) Load unbalance or short to ground Depending on the envisaged concept of protection systems at the HVDC grid, one of two different options is applicable. An unbalanced load of a certain magnitude indicates the presence of a fault at the grid or a load. This can be detected by monitoring the difference voltages and currents and stop supplying the grid to avoid the failure to propagate. Alternatively, the converter may keep on trying to recover the grid to nominal state by driving an unbalanced current. This behavior may be appropriate to trip an overcurrent protection in the grid. Figure 13 shows reaction of the CBBC to a short to ground at the grid at the negative line trying to recover nominal state.

behavior as well as for an optimized commutating cell. One single driver is driving all three IGBTs at the same time to avoid a glitch. An SPM has a short time current capability of 30A and a steady state capability of 25A.

Figure 13 Grid failure: short circuit to ground at the negative terminal

Obviously, the controller continues operating stable driving the maximum current through the inductor at the negative side. Of course, the grid voltage uo,s drops in that case. It will recover as soon as the fault is isolated. V.

PROTOTYPE IMPLEMENTATION AND RESULTS

The CBBC consists of several identical Single Power Modules (SPM) which are working in parallel. This modular concept provides the possibility to scale the converter to the needed amount of power. Figure 14 shows an example with four paralleled modules, but also two, three or more are possible. Figure 7 shows the electrical diagram of one single power stage. The main board and the common input and common output filters are standalone modules, shown in Figure 14. Every single module is working interleaved to the next one. To avoid a drift of the phase angle a synchronization signal is generated by the module with the lowest bus address. A big advantage of operating several modules interleaved is the reduction of the input and output ripple current. This allows the design of small filters. The module generating synchronization also provides the desired current value for the other modules by broadcasting it on CAN-Bus “B”. The main board has the functionality of a gateway. It gets the commands and values needed by the user and sends them via CAN-Bus “A” to the modules. The module status and the actual values are sent back to the main board, which communicates via Ethernet with a graphical user interface. A. Electrical characteristics of the power circuit The prototype of the converter is designed for a nominal input voltage up 800VDC. Regarding lightning events and other overvoltage generating events e.g. load shedding all power components in the converter are rated with 1000VDC and can withstand transients up to 1.2kV. For the power semiconductors 1.2kV IGBT combined with 1.2kV SiC freewheeling diodes have been chosen. To reach a maximum switching frequency of 100kHz three IGBTs and three diodes have been paralleled. The semiconductors are placed on an Aluminum-Nitrate (ALN) ceramic substrate for best thermal

Figure 14 Block diagram of the DC/DC converter system

B. Signal processing To provide a fast and accurate inductor current signal to the DSPs ADCs, current sensors with a bandwidth of 2MHz have been chosen. A specialty is the sampling of the inductor currents in the middle of the rising edges. This reduces the impact of the switching edges of the power switches. C. Circuit protection In case of overvoltage or overcurrent a trip function is implemented that switches all semiconductors to high impedance in less than 1µs. The IGBTs are able to withstand a short circuit for 10µs and they are able to cut off the short circuit current. To avoid saturation of the inductor in case of a glitch an iron based amorphous alloy core has been chosen.

Figure 15 Mechanical structure

D. Mechanical properties The shape of one SPM simplified as a cuboid has a length of 50mm, a width of 170mm and a height of 170mm. Figure 16 shows the lab prototype consisting of two modules. An

assembled module has a weight of 2kg. A weight of 10kg is estimated for a complete system, shown in Figure 15.

Voltage Ramp Change

Voltage [V]

180 160 140

Output Voltage

120 100

-40

-20

0

20

40

60

80

100

120

3

Current [A]

Output Current 2 1 0

-40

-20

0

20

40 60 time [ms]

80

100

120

Figure 19 Reference voltage ramp change with resistive load

Figure 16 Prototype of two modules

E. Preliminary Test Results Laboratory tests using a single power module configuration (SPM) are in progress. The electrical efficiency of the module was measured (Figure 17) to 94% to 96 % in a power range from 0.7 to 4kW. Similar efficiency results can obviously be expected for the complete CBBC. Module Efficiency

96.5

efficiency

96 95.5 95 94.5

The steady state and dynamic behavior of the control structure was tested by applying output reference voltage step changes (Figure 18) and ramp changes (Figure 19) at constant resistive load. The unit has not yet been tested deeply but the first results are encouraging with voltage control settling time at 2ms. Further tests are in preparation, especially the CBBC behavior under different load conditions has to be verified. VI.

The CBBC provides the possibility to connect various unipolar sources to the bipolar HVDC grid. It provides buck and boost capability with high power density and efficiency. The required characteristics to supply a bipolar HVDC grid have been shown by the simulation results. The modular concept enables scaling a system to the required power. First lab tests of the prototype show successfully basic functions. Future work has to demonstrate the full functionality in the lab. Further optimization potential has been identified and will be realized.

94 93.5

REFERENCES 0

1000

2000 Power [W]

3000

4000

Figure 17 SPM efficiency Voltage Step Change

Voltage [V]

180 160

Output Voltage

140 120 100 -1

0

1

2

3

4

5

6

Current [A]

8 7 6

Output Current

5 4 3 -1

CONCLUSION

0

1

2 3 time [ms]

4

5

6

Figure 18 Reference voltage step change with resistive load

[1] [2] [3] [4]

M. Rashid, “Power Electronics Handbook”, Elsevier, 2010 Boeing Aeromagazine QTR_04/07 MIL-STD-704F, 30 December 2008 A. Griffo, J. Wang, D. Howe, “Stability Analysis of Electric Power Systems for ‘More Electric’ Aircraft”, 3rd IC-SCCE, Athens, 2008. [5] Application note AN2389, “An MCU-based low cost non-inverting buck-boost converter for battery chargers”, STMicroelectronics, 2007. [6] E. Schaltz, P. O. Rasmussen, A. Khaligh, “Non-Inverting Buck-Boost Converter for Fuel Cell Applications”, IEEE, 2008. [7] R. Paul, D. Maksimovic, “Analysis of PWM Nonlinearity in NonInverting Buck-Boost Power Converters”, PESC, 2008. [8] Young-Joo Lee, A. Khaligh, A. Emadi, “A Compensation Technique for Smooth Transitions in Non-inverting Buck-Boost Converter”, Applied Power Electronics Conference and Exposition, 2009. [9] K.M. Tsang, W.L. Chan, “Cascade Controller for DC/DC Buck Convertor”, IEE Proc.-Electr. Power Appl., Vol. 152, No. 4, 2005 [10] US Patent 5,932,995, “Dual Buck Converter with Coupled Inductors” [11] H. Lüdders, H. Strummel, F. Thielecke, “Model-Based Development of Multifunctional Fuel Cell Systems for More-Electric-Aircraft” In review, CEAS Aeronautical Journal, 2012 [12] R. Middlebrook, S. Cuk, “A general unified approach to modeling switching-converter power stages,” in Proc. Rec. IEEE Power Electron. Spec. Conf., Jun. 1976, pp. 18–34