DC Converter with

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... operating voltage range synchronous monolithic buck-boost DC/DC converter with ... n Current Mode Control n 1.2MHz Ultralow Noise PWM ..... Note 5: Operating output voltage can be programmed as low as 1.0V nominal if the accurate ...

LTC3114-1 40V, 1A Synchronous Buck-Boost DC/DC Converter with Programmable Output Current FEATURES

DESCRIPTION

Regulates VOUT Above, Below or Equal to VIN n Single Inductor n Wide V Range: 2.2V to 40V IN n Wide V OUT Range: 2.7V to 40V n 1A Output Current in Buck Mode n 0.5A Output Current, V = 3.6V, V IN OUT = 5V n Programmable Average Output Current n Up to 96% Efficiency n Burst Mode® Operation, 30µA No-Load I Q n Current Mode Control n 1.2MHz Ultralow Noise PWM n Accurate RUN Pin Threshold n Thermally Enhanced, 16-lead 3mm × 5mm DFN and TSSOP Packages

The LTC®3114-1 is a versatile, wide operating voltage range synchronous monolithic buck-boost DC/DC converter with programmable average output current. The LTC3114-1’s proprietary buck-boost PWM control circuitry delivers low noise operation across the entire operating voltage range. Current mode control ensures exceptional line and load transient responses.

n

APPLICATIONS 24V/28V Industrial Power Supply 12V Lead-Acid to 12V Regulator n High Power LED Driver n 12V/24V Solar Panel Battery Charging Systems n Automotive Power Systems n n

Synchronous, internal MOSFET switches and pin selectable Burst Mode operation maintain high efficiency across the entire range of load current. Average output current is programmed with a standard resistor and provides the basis for wide input range, high efficiency charging systems or constant current, high efficiency LED drive. Regulator turn-on is programmable through the accurate RUN pin. Quiescent current is just 3µA in shutdown. Overtemperature protection, short-circuit protection and soft-start are integrated. The LTC3114-1 is offered in 16-lead 3mm × 5mm × 0.75mm DFN and 16 lead TSSOP (FE) packages. L, LT, LTC, LTM, Burst Mode, LTspice, µModule, Linear Technology and the Linear logo are registered trademarks and No RSENSE is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners.

TYPICAL APPLICATION Efficiency vs Input Voltage 6.8µH

VIN 2.7V TO 40V

33nF

10µF

20k

SW1 SW2 BST2 BST1 LTC3114-1 VIN PVOUT PVIN RUN PROG MODE GND

LDO PLDO FB VC PGND

68nF

4.7µF

4700pF

90

2M

499k

VOUT 5V 1A 30µF V > 5V IN

EFFICIENCY (%)

68nF

95

85

80

75 ILOAD = 300mA ILOAD = 600mA

27.4k 31141 TA01a

70

1

10 INPUT VOLTAGE (V)

40 31141 TA01b

31141fa

For more information www.linear.com/LTC3114-1

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LTC3114-1 ABSOLUTE MAXIMUM RATINGS

(Note 1)

VIN, PVIN, PVOUT......................................... –0.3V to 45V VBST1......................................VSW1 – 0.3V to VSW1 + 6V VBST2......................................VSW2 – 0.3V to VSW2 + 6V VRUN.............................................. –0.3V to (VIN + 0.3V) Voltage, All Other Pins.................................. –0.3V to 6V Operating Junction Temperature Range (Notes 2, 4) LTC3114E-1/LTC3114I-1...................... –40°C to 125°C LTC3114H-1........................................ –40°C to 150°C LTC3114MP-1...................................... –55°C to 150°C

Storage Temperature Range....................–65°C to 150°C Lead Temperature (Soldering, 10 Sec) FE Package........................................................ 300°C

PIN CONFIGURATION TOP VIEW

TOP VIEW

PGND

1

16 MODE

PGND

1

16 MODE

SW2

2

15 SW1

SW2

2

15 SW1

PVOUT

3

14 PVIN

PVOUT

3

14 PVIN

13 BST1

RUN

4

12 BST2

PROG

5

RUN

4

PROG

5

VC

6

11 PLDO

VC

6

11 PLDO

FB

7

10 VIN

FB

7

10 VIN

GND

8

9

GND

8

9

17 PGND

LDO

DHC PACKAGE 16-LEAD (5mm × 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 43°C/W (4-LAYER BOARD), θJC = 4°C/W EXPOSED PAD (PIN 17) IS PGND, MUST BE SOLDERED TO PCB FOR RATED THERMAL PERFORMANCE

17 PGND

13 BST1 12 BST2

LDO

FE PACKAGE 16-LEAD PLASTIC TSSOP TJMAX = 150°C, θJA = 38°C/W EXPOSED PAD (PIN 17) IS PGND, MUST BE SOLDERED TO PCB FOR RATED THERMAL PERFORMANCE

ORDER INFORMATION LEAD FREE FINISH

TAPE AND REEL

PART MARKING*

PACKAGE DESCRIPTION

TEMPERATURE RANGE

LTC3114EDHC-1#PBF

LTC3114EDHC-1#TRPBF

31141

16-Lead (5mm × 3mm) Plastic DFN

–40°C to 125°C

LTC3114IDHC-1#PBF

LTC3114IDHC-1#TRPBF

31141

16-Lead (5mm × 3mm) Plastic DFN

–40°C to 125°C

LTC3114HDHC-1#PBF

LTC3114HDHC-1#TRPBF

31141

16-Lead (5mm × 3mm) Plastic DFN

–40°C to 150°C

LTC3114MPDHC-1#PBF

LTC3114MPDHC-1#TRPBF 31141

16-Lead (5mm × 3mm) Plastic DFN

–55°C to 150°C

LTC3114EFE-1#PBF

LTC3114EFE-1#TRPBF

3114FE-1

16-Lead Plastic TSSOP

–40°C to 125°C

LTC3114IFE-1#PBF

LTC3114IFE-1#TRPBF

3114FE-1

16-Lead Plastic TSSOP

–40°C to 125°C

LTC3114HFE-1#PBF

LTC3114HFE-1#TRPBF

3114FE-1

16-Lead Plastic TSSOP

–40°C to 150°C

LTC3114MPFE-1#PBF

LTC3114MPFE-1#TRPBF

3114FE-1

16-Lead Plastic TSSOP

–55°C to 150°C

Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

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31141fa

For more information www.linear.com/LTC3114-1

LTC3114-1 ELECTRICAL CHARACTERISTICS

The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 24V, VOUT = 5V, unless otherwise noted. PARAMETER

CONDITIONS

VIN Operating Voltage

VLDO ≥ 2.7V

l

MIN 2.2

Output Operating Voltage

(Note 5)

l

2.7

Undervoltage Lockout Threshold on LDO

VLDO Rising

l

2.3

VIN Quiescent Current in Shutdown VIN Quiescent Current in Burst Mode Operation

FB = 1.4V, Non-Bootstrapped (Note 6)

Oscillator Frequency

l

1000

TYP

2.5

MAX

V

40

V

2.7

V

3

µA

50

µA

1200

Oscillator Frequency Variation

VIN = 12V to 36V

Feedback Voltage

Measured on FB

Feedback Voltage Line Regulation

VIN = 2.7V to 40V, Measured on FB

0.2

Error Amplifier Transconductance

VC Current = ±5µA

120

FB Pin Input Current

FB = 1V

1400

0.1 l

0.98

UNITS

40

1.0

1

kHz %/V

1.02

V % µS

50

nA

VC Source Current

VC = 0.6V

–12

µA

VC Sink Current

VC = 0.6V

12

µA

RUN Pin Threshold—Accurate

RUN Pin Rising

l

1.185

RUN Pin Hysteresis

1.29

140

Run Pin Threshold—Logic

l

PROG Current

Switch D Current = 1A Switch D Current = 500mA Switch D Current = 100mA (Note 3)

PROG Current Gain

Ratio of PROG Current to SWD Current

Inductor Current Limit

(Note 3)

Overload Current Limit

VOUT = 0V (Note 3)

IZERO Inductor Current Limit

(Note 3)

Maximum Duty Cycle

Percentage of Period SW2 is Low in Boost Mode Percentage of Period SW1 is High in Boost Mode

l l

Minimum Duty Cycle

Percentage of Period SW1 is High in Buck Mode

l

N-Channel Switch Resistance

Switch A (from PVIN to SW1) Switch B (from SW1 to PGND) Switch C (from SW2 to PGND) Switch D (from PVOUT to SW2)

l

0.3

0.7

1.1

V

38 18 2

40 20 4

42 22 6

µA µA µA

0.90

0.925

0.95

1.7

2.3

1.3

90 85

ILDO = 10mA

LDO Load Regulation

ILDO = 1mA to 10mA

LDO Line Regulation

ILDO = 1mA, VIN = 10V to 40V

LDO Current Limit

VLDO = 2.5V

4.2

Soft-Start Time SW1 and SW2 Forced Low Time H = PWM Mode, L = Burst Mode Operation

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.

l

0.5

A A

100

mA

95 88

% % % mΩ mΩ mΩ mΩ

0.1

10

4.4

4.6

0.8 40

V

2.6

0

N-Channel Switch Leakage LDO Output Voltage

µA/A

250 250 250 250 l

V mV

40

PROG Voltage Threshold

MODE Pin Logic Threshold

1.205

µA V %

0.2

%

65

mA

2

ms

100

ns

0.9

1.3

V

Note 2: The LTC3114-1 is tested under pulsed load conditions such that TJ ≈TA. The LTC3114E-1 is guaranteed to meet performance specifications from 0°C to 85°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3114I-1 specifications are guaranteed over the –40°C to 125°C 31141fa

For more information www.linear.com/LTC3114-1

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LTC3114-1 ELECTRICAL CHARACTERISTICS operating junction temperature range. The LTC3114H-1 specifications are guaranteed over the –40°C to 150°C operating junction temperature range. The LTC3114MP-1 specifications are guaranteed over the –55°C to 150°C operating junction temperature range. High junction temperatures degrade operating lifetime; operating lifetime is derated for junction temperatures greater than 125°C. The maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. The junction temperature (TJ in degrees Celsius) is calculated from the ambient temperature (TA in degrees Celsius) and the power dissipation (PD in Watts) according to the following formula: TJ = TA + (PD • θJA) where θJA is the thermal impedance of the package. Note 3: Current measurements are performed when the LTC3114-1 is not switching. The current limit values measured in operation will be

somewhat higher due to the propagation delay of the comparators. The LTC3114-1 is tested in a proprietary non-switching test mode. Note 4: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. The maximum rated junction temperature will be exceeded when this protection is active. Continuous operation above the specified absolute maximum operating junction temperature may impair device reliability or permanently damage the device. Note 5: Operating output voltage can be programmed as low as 1.0V nominal if the accurate programmable output current limit feature is not required. Note 6: Connecting LDO/PLDO to the regulated 5V output (bootstrapping), reduces quiescent current substantially. Typical no-load quiescent current for 12V VIN to 5V VOUT is 30µA, if boostrapped.

TYPICAL PERFORMANCE CHARACTERISTICS 95

90

90

85

85

80

80

70 65 60 55

40 0.001

0.01 0.1 LOAD CURRENT (A)

75 70 65 60 VIN = 5V VIN = 12V VIN = 24V VIN = 36V

50 45 40 0.001

1

0.01 0.1 LOAD CURRENT (A)

31141 G01

90 OUTPUT CURRENT (A)

EFFICIENCY (%)

75 70 65 60 0.0001

VIN = 5V VIN = 12V VIN = 24V VIN = 36V 0.001 0.01 0.1 LOAD CURRENT (A)

1 31141 G04

4

80

75

70

1

1

10 INPUT VOLTAGE (V)

1.35 1.25 1.15 1.05 0.95 0.85 0.75 0.65 0.55 0.45 0.35 0.25 0.15 0.05

40 31141 G03

Maximum Load Current vs VIN

160

No-Load Input Current vs VIN, Burst Mode Enabled

140 INPUT CURRENT (µA)

95

80

85

31141 G02

24V Output Efficiency vs Load

85

ILOAD = 200mA ILOAD = 400mA ILOAD = 600mA ILOAD = 1A

90

55

VIN = 3.6V VIN = 12V VIN = 24V VIN = 36V

45

95

EFFICIENCY (%)

75

50

12V Output Efficiency vs VIN

12V Output Efficiency vs Load

95

EFFICIENCY (%)

EFFICIENCY (%)

5V Output Efficiency vs Load

(TA = 25°C unless otherwise specified)

VOUT = 5V VOUT = 12V VOUT = 24V 1

10 INPUT VOLTAGE (V)

40 31141 G05

120 100 80 60 40 20

VOUT = 5V VOUT = 12V 1

10 INPUT VOLTAGE (V)

40 31141 G06

31141fa

For more information www.linear.com/LTC3114-1

LTC3114-1 TYPICAL PERFORMANCE CHARACTERISTICS (TA = 25°C unless otherwise specified) 170

Burst Mode Operation Threshold vs VIN

20

No-Load Input Current vs VIN, PWM Mode

760 720 680 640 600 560 520 480 440 400 360 320 280 240

160

INPUT CURRENT (mA)

120 110 100 90 80 70

10

LOAD INCREASING LOAD DECREASING

60 50

15

1

10 INPUT VOLTAGE (V)

5

40

VOUT = 5V VOUT = 12V 10 INPUT VOLTAGE (V)

1

31141 G07

1.00 0.75

VIN = 12V RPROG = 64.7k 10 OUTPUT VOLTAGE (V)

VIN = 12V

0.50 0.25 0 –0.25 –0.50

–1.25 –1.50

1

10 INPUT VOLTAGE (V)

40 31141 G13

0.1 0

–0.3 –0.4 0.1

VOUT = 5V VOUT = 12V 1

10 100 LOAD CURRENT (mA)

Combined LDO, PLDO Supply Current vs VIN

Combined LDO, PLDO Supply Current vs LDO 8.50

VOUT = 12V

7.75 7.50 7.25 7.00 6.75 6.50 6.25 6.00

1

10 INPUT VOLTAGE (V)

1000 31141 G12

COMBINED LDO, PLDO CURRENT (mA)

8.00 COMBINED LDO, PLDO CURRENT (mA)

CHANGE IN VOUT NORMALIZED TO VIN = 2.7V (%)

0.3

–0.1

0.2

31141 G11

Output Voltage Line Regulation

VOUT = 5V VOUT = 12V

40

–0.2

–1.00

31141 G10

0

10 INPUT VOLTAGE (V)

1

–0.1

–0.75

–2.00 –55 –35 –15 5 25 45 65 85 105 125 145 TEMPERATURE (°C)

20

0.1

R = 100k

Output Voltage Load Regulation

–1.75

0.2

R = 50k

31141 G09

PROG Regulation Voltage vs Temperature

Average Output Current vs VOUT

0

R = 25k

31141 G08

PROG REGULATION VOLTAGE NORMALIZED TO 1V (%)

AVERAGE OUTPUT CURRENT (mA)

440 420 400 380 360 340 320 300 280 260 240 220 200 180 160 140 120 100

40

CHANGE IN VOUT NORMALIZED TO 100µA (%)

LOAD CURRENT (mA)

140 130

OUTPUT CURRENT (mA)

150

Average Output Current vs VIN, RPROG

40 31141 G14

8.00

VOUT = 5V

7.50 7.00 6.50 6.00 5.50 5.00 4.50 4.00 3.50

2.7

4.1 3.4 4.8 LDO, PLDO VOLTAGE (V)

5.5 31141 G15

31141fa

For more information www.linear.com/LTC3114-1

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LTC3114-1 TYPICAL PERFORMANCE CHARACTERISTICS (TA = 25°C unless otherwise specified) LDO Dropout Voltage vs Temperature

LDO Voltage vs Temperature 4.490

80

LDO VOLTAGE (V)

4.460 4.450 4.440 4.430 VIN = 5V

4.420

OSCILLATOR FREQUENCY (MHz)

LDO DROPOUT VOLTAGE (mV)

VIN = 40V

4.470

1.160

ILDO = 5mA

70

60

50

40

4.410 4.400 –60

–30

0 30 60 90 TEMPERATURE (°C)

120

30 –60

150

–30

0 30 60 90 TEMPERATURE (°C)

120

31141 G16

8

VIN = 24V

RUN PIN CURRENT (µA)

RUN PIN THRESHOLD (V)

1.226 1.224 1.222 1.220 1.218

VIN = 12V

6 5

120

0

150

0.33 0.31 0.29 0.27 0.25 0.23 0.21 –30

0 30 60 90 TEMPERATURE (°C)

120

150

31141 G22

6

150

VIN = 24V

0.16 0.08 0

–0.32

0

5

10 15 20 25 30 RUN PIN VOLTAGE (V)

35

40

–0.40 –60

–30

0 30 60 90 TEMPERATURE (°C)

1.800

2.70

VIN = 24V

1.750 1.725 1.700 1.675

–30

0 30 60 90 TEMPERATURE (°C)

120

150

Inductor Overload Current Limit Threshold vs Temperature

1.775

1.650 –60

120

31141 G21

INDUCTOR OVERLOAD CURRENT LIMIT THRESHOLD (A)

0.35

0.19 –60

0.24

31141 G20

INDUCTOR CURRENT LIMIT THRESHOLD (A)

POWER SWITCH RESISTANCE A/D (Ω)

0.37

120

31141 G18

Inductor Current Limit Threshold vs Temperature

VIN = 24V

0 30 60 90 TEMPERATURE (°C)

–0.24

2

Power Switch Resistance vs Temperature 0.39

–30

–0.16

3

31141 G19

0.41

1.060 –60

VIN = 3V VIN = 24V VIN = 40V

–0.08

4

1 0 30 60 90 TEMPERATURE (°C)

1.080

FB Voltage vs Temperature

7

–30

1.100

RUN Pin Current vs RUN Pin Voltage

1.228

1.216 –60

1.120

31141 G17

RUN Pin Threshold vs Temperature 1.230

150

1.140

NORMAIZED FB VOLTAGE (% CHANGE FROM 25°C)

4.480

Oscillator Frequency vs Temperature

150

31141 G23

VIN = 24V

2.65 2.60 2.55 2.50 2.45 2.40 –60

–30

0 30 60 90 TEMPERATURE (°C)

120

150

31141 G24

31141fa

For more information www.linear.com/LTC3114-1

LTC3114-1 TYPICAL PERFORMANCE CHARACTERISTICS (TA = 25°C unless otherwise specified) 115

SW1/SW2 Minimum Low Times vs Temperature 120

VIN = 24V

SW1/SW2 Minimum Low Times vs LDO 170

VIN = 24V

IN APPLICATION

160

109

106

103

114

MINIMUM LOW TIME (ns)

112

MINIMUM LOW TIME (ns)

INDUCTOR ZERO CURRENT THRESHOLD (mA)

Inductor Zero Current Threshold vs Temperature

108

102

96

150 140 130 120 110 100

100 –60

–30

0 30 60 90 TEMPERATURE (°C)

150

120

90 –60

–30

0 30 60 90 TEMPERATURE (°C)

Load Transient in Buck Mode, 100mA to 600mA LOAD CURRENT 500mA/DIV

VOUT 200mV/DIV

VOUT 200mV/DIV

31141 G28

1ms/DIV

31141 G31

Output Voltage Ripple in Burst Mode Operation

VIN = 14V 200µs/DIV LOAD = 10mA FRONT PAGE CIRCUIT

5V Output Voltage Response to Fast Line Transient (4V to 28V in 10µs)

31141 G30

Output Voltage Ripple in PWM Mode

VOUT 20mV/DIV

VOUT 100mV/DIV

1ms/DIV

5.5

4.8

31141 G27

31141 G29

VIN 10V/DIV

VOUT 50mV/DIV

4.1

VOUT 50mV/DIV

VIN = 3.6V VOUT = 5V

Burst Mode Operation to PWM Mode Output Voltage Response LOAD CURRENT 500mA/DIV

3.4

LDO VOLTAGE (V)

Load Transient in Boost Mode, 100mA to 600mA

LOAD CURRENT 500mA/DIV

1ms/DIV

90 2.7

31141 G26

31141 G25

VIN = 14V VOUT = 5V

150

120

50µs/DIV

31141 G32

500ns/DIV

31141 G33

31141fa

For more information www.linear.com/LTC3114-1

7

LTC3114-1 BLOCK DIAGRAM VIN

PVIN

SW2

SW1

LDO 4.4V PLDO

REVERSE BLOCKING LDO

PVOUT

INDUCTOR ISENSE

MA

MD

MB

PGND

OUTPUT CURRENT SENSE

MC

0.1A

– +

PGND

10µA

IZERO

LTC3114-1 GATE DRIVERS

BST1

IOUT 25k

+ –

BST2

RUN 1.2V VIN 2.1V LDO 2.5V

+ – + – + –

AVERAGE CURRENT AMP

+ –

PWM

VOLTAGE ERROR AMP

+ –

MODE

PROG

1V

FB 1V

VC

1.2MHz OSCILLATOR SOFT-START 1V BIAS GENERATOR BANDGAP REFERENCE POR OVERTEMPERATURE PROTECTION

GND

PGND

31141 BD

8

31141fa

For more information www.linear.com/LTC3114-1

LTC3114-1 PIN FUNCTIONS PGND (Pin 1, Exposed Pad Pin 17): Power Ground Connections. The PGND pin must be electrically connected to a power ground plane in the application. The exposed pad is an additional power ground connection in parallel with Pin 1. Optimal thermal performance requires that the exposed pad be soldered to the PC board and preferably to a ground plane.

functions. Refer to the Applications Information section for complete details on how to select the proper values for RPROG and CPROG.

SW2 (Pin 2): Buck-Boost Converter Power Switch Pin. This pin is connected to one side of the buck-boost inductor.

FB (Pin 7): Feedback Voltage Input. A resistor divider connected to this pin sets the output voltage for the buck-boost converter. The nominal FB voltage is 1V. Care should be taken in the routing of the connection to this pin to minimize the possibility of stray coupling from the SW pins.

PVOUT (Pin 3): Buck-Boost Converter Power Output. This pin should be connected to a low ESR capacitor of at least 10µF. The capacitor should be placed as close to the IC as possible and should have a short return path to PGND. RUN (Pin 4): Input to Enable and Disable the IC and Set Custom Input Undervoltage Lockout (UVLO) Thresholds. The RUN pin can be driven by an external logic signal to enable and disable the IC. In addition, the voltage on this pin can be set by a resistive voltage divider connected to the input voltage in order to provide accurate turn-on and turn-off (UVLO) thresholds. The IC is enabled if RUN exceeds 1.2V nominally. Once enabled, the UVLO threshold has built-in hysteresis of approximately 100mV, so turnoff will occur when the voltage on RUN drops to below 1.1V nominally. To continuously enable the IC, RUN can be tied directly to the input voltage up to the absolute maximum rating. PROG (Pin 5): Output Current Programming Pin and Output of the Switch D Current Sense Amplifier. A current proportional to the current in switch D, the buck-boost converter output current, is delivered from PROG. The PROG current magnitude is approximately ISWD/25000. Connect a parallel resistor and capacitor from PROG to GND to generate a voltage proportional to output current. In applications where this voltage is used to control average output current, the resistor value should be set such that the desired average output current produces 1V on PROG and is given by:

RPROG(Ω) =

1V•25000 IOUT ( A)

Alternatively, the voltage on PROG can be connected to an A/D converter and used for system diagnostic

VC (Pin 6): Error Amplifier Output. A frequency compensation network must be connected between VC and GND to stabilize the buck-boost converter. Refer to the Applications Information section for details.

GND (Pin 8): Signal Ground. This pin is the ground connection for the control circuitry of the IC and must be tied to ground in the application. LDO (Pin 9): Low Voltage Supply Input for the IC Control Circuitry. This pin powers internal IC control circuitry and must be connected to the LDO pin in the application. A 4.7µF or larger bypass capacitor must be connected between this pin and ground. Pins LDO and PLDO must be connected together in the application. VIN (Pin 10): LDO Supply Connection. This pin provides power to the internal VCC regulator. Pins VIN and PVIN must be connected together in the application. If the trace connecting VIN and PVIN is of substantial length, a 1µF capacitor should be connected from VIN to GND as close to the IC pins as possible. PLDO (Pin 11): Internal LDO Regulator Output. PLDO is the output of the internal linear regulator that generates the LDO rail from VIN. PLDO is also used as the supply connection to the power switch gate drivers. Pins PLDO and LDO must be connected together in the application. BST2 (Pin 12): Flying Capacitor Pin for SW2. This pin must be connected to SW2 through a 68nF capacitor. BST2 is used to generate the gate driver rail for power switch D. BST1 (Pin 13): Flying Capacitor Pin for SW1. This pin must be connected to SW1 through a 68nF capacitor. BST1 is used to generate the gate driver rail for power switch A.

31141fa

For more information www.linear.com/LTC3114-1

9

LTC3114-1 PIN FUNCTIONS PVIN (Pin 14): Power Input for the Buck-Boost Converter. A 10µF or larger capacitor must be connected between PVIN and GND as close to the IC as possible. The bypass capacitor ground connection should via directly down to the PCB ground plane. Pins PVIN and VIN must be connected together in the application. SW1 (Pin 15): Buck-Boost Power Converter Switch Pin. This pin is connected to one side of the buck-boost inductor.

MODE (Pin 16): Burst Mode/PWM Mode Control Pin. Forcing MODE high causes the IC to operate in continuous fixed frequency PWM mode. The nominal switching frequency in PWM mode is 1.2MHz. Forcing MODE low enables Burst Mode operation. Burst Mode operation improves efficiency at light loads by only activating the buck-boost converter as needed to maintain the nominal regulated output voltage. If MODE is low, the converter will automatically transition to PWM mode if the load current increases.

OPERATION INTRODUCTION The LTC3114-1 is a monolithic, current mode, buck-boost DC/DC converter that can operate over a wide voltage range of 2.2V to 40V and provide up to 1A to the load. Internal, low RDS(ON) N-channel DMOS power switches reduce solution complexity and maximize efficiency. A proprietary switch control algorithm allows the buck-boost converter to maintain output voltage regulation with input voltages that are above, below or equal to the output voltage. Transitions between the step-up or step-down operating modes are seamless and free of transients and subharmonic switching, making this product ideal for noise sensitive applications. The LTC3114-1 operates at a fixed nominal switching frequency of 1.2MHz, which provides an ideal trade-off between small solution size and high efficiency. Current mode control provides inherent input line voltage rejection, simplified compensation and rapid response to load transients. Burst Mode capability is also included in the LTC3114-1 and is user selected via the MODE input pin. In Burst Mode operation, the LTC3114-1 provides exceptional efficiency at light output loading conditions by operating the converter only when necessary to maintain voltage regulation. At higher loads, the LTC3114-1 automatically switches to fixed frequency PWM mode when Burst Mode operation is selected. For 5V VOUT applications, the quiescent current in Burst Mode operation can be as low as 20µA with the internal LDO regulator bootstrapped to the output voltage. If the application requires extremely low noise, continuous PWM operation can also be selected via the MODE pin. The

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LTC3114-1 also features an accurate RUN comparator threshold with hysteresis. This allows the buck-boost DC/DC converter to turn on and off at user-selected VIN voltage thresholds. With a wide voltage range and programmable output current or monitoring capabilities, the LTC3114-1 is well suited for many demanding power conversion needs. PROGRAMMABLE AVERAGE OUTPUT CURRENT The LTC3114-1 includes the ability to program an accurate average output current from the buck-boost DC/DC converter. Whether the application is driving high power LEDs, charging batteries, a wide compliance range current source or just providing a well controlled current limit, the LTC3114-1 programmable average output current capability delivers high efficiency and maximum flexibility. The output current limit level is independent of operating mode, (buck or boost), and is active down to approximately 2V on VOUT. Below 2V on VOUT, a secondary foldback current limit circuit is activated to reduce power dissipation. The desired average output current level is programmed with a standard low wattage resistor from PROG to ground. A low loss current sense resistor and accurate current sense amplifier are integrated within the IC, greatly simplifying the PCB layout and design. Factory trimming of the output current limit offset and gain provide a high degree of accuracy, typically within ±5% of the setpoint. The applications section provides details on how to select the programming resistor, RPROG, for the desired average output current level from the LTC3114-1. 31141fa

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LTC3114-1 OPERATION PWM Mode Operation

This ensures that the switch D gate driver power supply rail on BST2 is maintained. The duty cycle of switches A and B are adjusted by the PWM to maintain output voltage regulation in buck mode.

If the MODE pin is high or if the load current on the converter is high enough to command PWM mode operation with MODE low, the LTC3114-1 operates in a fixed 1.2MHz PWM mode using a current mode control loop. PWM mode minimizes output voltage ripple and yields a low noise switching frequency spectrum. A proprietary switching algorithm provides seamless transitions between operating modes and eliminates discontinuities in the average inductor current, inductor ripple current and loop transfer function throughout all modes of operation. These advantages result in increased efficiency, improved loop stability and lower output voltage ripple in comparison to the traditional buck-boost converter.

If the input voltage is lower than the output voltage, the converter operates in boost mode. Switch A remains on for the entire switching cycle except for the minimum switch low duration (typically 100ns). During the switch low duration, switch B is turned on which forces SW1 low and charges the flying capacitor, CBST1. This ensures that the switch A gate driver power supply rail on BST1 is maintained. The duty cycle of switches C and D are adjusted by the PWM to maintain output voltage regulation in boost mode.

Figure 1 shows the topology of the LTC3114-1 power stage which is comprised of four N-channel DMOS switches and their associated gate drivers. In PWM mode operation both switch pins transition on every cycle independent of the input and output voltages. In response to the internal control loop command, an internal pulse width modulator generates the appropriate switch duty cycle to maintain regulation of the output voltage.

Oscillator

When stepping down from a high input voltage to a lower output voltage, the converter operates in buck mode and switch D remains on for the entire switching cycle except for the minimum switch low duration (typically 50ns). During the switch low duration, switch C is turned on which forces SW2 low and charges the flying capacitor, CBST2.

The LTC3114-1 utilizes average current mode control for the pulse width modulator as shown in Figure 2. Current mode control, both average and the better known peak method, enjoy some benefits compared to other control methods including: simplified loop compensation, rapid response to load transients and improved rejection of line voltage transients.

CBST1

BST1

The LTC3114-1 operates from an internal oscillator with a nominal fixed frequency of 1.2MHz. This allows the DC/DC converter efficiency to be maximized while still using small external components. Current Mode Control

CBST2

L

PVIN

SW1

SW2 PVOUT

BST2 PLDO

PLDO A

D LTC3114-1

PLDO B PGND

PLDO C PGND 31141 F01

Figure 1. Power Stage Schematic 31141fa

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LTC3114-1 OPERATION CCS1 and CCS2. The average current amplifier’s output provides the cycle-by-cycle duty cycle command into the buck-boost PWM circuitry.

Referring to Figure 2, an internal high gain transconductance error amplifier monitors VOUT through a voltage divider connected to the FB pin and provides an output, VC, that is used by the current mode control loop to command the appropriate inductor current level. To ensure stability, external frequency compensation components (CP1, CP2 and RZ) must be installed between VC and ground. The procedure for determining these components is provided in the Applications Information section of this data sheet. VC is internally connected to the noninverting input of a high gain, integrating, operational amplifier, referred to in Figure 2, as the average current amp. The inverting input of the average current amplifier is connected to the inductor current sense circuit through a gain setting resistor (RCS1) and to its output (VIA) through an internal frequency compensation network comprised of RCS2,

The noninverting reference level input to the average current amplifier is VC and the feedback or inverting input is driven from the inductor current sensing circuitry. The inductor current sensing circuitry alternately measures the current through switches A and B. The output of the sensing circuitry produces a voltage across resistor RX that resembles the inductor current waveform transformed to a voltage. If there is an increase in the power converter load on VOUT, the instantaneous level of VOUT will drop slightly, which will increase the voltage level on VC by the inverting action of the voltage error amplifier. When the increase on VC first occurs, the output of the current averaging amplifier, VIA, will also increase momentarily

RA 250mΩ VDS SENSE VIN

L1

SWA

SWD PVOUT

VDS SENSE

VOUT COUT

SWC

RCOESR

SWB

RLOAD

INDUCTOR ISENSE gm = 111µA/V RX

CCS2 C

D

RCS2 PWM

CONTROL LOGIC

VIA AVERAGE CURRENT AMP

RTOP

CCS1

+ –

B

ACTIVE RANGE OF VC = 135mV TO 1V

+ –

A

RCS1

RBOT

FB

gm

1V VOLTAGE ERROR gm = 120µS AMP RO = 3.6M

VC

SOFT-START 1V

RZ GND

CP1

CP2

31141 F02

Figure 2. Average Current Mode Control Loop

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LTC3114-1 OPERATION to command a larger duty cycle. This duty cycle increase will result in a higher inductor current level, ultimately raising the average voltage across RX. Once the average value of the voltage on RX is equivalent to the VC level, the voltage on VIA will revert very closely to its previous level into the PWM and force the correct duty cycle to maintain voltage regulation at this new higher inductor current level. The average current amplifier is configured as an integrator, so in steady state, the average value of the voltage applied to its inverting input (voltage across RX) will be equivalent to the voltage on its noninverting, VC. As a result, the average value of the inductor current is controlled in order to maintain voltage regulation. The entire current amplifier and PWM can be simplified as a voltage controlled current source, with the driving voltage coming from VC. VC is commonly referred to as the current command for this reason and the voltage on VC is directly proportional to average inductor current, which can prove useful for many applications. The voltage error amplifier monitors the output voltage, VOUT through a voltage divider and makes adjustments to the current command as necessary to maintain regulation. The voltage error amplifier therefore controls the outer voltage regulation loop. The average current amplifier makes adjustments to the inductor current as directed by the voltage error amplifier output via VC and is commonly referred to as the inner current-loop amplifier. The average current mode control technique is similar to peak current mode control except that the average current amplifier, by virtue of its configuration as an integrator, controls average current instead of the peak current. This difference eliminates the peak to average current error inherent to peak current mode control, while maintaining most of the advantages inherent to peak current mode control. Average current mode control requires appropriate compensation for the inner current loop unlike peak current mode control. The compensation network must have high DC gain to minimize errors between the commanded average current level and actual, high bandwidth to quickly change the commanded current level following transient load steps and a controlled mid-band gain to provide a form of slope compensation unique to average current

mode control. Fortunately, the compensation components required to ensure these sometimes conflicting requirements have been carefully selected and are integrated within the LTC3114-1. With the inner loop compensation fixed internally, compensation of the outer voltage loop as is detailed in the applications section, is similar to well known techniques used with peak current mode control. Inductor Current Sense and Maximum Output Current As part of the current control loop required for current mode control, the LTC3114-1 includes a pair of current sensing circuits that directly measure the buck-boost converter inductor current as shown in Figure 2. These circuits measure the voltage dropped across switches A and B separately and produce output currents proportional to the switches’ voltage drop. By sensing current in this manner, there is no additional power loss incurred, which improves converter efficiency. The amplifier output terminals are summed together into a common resistor, RX connected to ground. Since switches A and B are never conducting at the same time, the resultant waveform on RX resembles the inductor current. This replica of the inductor current is used as one input to the current averaging amplifier as described in the previous section. The voltage error amplifier output, VC, is internally clamped to a nominal level of 1V. Since the average inductor current is proportional to VC, the 1V clamp level sets the maximum average inductor current that can be programmed by the inner current loop. Taking into account the current sense amplifier’s gain and the value of RX, the maximum average inductor current is approximately 1.7A (typical). In buck mode, the output current is approximately equal to the inductor current, IL. IOUT(BUCK) ≈ IL • 0.9 The SW1/SW2 forced low time on each switching cycle briefly disconnects the inductor from VOUT and VIN resulting in slightly less output current in either buck or boost mode for a given inductor current. In boost mode, the output current is related to average inductor current and duty cycle by: IOUT(BOOST) ≈ IL • (1 – D) where D is the converter duty cycle. 31141fa

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LTC3114-1 OPERATION Since the output current in boost mode is reduced by the duty cycle (D), the output current rating in buck mode is always greater than in boost mode. Also, because boost mode operation requires a higher inductor current for a given output current compared to buck mode, the efficiency in boost mode will be lower due to higher IINDUCTOR2 • RDS(ON) losses in the power switches. This will further reduce the output current capability in boost mode. In either operating mode, however, the inductor peak-to-peak ripple current does not play a major role in determining the output current capability, unlike peak current mode control. With peak current mode control, the maximum output current capability is reduced by the magnitude of inductor ripple current because the peak inductor current level is the control variable, but the average inductor current is what determines the output current. The LTC3114 -1 measures and controls average inductor current, and therefore, the inductor ripple current magnitude has little effect on the maximum current capability in contrast to an equivalent peak current mode converter. Under most conditions in buck mode, the LTC3114 -1 is capable of providing 1A to the load. Under certain conditions, more output current is possible, refer to the Typical Performance Characteristics section for more details. In boost mode, as described previously, the output current capability is related to the boost ratio or duty cycle (D). For a 3.6V VIN to 5V output application, the LTC3114-1 can provide up to 500mA to the load. Refer to the Typical Performance Characteristics section for more detail on output current capability. At VC levels below 135mV, the LTC3114-1 will not command any current because the internal current sense signal has a built-in 135mV offset. Therefore, the active range of VC is between approximately 135mV (zero current) and 1V (full current). In some applications, an external circuit may be used to control the VC voltage level. Any such circuit needs to have the capability to sink or source the approximate 12µA provided by the internal error amplifier and to pull below 135mV to disable the current command, if necessary.

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OVERLOAD CURRENT LIMIT AND ZERO CURRENT COMPARATOR The internal current sense waveform is also used by the peak overload current (IPEAK) and zero current (IZERO) comparators. The IPEAK current comparator monitors ISENSE and halts converter operation if the inductor current level exceeds its maximum internal threshold, which is approximately 50% above the normal maximum current level commanded by the current control loop. An inductor current level of this magnitude will only occur during a fault, such as an output short circuit or a fast VIN (line)transient. If the IPEAK comparator is engaged, the PWM is halted for the remainder of the switching cycle with SW1 and SW2 held low. If VOUT is less than approximately 1.8V when the peak limit occurs, then a soft-start cycle is initiated. In the event that the current overload is the result of an output short-circuit condition, the LTC3114‑1 will remain in a low frequency restart mode, keeping the on-chip power dissipation to very low levels. If the short circuit is removed, the LTC3114-1 will restart in the normal fashion. The LTC3114-1 exhibits discontinuous inductor current operation at light output loads by virtue of the IZERO comparator circuit under most operating conditions. This improves efficiency at light output loads if PWM mode operation compared to continuous conduction mode. If the internal current sense waveform transitions below the internally set zero current threshold, the LTC3114-1 will disconnect the inductor from VOUT, by shutting off switch D, to prevent discharge of the output capacitor. The IZERO circuitry is reset by the oscillator clock at the end of the switching cycle. The IZERO comparator threshold is set slightly above zero current to compensate for comparator propagation delay. In some cases, the inductor current may reverse slightly if there is a very high voltage output or small inductor resulting in a small amount of residual energy left in the inductor following a zero current event. In this case the LTC3114-1 SW1 waveform will display a characteristic half sine wave between the time at which Izero is detected and when the next switching cycle commences. This is because SWC is the only active (on) switch following an IZERO event and this behavior is not harmful to the LTC3114-1. 31141fa

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LTC3114-1 OPERATION Burst Mode Operation

LDO REGULATOR

When the MODE pin is held low, the LTC3114-1 is configured for Burst Mode operation. As a result, the buck-boost DC/DC converter will operate with normal continuous PWM switching above a predetermined minimum output load and will automatically transition to power saving Burst Mode operation below this output load level. Refer to the Typical Performance Characteristics section of this data sheet to determine the Burst Mode transition threshold for various combinations of VIN and VOUT. If MODE is low, at light output loads, the LTC3114-1 will go into a standby or sleep state when the output voltage achieves its nominal regulation level. The sleep state halts PWM switching and powers down all non-essential functions of the IC, significantly reducing the quiescent current of the LTC3114-1. This greatly improves overall power conversion efficiency when the output load is light. Since the converter is not operating in sleep, the output voltage will slowly decay at a rate determined by the output load resistance and the output capacitor value. When the output voltage has decayed by a small amount, typically 1%, the LTC3114-1 will wake and resume normal PWM switching operation until the voltage on VOUT is restored to the previous level. If the load is very light, the LTC3114‑1 may only need to switch for a few cycles to restore VOUT and may sleep for extended periods of time, significantly improving efficiency.

An internal low dropout regulator generates a nominal 4.4V rail from VIN. The LDO rail powers the internal control circuitry and power device gate drivers of the LTC3114‑1. The LDO regulator is disabled in shutdown to reduce quiescent current and is enabled by forcing the RUN pin above its logic threshold. The LDO regulator includes current-limit protection to safeguard against accidental short-circuiting of the LDO rail. In 5V VOUT applications, the LDO can be driven by VOUT through a Schottky diode, commonly referred to as bootstrapping. Bootstrapping can provide a significant efficiency improvement, particularly when VIN is very high and also allows operation to the minimum rated input voltage of 2.2V.

Soft-Start The LTC3114-1 soft-start circuit minimizes input current transients and output voltage overshoot on initial power up. The required timing components for soft-start are internal to the LTC3114-1 and produce a nominal soft-start duration of approximately 2ms. The internal soft-start circuit slowly ramps the error amplifier output, VC. In doing so, the current command of the IC is also slowly increased, starting from zero. It is unaffected by output loading or output capacitor value. Soft-start is reset by undervoltage lockout on both VIN and LDO, the accurate RUN pin comparator, thermal shutdown and the overload current limit as described previously.

UNDERVOLTAGE LOCKOUT The LTC3114-1 undervoltage lockout (UVLO) circuit disables operation of the internal power switches and keeps other IC functions in a reset state if either the input voltage applied to VIN or the LDO output voltage are below their respective UVLO thresholds. There are two UVLO circuits, one that monitors VIN and another that monitors LDO. The VIN UVLO comparator has a falling voltage threshold of 2.1V (typical). If VIN falls below this level, IC operation is disabled until VIN rises above 2.2V (typical), as long as the LDO voltage is above its UVLO threshold. The LDO UVLO has a falling voltage threshold of 2.4V (typical). If the LDO voltage falls below this threshold, IC operation is disabled until LDO rises above 2.5V (typical) as long as VIN is above its nominal UVLO threshold level. Depending on the particular application, either of these UVLO thresholds could be the limiting factor affecting the minimum input voltage required for operation. The LTC3114-1 LDO regulator uses VIN for its power input. If LDO is not bootstrapped, then there exists a voltage drop or dropout voltage between VIN and LDO. The dropout voltage is proportional to the loading on LDO, which is primarily due to the gate charge and capacitive charging currents inherent to the internal power switches. The loading on LDO

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LTC3114-1 OPERATION and the LDO dropout voltage, therefore, are proportional to VIN and VOUT. For this reason, the minimum input voltage required for operation is limited by the LDO minimum voltage as input voltage (VIN) will always be higher than LDO in the normal (non-bootstrapped) configuration. The Typical Performance Characteristics section of this data sheet provides guidance on the dropout voltage between VIN and LDO over the range of VIN and VOUT. In applications where LDO is bootstrapped (powered by VOUT through a Schottky diode or auxiliary power rail), the minimum input voltage for operation (after start-up) will be limited only by the VIN UVLO threshold (2.1V typical). Please note that if the bootstrap voltage is derived from the LTC3114-1 VOUT and not an independent power rail, then the minimum input voltage required for initial start-up is still limited by the minimum LDO voltage (2.6V typical). RUN PIN COMPARATOR In addition to serving as a logic-level input to enable certain functions of the IC, the RUN pin includes an accurate internal comparator that allows it to be used to set custom rising and falling on/off thresholds with the addition of an external resistor divider. When RUN is driven above its logic threshold (0.7V typical), the LDO regulator is enabled, which provides power to the internal control circuitry of the IC. If the voltage on RUN is increased further so that it exceeds the RUN comparator accurate analog threshold (1.2V nominal), all functions of the buck-boost converter will be enabled and a startup sequence will ensue. If RUN is brought below the accurate comparator threshold, the buck-boost converter will inhibit switching, but the LDO regulator and control circuitry will remain powered unless RUN is brought below its logic threshold. Therefore, in order to completely shut down the IC and reduce the VIN current to 3µA (typical), it is necessary to ensure that RUN is brought below its worst-case low-logic threshold of 0.3V. RUN is a high voltage input and can be tied directly to VIN to continuously enable the IC when the input supply is present. Also note that RUN can be driven above VIN or

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VIN

LTC3114-1 R1 RUN

ACCURATE THRESHOLD

1.2V

– +

ENABLE SWITCHING

0.7V

– +

ENABLE LDO AND CONTROL CIRCUITS

R2

LOGIC THRESHOLD 31141 F03

Figure 3. Accurate RUN Pin Comparator

VOUT as long as it stays within the operating range of the IC, that is, less than 40V. If RUN is forced above 5V, it will sink a small current as given by the following equation:

IRUN ≈

VRUN – 5V 5MΩ

With the addition of an optional resistor divider as shown in Figure 3, the RUN pin can be used to establish a userprogrammable turn on and turn off threshold. The buck-boost converter is enabled when the voltage on RUN reaches 1.205V (nominal). Therefore, the turn-on voltage threshold on VIN is given by:

 R1 VTURNON = 1.205V  1+   R2 

Once the converter is enabled, the RUN comparator includes a built-in hysteresis of approximately 140mV, so that the turn-off threshold will be approximately 8.33% lower than the turn-on threshold. Put another way, the internal threshold level for the RUN comparator looks like 1.1V after the IC is enabled. The RUN comparator is relatively noise insensitive, but there may be cases dues to PCB layout, very large value resistors for R1 and R2 or proximity to noisy components where noise pickup is unavoidable and may cause the turn on or turn off of the IC to be intermittent. In these cases, a filter capacitor can be added across R2 to ensure proper operation.

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LTC3114-1 OPERATION THERMAL CONSIDERATIONS

Start-Up Into a Pre-Biased VOUT

The power switches of the LTC3114-1 are designed to operate continuously with currents up to the internal current limit thresholds. However, when operating at high current levels, there may be significant heat generated within the IC. In addition, the LDO regulator can generate a significant amount of heat when VIN is very high. This adds to the total power dissipation of the IC. As described elsewhere in this data sheet, bootstrapping of the LDO for 5V output applications can essentially eliminate the LDO power dissipation term and significantly improve efficiency. As a result, careful consideration must be given to the thermal environment of the IC in order to provide a means to remove heat from the IC and ensure that the LTC3114-1 is able to provide its full rated output current. Specifically, the exposed die attach pad of both the DHC and FE packages must be soldered to a copper layer on the PCB to maximize the conduction of heat out of the IC package. This can be accomplished by utilizing multiple vias from the die attach pad connection underneath the IC package to other PCB layer(s) containing a large copper plane. A typical board layout incorporating these concepts is shown in Figure 4.

Some applications require the LTC3114-1 to start up into an output voltage (VOUT), that is pre-biased by an external source to some level. It is desirable at LTC3114-1 start-up to minimize current taken from the pre-bias voltage source and VOUT storage capacitor to prevent VOUT glitches and currents fed backwards into the VIN power source of the LTC3114-1.

If the IC die temperature exceeds approximately 165°C, overtemperature shutdown will be invoked and all switching will be inhibited. The part will remain disabled until the die temperature cools by approximately 10°C. The soft-start circuit is re-initialized in overtemperature shutdown to provide a smooth recovery when the IC die temperature cools enough to resume operation.

If the LTC3114-1 VIN voltage is higher than the pre-biased VOUT, indicating buck mode operation, then there will be minimal reverse current at start-up. However, if the LTC3114-1 VIN voltage is lower than the pre-biased VOUT, indicating boost mode operation, then it is possible for a brief, but substantial reverse current to be taken by the LTC3114-1 from VOUT. The duration of this reverse current is approximately 100µs to 200µs. The magnitude is inversely proportional to the VIN voltage and dependent upon external component values. Prevention of pre-biased VOUT reverse current in boost mode can be achieved in two ways. The preferred method is to ensure that the pre-biased VOUT voltage level is set higher than the nominal VOUT regulation level. For example, if VOUT is pre-biased to 13V, then setting the VOUT regulation voltage of the LTC3114-1 to less than 13V, taking into account error margins, will result in negligible or zero reverse current at start-up. If this is not possible, then a Schottky diode can be connected in series between VOUT of the LTC3114-1 and the converter output to block reverse current .

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LTC3114-1 OPERATION Top Layer

2nd Layer

Bottom Layer

3rd Layer

Figure 4. Typical 4 Layer PC Board Layout

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LTC3114-1 APPLICATIONS INFORMATION A standard application circuit for the LTC3114-1 is shown on the front page of this data sheet. The appropriate selection of external components is dependent upon the required performance of the IC in each particular application given considerations and trade-offs such as PCB area, input and output voltage range, output voltage ripple, required efficiency, thermal considerations and cost. This section of the data sheet provides some basic guidelines and considerations to aid in the selection of external components and the design of the applications circuit. LDO Capacitor Selection The LDO output of the LTC3114-1 is generated from VIN by a low dropout linear regulator. The LDO regulator has been designed for stable operation with a wide range of output capacitors. For most applications, a low ESR capacitor of at least 4.7µF should be used. The capacitor should be located as close to the PLDO pin as possible and connected to the LDO pin and ground through the shortest traces possible. PLDO is the regulator output and is also the internal supply pin for the gate drivers and boost rail charging diodes. The LDO pin is the supply connection for the remainder of the control circuitry. The LDO and PLDO pins must be connected together on the PCB. If the connecting trace cannot be made short, an additional 0.1µF bypass capacitor should be connected between the LDO pin and ground as close to the package pins as possible. Inductor Selection The choice of inductor used in LTC3114-1 application circuits influences the maximum deliverable output current, the converter bandwidth, the magnitude of the inductor current ripple and the overall converter efficiency. The inductor must have a low DC series resistance or output current capability and efficiency will be compromised. Larger inductor values reduce inductor current ripple but will not increase output current capability as is the case with peak current mode control as described in the Maximum Output Current section of this data sheet. Larger value inductors also tend to have a higher DC series resistance for a given case size, which will have a negative impact on efficiency. Larger values of inductance will also lower the right half plane (RHP) zero frequency when operating in boost mode, which requires the converter bandwidth to be

set lower in frequency, slowing the converter’s response to load transients. Nearly all LTC3114-1 application circuits deliver the best performance with an inductor value between 4.7µH and 15µH. Buck mode-only applications can use the larger inductor values as they are unaffected by the RHP zero, while mostly boost applications generally require inductance on the low end of this range depending on how deep they will operate in boost mode. Regardless of inductor value, the saturation current rating should be selected such that it is greater than the worst-case average inductor current plus half of the ripple current. The peak-to-peak inductor current ripple for each operational mode can be calculated from the following formula, where f is the switching frequency (1.2MHz), L is the inductance in µH and tLOW is the switch pin minimum low time in µs. The switch pin minimum low time is typically 0.05µs. ∆IL(P-P)(BUCK) =

VOUT  VIN – VOUT   1   – tLOW  Amps   L  VIN  f

∆IL(P-P)(BOOST) =

VIN  VOUT – VIN   1   – tLOW  Amps   L  VOUT  f

It should be noted that the worst-case inductor peak-topeak inductor ripple current occurs when the duty cycle in buck mode is maximum (highest VIN) and in boost mode when the duty cycle is 50% (VOUT = 2 • VIN). As an example, if VIN (minimum) = 3.6V and VIN (maximum) = 40V, VOUT = 5V and L = 6.8µH, the peak-to-peak inductor ripples at the voltage extremes (40V VIN for buck and 3.6V VIN for boost) are: Buck = 504mA peak-to-peak Boost = 116mA peak-to-peak One-half of this inductor ripple current must be added to the highest expected average inductor current in order to select the proper saturation current rating for the inductor. In addition to its influence on power conversion efficiency, the inductor DC resistance can also impact the maximum output current capability of the buck-boost converter particularly at low input voltages. In buck mode, the output current of the buck-boost converter is primarily limited by the inductor current reaching the average current limit 31141fa

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19

LTC3114-1 APPLICATIONS INFORMATION threshold defined by VC. However, in boost mode, especially at large step-up ratios, the output current capability can also be limited by the total resistive losses in the power stage. These losses include, switch resistances, inductor DC resistance and PCB trace resistance. Avoid inductors with a high DC resistance (DCR) as they can degrade the maximum output current capability from what is shown in the Typical Performance Characteristics section and from the Typical Application circuits. As a guideline, the inductor DCR should be significantly less than the typical power switch resistance of 250mΩ. The only exceptions are applications that have a maximum output current much less than what the LTC3114-1 is capable of delivering. Different inductor core materials and styles have an impact on the size and price of an inductor at any given current rating. Shielded construction is generally preferred as it minimizes the chances of interference with other circuitry. The choice of inductor style depends upon the price, sizing, and EMI requirements of a particular application. Table 1 provides a small sampling of inductors that are well suited to many LTC3114-1 applications. Output Capacitor Selection A low effective series resistance (ESR) output capacitor should be connected at the output of the buck-boost converter in order to minimize output voltage ripple. Multilayer ceramic capacitors are an excellent option as they have low ESR and are available in small footprints. The capacitor value should be chosen large enough to reduce the output voltage ripple to acceptable levels. Neglecting the capacitor’s ESR and ESL (effect series inductance), the peak-to-peak output voltage ripple can be calculated by the following formula, where f is the frequency in MHz (1.2MHz for the LTC3114 -1), COUT is the capacitance in µF, tLOW is the switch pin minimum low time in us (0.1µs for the LTC3114-1) and ILOAD is the output current in Amps. ∆VP-P(BUCK) =



ILOAD tLOW Volts COUT

∆VP-P(BOOST) =

20

ILOAD  VOUT – VIN + tLOW fVIN   Volts fCOUT  VOUT

Table 1. Representative Surface Mount Inductors PART NUMBER

VALUE DCR MAX DC (µH) (mΩ) CURRENT (A)

SIZE (mm) W×L×H

Coilcraft LPS6225 LPS6235 MSS1038 D03316P

4.7 6.8 22 15

65 75 70 50

3.2 2.8 3.3 3.0

6.2 × 6.2 × 2.5 6.2 × 6.2 × 3.5 10.2 × 10.5 × 3.8 12.9 × 9.4 × 5.2

Cooper-Bussmann CD1-150-R DR1030-100-R FP3-8R2-R DR1040-220-R

15 10 8.2 22

50 40 74 54

3.6 3.18 3.4 2.9

10.5 × 10.4 × 4.0 10.3 × 10.5 × 3.0 7.3 × 6.7 × 3.0 10.3 × 10.5 × 4.0

Panasonic ELLCTV180M ELLATV100M

18 10

30 23

3.0 3.3

12 × 12 × 4.2 10 × 10 × 4.2

Sumida CDRH8D28/HP CDR10D48MNNP CDRH8D28NP

10 39 4.7

78 105 24.7

3.0 3.0 3.4

8.3 × 8.3 × 3 10.3 × 10.3 × 5 8.3 × 8.3 × 3

Taiyo-Yuden NR10050T150M

15

46

3.6

9.8 × 9.8 × 5

TOKO B1047AS-6R8N B1179BS-150M 892NAS-180M

6.8 15 18

36 56 42

2.9 3.3 3.0

7.6 × 7.6 × 5 10.3 × 10.3 × 4 12.3 × 12.3 × 4.5

Würth 7447789004 7440650068 744771133 744066150

4.7 6.8 33 15

33 33 49 40

2.9 3.6 2.7 3.2

7.3 × 7.3 × 3.2 10 × 10 × 3 12 × 12 × 6 10 × 10 × 3.8

Examining the previous equations reveal that the output voltage ripple increases with load current and is generally higher in boost mode than in buck mode. Note that these equations only take into account the voltage ripple that occurs from the inductor current to the output being discontinuous. They provide a good approximation to the ripple at any significant load current but underestimate the output voltage ripple at very light loads where the output voltage ripple is dominated by the inductor current ripple. In addition to the output voltage ripple generated across the output capacitance, there is also output voltage ripple produced across the internal resistance of the output capacitor. The ESR-generated output voltage ripple is proportional to the series resistance of the output capacitor and is given by the following expressions where RESR is

31141fa

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LTC3114-1 APPLICATIONS INFORMATION the series resistance of the output capacitor and all other terms as previously defined. ∆VP-P(BUCK) =

ILOADRESR ≅I R Volts 1– tLOW f LOAD ESR

∆VP-P(BOOST) =

V  ILOADRESRVOUT ≅ILOAD RESR  OUT  Volts VIN (1– tLOW f )  VIN 

In most LTC3114-1 applications, an output capacitor between 10µF and 22µF will work well. Input Capacitor Selection The PVIN pin carries the full inductor current and provides power to internal control circuits in the IC. To minimize input voltage ripple and ensure proper operation of the IC, a low ESR bypass capacitor with a value of at least 6.8µF should be located as close to the pin as possible. The traces connecting this capacitor to PVIN and the ground plane should be made as short as possible. The VIN pin provides power to the LDO regulator and other internal circuitry. If the PCB trace connecting PVIN to VIN is long, it is recommended to add an additional small 0.1µF bypass capacitor near the VIN pin. When powered through long leads or from a high ESR power source, a larger value bulk input capacitor may be required. In such applications, a 47µF to 100µF electrolytic capacitor in parallel with a 1µF ceramic capacitor generally yields a high performance, low cost solution. Recommended Input and Output Capacitors The capacitors used to filter the input and output of the LTC3114-1 must have low ESR and must be rated to handle the large AC currents generated by the switching converters. This is important to maintain proper functioning of the IC and to reduce output voltage ripple. There are many capacitor types that are well suited to these applications including multilayer ceramic, low ESR tantalum, OS-CON and POSCAP technologies. In addition, there are certain types of electrolytic capacitors such as solid aluminum organic polymer capacitors that are designed for low ESR and high AC currents and these are also well suited to some LTC3114-1 applications. Table 2 provides a partial listing of appropriate capacitors to use with the LTC3114‑1.

Table 2. Representative Bypass and Output Capacitors MANUFACTURER, PART NUMBER

VALUE (µF)

VOLTAGE (V)

SIZE L × W × H (mm), TYPE, ESR

AVX 12103D226MAT2A

22

25

3.2 × 2.5 × 2.79 X5R Ceramic

TPME226K050R0075

22

50

7.3 × 4.3 × 4.1 Tantalum, 75mΩ

Kemet C2220X226K3RACTU

22

25

5.7 × 5.0 × 2.4 X7R Ceramic

A700D226M016ATE030

22

16

7.3 × 4.3 × 2.8 Alum. Polymer, 30mΩ

Murata GRM32ER71E226KE15L

22

25

3.2 × 2.5 × 2.5 X7R Ceramic

Nichicon PLV1E121MDL1

82

25

8 × 8 × 12 Alum. Polymer, 25mΩ

Panasonic ECJ-4YB1E226M

22

25

3.2 × 2.5 × 2.5 X5R Ceramic

Sanyo 25TQC22MV

22

25

7.3 × 4.3 × 3.1 POSCAP, 50mΩ

16TQC100M

100

16

7.3 × 4.3 × 1.9 POSCAP, 45mΩ

25SVPF47M

47

25

6.6 × 6.6 × 5.9 OS-CON, 30mΩ

Taiyo Yuden UMK325BJ106MM-T

10

50

3.2 × 2.5 × 2.5 X5R Ceramic

TMK325BJ226MM-T

22

25

3.2 × 2.5 × 2.5 X5R Ceramic

TDK KTJ500B226M55BFT00

22

50

6.0 × 5.3 × 5.5 X7R Ceramic

C5750X7R1H106M

10

50

5.7 × 5.0 × 2.0 X7R Ceramic

CKG57NX5R1E476M

47

25

6.5 × 5.5 × 5.5 X5R Ceramic

Vishay 94SVPD476X0035F12

47

35

10.3 × 10.3 × 12.6 OS-CON, 30mΩ

The choice of capacitor technology is primarily dictated by a trade-off between size, leakage current and cost. In backup power applications, the input or output capacitor might be a super or ultra capacitor with a capacitance value measuring in the Farad range. The selection criteria in these 31141fa

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21

LTC3114-1 APPLICATIONS INFORMATION applications are generally similar except that voltage ripple is generally not a concern. Some capacitors exhibit a high DC leakage current which may preclude their consideration for applications that require a very low quiescent current in Burst Mode operation. Ceramic capacitors are often utilized in switching converter applications due to their small size, low ESR and low leakage currents. However, many ceramic capacitors intended for power applications experience a significant loss in capacitance from their rated value as the DC bias voltage on the capacitor increases. It is not uncommon for a small surface mount capacitor to lose more than 50% of its rated capacitance when operated near its maximum rated voltage. This effect is generally reduced as the case size is increased for the same nominal value capacitor. As a result, it is often necessary to use a larger value capacitance or a higher voltage rated capacitor than would ordinarily be required to actually realize the intended capacitance at the operating voltage of the application. X5R and X7R dielectric types are recommended as they exhibit the best performance over the wide operating range and temperature of the LTC3114-1. To verify that the intended capacitance is achieved in the application circuit, be sure to consult the capacitor vendor’s curve of capacitance versus DC bias voltage. Programming Custom VIN Turn-On and Turn-Off Thresholds

approximately 8.33% of the programmed turn-on threshold level given in the previous equation. Bootstrapping the LDO Regulator The high and low side gate drivers are powered through the PLDO rail, which is generated from the input voltage, VIN, through an internal linear regulator. In some applications, especially at high input voltages, the power dissipation in the linear regulator can become a major contributor to thermal heating of the IC. The Typical Performance Characteristics section of this data sheet provides data on the LDO/PLDO current and resulting power loss versus VIN and VOUT. A significant performance advantage can be attained in applications where converter output voltage (VOUT) is programmed to 5V, if VOUT is used to power the LDO/PLDO rails. Powering the LDO/PLDO rails in this manner is referred to as bootstrapping. This can be done by connecting a Schottky diode from VOUT to LDO/PLDO as shown in Figure 5. With the bootstrap diode installed, the gate driver currents are supplied by the buck-boost converter at high efficiency rather than through the internal linear regulator. The internal linear regulator contains reverse blocking circuitry that allows LDO/PLDO pins to be driven slightly above their nominal regulation level with only a very slight amount of reverse current. Please note that the bootstrapping supply (either VOUT or a separate regulator) must be limited to less than 5.7V.

With the addition of an external resistor divider connected to the input voltage as shown in Figure 3, the RUN pin can be used to program the input voltage at which the LTC3114-1 is enabled and disabled. For a rising input voltage, the LTC3114-1 is enabled when VIN reaches the threshold given by the following equation, where R1 and R2 are the values of the resistor divider resistors specified in kΩ:

 R1+R2  VTH(RISING) = 1.2  Volts  R2 

Once the IC is enabled, it will remain so until the input voltage drops below the comparator threshold by the hysteresis voltage of approximately 100mV, measured on the RUN pin. Therefore, the amount of hysteresis is

22

PVOUT

VOUT

LTC3114-1 LDO PLDO 4.7µF

31141 F05

Figure 5. Bootstrapping PLDO and LDO

Average Output Current Limit Programming The LTC3114-1 includes an average output current programming feature that transforms the LTC3114-1 into a wide voltage compliance range, high efficiency, constant current source. A resistor from PROG to ground programs the desired level of average output current up to 1A. Potential uses include high brightness LED driving and constant current battery or capacitor charging. 31141fa

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LTC3114-1 APPLICATIONS INFORMATION



IOUT(AVG) ≅ 25,000 •

1V RPROG

The gain of 25,000 is generated internal to the LTC3114‑1 and is factory trimmed to provide the best accuracy at 500mA of output current. The accuracy of the programmed output current is best at the high end of the range as the residual internal current sense amplifier offset becomes a smaller percentage of the total current sense signal amplitude with increasing current. The provided electrical specifications define the PROG pin current accuracy over a range of output currents. Selecting the capacitor, CPROG, to put in parallel with RPROG is a trade-off between response time, output current ripple and interaction with the normal output voltage control loop. In general, if speed is not a concern as is the case for most current sourcing applications, then CPROG should be made at least 3 times higher than the voltage error amplifier compensation capacitor, CP1, described in the Compensation section of this data sheet. This will ensure minimal to no interaction when the transition occurs between voltage regulation mode and output current regulation mode. In current sourcing applications, the maximum output compliance voltage of the LTC3114-1 is set by the voltage error amplifier dividers resistors as it is for standard voltage regulation applications. For LED drivIng applications, select the VOUT divider resistors for a clamping level 1V

to 2V higher than the expected forward voltage drop of the LED string. The average output current circuitry can also be used to monitor, rather than control the output current. To do this, select an RPROG value that will limit the voltage on the PROG pin to 0.8V or less at the highest output current expected in the application. Connect a 20k resistor and 33nF capacitor from PROG to ground if the function is not going to be used to provide a higher level of protection against inadvertent short-circuit conditions on VOUT. Compensation of the Buck-Boost Converter The LTC3114-1 utilizes average current mode control to regulate the output voltage. Average current mode control has two loops that require frequency compensation, the inner average current loop and the outer voltage loop. The compensation for the inner average current loop is fixed within the LTC3114-1 in order to provide the highest possible bandwidth over the wide operating range of the LTC3114-1. Therefore, the only control loop that requires compensation design is the outer voltage loop. As will be shown, compensation design of the outer loop is similar to the techniques used in well known peak current mode control devices. The LTC3114-1 utilizing average current mode control can be conceptualized in its simplest form as a voltagecontrolled current source (VCCS), driving the output load formed primarily by RLOAD and COUT, as shown in Figure 6. The error amplifier output (VC), provides the command input to the VCCS. The full-scale range of VC is 0.865V (135mV to 1V). With a full-scale command on VC, VOLTAGE CONTROLLED CURRENT SOURCE

+ –

VOUT VOLTAGE ERROR AMP gm

+ –

A simplified diagram of the average output current programming circuitry is shown in the Block Diagram. An internal sense resistor, RS, and low offset amplifier directly measure current in the VOUT path and produce a small fraction of this current out of the PROG pin. Accordingly, a resistor and filtering capacitor connected from PROG to ground produce a voltage proportional to average output current on PROG. An internal transconductance amplifier compares the PROG voltage to the fixed 1V internal reference. If the PROG voltage tries to exceed the 1V reference level, this amplifier will pull down on VC and take command of the PWM. As described earlier, VC is the current command voltage, so limiting VC in this manner will also limit output current. The resulting average output current is given by the following equation:

FB 1V

RTOP 1.7M RBOT 100k

COUT 22µF RCOSER 0.01Ω

RLOAD 18Ω

VC gm = 1.7A/0.865V

1V

GND

RZ

CP2

CP1

31141 F06

Figure 6. Simplified Representation of Average Current Mode Control Loop 31141fa

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23

LTC3114-1 APPLICATIONS INFORMATION the LTC3114-1 buck-boost converter will generate an average 1.7A of inductor current (typical) from the converter for a transconductance gain of 1.97A/V. Similar to peak current mode control, the inner average current mode control loop effectively turns the inductor into a current source over the frequency range of interest, resulting in a frequency response from the power stage that exhibits a single pole (–20dB/decade) roll off. The output capacitor (COUT) and load resistance (RLOAD) form the normally dominant low frequency pole and the effective series resistance of the output capacitor and its capacitance form a zero, usually at a high enough frequency to be ignored. A potentially troublesome right half plane zero (RHPZ) is also encountered if the LTC3114-1 is operated in boost mode. The RHPZ causes an increase in gain, like a zero, but a decrease in phase, like a pole. This will ultimately limit the maximum converter bandwidth that can be achieved with the LTC3114-1. The RHPZ is not present when operating in buck mode. The overall open loop gain at DC is the product of the following terms: Voltage Error Amp Gain: gm • RO = 120µs • 3.6M = 432V/V (not adjustable) Voltage Divider Gain:

VFB 1V = VOUT VOUT (determined by the application, VFB is the reference voltage for the voltage error amplifier)

Current Loop Transconductance:

GC =

Load Resistance (RLOAD) (determined by the application) The frequency dependent terms that affect the loop gain include: Output Load Pole(P1): 2π •RLOAD •COUT

(application dependent)



Error Amplifier Compensation (2 Poles and 1 Zero): These are the design variables available

24

Current Amplifier Compensation Components (Fixed Internal to the LTC3114-1) The internal current amplifier and inner current loop have a much higher bandwidth than the overall loop, however, unlike an ideal VCCS with a flat gain versus frequency characteristic, the inner loop exhibits gain peaking in the range of approximately 2kHz to 20kHz that is an artifact of the fixed current amplifier compensation. This gain peaking has the effect of pushing out the overall loop crossover frequency, while providing some phase margin boost as well. As long as there is sufficient margin between the loop crossover frequency and the worst-case RHPZ frequency, then stable operation over all conditions is relatively easy to achieve. The design parameters for compensation design will focus on the series resistor and capacitors connected from VC to ground (RZ, CP1 and CP2). The general goal is to provide a phase boost using the compensation network zero in order to maximize the bandwidth and phase margin of the converter. Being a buck-boost converter, the target loop crossover frequency for the compensation design will be dictated by the highest boost ratio and load current that is expected as this will result in the lowest RHPZ frequency. An illustrative example is provided next that will derive the compensation components for a typical LTC3114-1 application. Compensation Example

1.7A = 1.97A/V (not adjustable) 0.865V

1

Right Half Plane Zero (RHPZ): boost mode only (determined by maximum load, VIN, VOUT and inductor)

This section will demonstrate how to derive and select the compensation components for a typical LTC3114-1 application. Designing compensation for other applications is simply a matter of substituting different values in the equations provided and reviewing the Bode plots, making minor adjustments as needed. Since the compensation design procedure uses a simplified model of the LTC3114-1, the results from the following compensation design should always be verified with time domain step load response tests to validate the effectiveness of the compensation design. It is assumed that the value and type of output capacitor will 31141fa

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LTC3114-1 APPLICATIONS INFORMATION be selected based on the guidelines provided elsewhere in this data sheet. Particular attention needs to be paid to the voltage bias effect on ceramic capacitors typically used for output bypassing. Similarly, it is assumed that the inductor value and current rating has been selected as well based on the application requirements.

The system poles and zeros are as follows: Output Load Pole (P1) =

2π •RLOAD •COUT

;

buck mode, where RLOAD = output resistance. In boost mode this equation is slightly different:

Example Application Details:

2

(2π •RLOAD •COUT ) ′

VIN = 9V to 36V VOUT = 12V

,

but with the reduced output current capability in boost (higher RLOAD), the load pole location is about the same.

Maximum IOUT (boost mode) = 700mA, RLOAD (min) = 12V/0.7A = 17.1Ω

1 ; (2π •REA •CC )

Maximum IOUT (buck mode) = 1A, RLOAD (min) = 12Ω

Error Amp Pole (P2) =

COUT = 44µF

this pole is very close to DC, REA = error amp output resistance, which is approximately 3.6MΩ. It has no impact on the compensation design, but is included here for completeness.

L = 10µH Since this application includes boost mode operation, the first step is to calculate the worst-case RHPZ frequency as this will dictate the maximum loop bandwidth for the converter: RHPZ(f) =

VIN2 •RLOAD (Hz) VOUT 2 • 2π •L

substituting the values mentioned earlier yields: RHPZ(f) =

1

9V 2 •17.1Ω 12V 2 • 2π •10µH

= 153.1kHz

In order to account for internal IC component variations, it is good practice to set the converter bandwidth or crossover frequency at least three times lower than the RHPZ frequency to avoid excessive phase loss from the RHPZ when operating in boost mode. In some instances such as higher output voltage applications, an even greater separation between the loop crossover frequency and the RHPZ frequency may be necessary. In this example design, we’ll plan to achieve a loop bandwidth (fCC) of 29kHz or approximately one-fifth the RHPZ frequency.

1 ; (2π •RZ •CP1) RZ and CP1 are the error amp compensation components that will be selected.

Compensation Zero (Z1) =

Ignoring very high frequency output capacitor ESR zero and secondary high frequency error amp pole, the system has two poles and one zero. The error amp pole (P2) is always near DC and we have little influence on it. The output load pole (P1) will move depending on buck-boost converter load resistance. The highest frequency for P1, the output load pole, is at maximum load current (minimum RLOAD). If we design the error amp zero (Z1) frequency so that it coincides with P1(max), then we will get the maximum phase benefit from the compensation network at full load and enough phase boost at lighter loads for stable operation and a single pole response where the loop crosses zero dB. Assuming the error amp zero is designed as just described, at frequencies above P2 (and Z1), the closed-loop gain of our system simplifies to:

GCL =

GCS •RLOAD • gm •R Z VOUT 31141fa

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25

LTC3114-1 APPLICATIONS INFORMATION where: GCS is the inner current loop closed-loop transconductance = 1.97A/V RLOAD is the minimum load resistance in ohms gm is the transconductance of the error amplifier, 120µS RZ is the compensation zero setting resistor (one of our design variables) VOUT is the output voltage Our desired closed-loop frequency (fCC) defined earlier is 29kHz. Assuming that we have a single pole response in our system, we can express the ratio of the closed-loop crossover frequency to fP1 in the buck mode of operation as follows:

fCC GCS •RLOAD • gm •R z = fP1 VO



fCC • VOUT • 2π •COUT GCS • gm

As mentioned previously, we will place the zero at frequency P1, yielding:



fCC′ =

fCC • ( α ), where α = 0.42 3

R •C 1 or more simply, LOAD OUT 2π •R Z • fP1 RZ

where Rl is the minimum load resistance in buck mode, 12Ω in this example. Quickly substituting our values in the above equations yields:

29kHz • ( 0.42) = 4.06kHz 3

Using the new value of fCC′ in the previous equations for RZ and CC yields: RZ =

It’s important to note that the value of RZ is proportional to the overall crossover frequency, fCC. If we later want to adjust fCC lower, for example, RZ can be lowered in value and CP1 increased proportionally to keep the compensation zero at the same frequency.

CP1 =



fCC′ =

So, in our example, this results in:

We can now calculate RZ by rearranging the previous equation: RZ =

If the inner current loop were an ideal VCCS, then the previously derived compensation would be sufficient to stabilize the converter. However, the inner current loop utilizes an operational amplifier with an integral compensation network, which contributes an additional zero and pole in the power stage response, the gain peaking, as described previously. The effect of the additional zero/pole pair pushes out fCC, our crossover frequency, beyond what was predicted by the previous calculations. A simplified approach to calculating our compensation components then is to re-use the previous equations but scale fCC, the cross over frequency, by a scaling factor (α), which will account for the gain boost present in the system:

4.06kHz•12V • 2π • 44µF 1.97A 120µA • V V

R Z = 56.9kΩ, use 56.2kΩ CP1 =

12Ω • 44µF 56.2k

CP1 = 9.4nF, use 10nF CP2 is usually chosen to be a small value around 10pF as it is meant to filter out high frequency switching frequency related components. Keep in mind that this analysis assumes that the zero provided by the output capacitor and its ESR is at a frequency much higher than fCC.

RZ = 407k, CP1 = 1.3nF, but please continue reading as this is not the final answer.

26

31141fa

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LTC3114-1 TYPICAL APPLICATIONS 9V to 36V VIN to 12V VOUT Regulator 10µH 68nF

VIN 9V TO 36V

SW1 SW2 BST2 BST1 LTC3114-1 VIN PVOUT

10µF

33nF

PVIN RUN PROG MODE

20k

GND

LDO PLDO

68nF

FB VC PGND

2M

4.7µF

10nF 10pF

VOUT 12V AT 1A, VIN > 12V 44µF 12V AT 0.7A, VIN > 9V

182k

56.2k 31141 TA02a

INDUCTOR: WÜRTH 744 065 100

Efficiency vs Input Voltage 95

Load Step Response

ILOAD = 350mA

94

EFFICIENCY (%)

93

LOAD CURRENT 500mA/DIV

92 91 90

VOUT 200mV/DIV

89 88

VIN = 15V 100mA to 700mA

87 86 85

8

12

16

20 24 28 32 INPUT VOLTAGE (V)

36

1ms/DIV

31141 TA02c

40

31141 TA02b

31141fa

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27

LTC3114-1 TYPICAL APPLICATIONS 6V to 40V VIN to 24V VOUT Regulator 15µH 68nF

VIN 6V TO 40V

SW1 SW2 BST2 BST1 LTC3114-1 VIN PVOUT

10µF

33nF

PVIN RUN PROG MODE

20k

GND

LDO PLDO

68nF

2M

4.7µF

FB VC PGND

10nF 10pF

VOUT 24V AT 1A, VIN > 24V 22µF 24V AT 0.2A, VIN = 6V

86.6k

39.2k 31141 TA03a

INDUCTOR: WÜRTH 744 066 150

Efficiency vs Load Current 95 90

12V VIN Synchronous Boost Operation with Inrush Current Limiting at Start-Up and Output Disconnect in Shutdown

VIN = 12V

85

RUN PIN 2V/DIV

EFFICIENCY (%)

80 75

INPUT CURRENT 1A/DIV

70 65

VOUT 10V/DIV

60 55 50

10ms/DIV

31141 TA03c

45 40 0.1

1

10 100 LOAD CURRENT (mA)

1000 31141 TA03b

28

31141fa

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LTC3114-1 TYPICAL APPLICATIONS Constant Current/Constant Voltage Lead-Acid Battery Charger VBATT FLOAT LEVEL –30°C 14.5V 0°C 14.03V 25°C 13.8V 50°C 13.48V

6.8µH 68nF

VIN 2.7V TO 40V

33nF

10µF

24.9k

SW1 SW2 BST2 BST1 LTC3114-1 VIN PVOUT PVIN RUN PROG MODE GND

LDO PLDO FB VC PGND

68nF D1

2M

4.7µF NTC 68k

44µF

220k

10nF 56.2k

+

1A CONSTANT CHARGING CURRENT WHEN BELOW FLOAT LEVEL 6-CELL LEAD-ACID BATTERY 31141 TA04a

164k

TEMPERATURE COMPENSATION

NTC: VISHAY NTCS0603E3683 HT 68k NOMINAL AT 25°C INDUCTOR: COILCRAFT MSS1048-682NL D1: ON SEMI MBRS260T3G

31141fa

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29

LTC3114-1 TYPICAL APPLICATIONS Constant Current High Brightness LED Driver 15µH 68nF

VIN 9V TO 40V

500mA: R1 = 49.9k 350mA: R1 = 71.5k ADJUST R1 FOR DIMMING

SW1 SW2 BST2 BST1 LTC3114-1 VIN PVOUT

10µF

PVIN RUN

LDO PLDO FB VC

PROG MODE

R1 71.5k

GND

3.3nF

PGND

68nF

500mA CONSTANT CURRENT, VIN > 11V 350mA CONSTANT CURRENT, VIN > 9V CONSTANT CURRENT DOWN TO 2V

D1

4.7µF

0.47µF

44µF

1M

71.5k

31.6k 31141 TA05a

VOLTAGE DIVIDER LIMITS VOUT TO 15V IN CASE OF OPEN LED

INDUCTOR: WÜRTH 744 066 150 D1: ON SEMI MBRS260T3G

Efficiency vs Input Voltage, 350mA Drive Current 95 94

EFFICIENCY (%)

93 92 91 90 89 88 87 86 85

8

12

16

20 24 28 32 INPUT VOLTAGE (V)

36

40

31141 TA05b

30

31141fa

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LTC3114-1 PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

DHC Package 16-Lead Plastic DFN (5mm × 3mm)

(Reference LTC DWG # 05-08-1706 Rev Ø)

0.65 ±0.05 3.50 ±0.05

1.65 ±0.05 2.20 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 4.40 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 5.00 ±0.10 (2 SIDES) R = 0.20 TYP 3.00 ±0.10 (2 SIDES)

9

R = 0.115 TYP

0.40 ±0.10 16

1.65 ±0.10 (2 SIDES)

PIN 1 TOP MARK (SEE NOTE 6)

PIN 1 NOTCH

0.200 REF

0.75 ±0.05

0.00 – 0.05

8

1 0.25 ±0.05 0.50 BSC

(DHC16) DFN 1103

4.40 ±0.10 (2 SIDES) BOTTOM VIEW—EXPOSED PAD

NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE

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31

LTC3114-1 PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

FE Package 16-Lead Plastic TSSOP (4.4mm)

(Reference LTC DWG # 05-08-1663 Rev J) Exposed Pad Variation BB 4.70 (.185) 3.58 (.141)

DETAIL A

4.90 – 5.10* (.193 – .201)

0.56 (.022) REF

3.58 (.141)

NOTE 5

16 1514 13 12 1110

9

NOTE 5

6.60 ±0.10

2.94 3.05 (.116) (.120)

4.50 ±0.10

DETAIL A

SEE NOTE 4

2.94 6.40 (.116) (.252) BSC

0.53 (.021) REF DETAIL A IS THE PART OF THE LEAD FRAME FEATURE FOR REFERENCE ONLY NO MEASUREMENT PURPOSE

1.05 ±0.10 0.65 BSC

0.45 ±0.05 1 2 3 4 5 6 7 8

RECOMMENDED SOLDER PAD LAYOUT

4.30 – 4.50* (.169 – .177)

0.09 – 0.20 (.0035 – .0079)

0.25 REF

0.50 – 0.75 (.020 – .030)

NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT

32

1.10 (.0433) MAX 0° – 8°

0.65 (.0256) BSC

0.195 – 0.30 (.0077 – .0118) TYP

0.05 – 0.15 (.002 – .006) FE16 (BB) TSSOP REV J 1012

5. BOTTOM EXPOSED PADDLE MAY HAVE METAL PROTRUSION IN THIS AREA. THIS REGION MUST BE FREE OF ANY EXPOSED TRACES OR VIAS ON PBC LAYOUT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE

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LTC3114-1 REVISION HISTORY REV

DATE

DESCRIPTION

PAGE NUMBER

A

11/14

Corrected Part Marking Table for TSSOP Package Option

2

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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of itsinformation circuits as described herein will not infringe on existing patent rights. For more www.linear.com/LTC3114-1

33

LTC3114-1 TYPICAL APPLICATION Wide VIN Range 5V, 1A Regulator with Bootstrapped LDO and Custom UVLO Threshold 6.8µH 68nF

VIN 3.75V TO 40V ON: VIN > 4V OFF: VIN < 3.75V

10µF

1.4M

SW1 SW2 BST1 BST2 LTC3114-1 VIN PVOUT PVIN RUN

LDO PLDO

68nF

4.7µF

IMPROVES EFFICIENCY AT HIGH VIN

BAT54

604k

10nF

20k

VOUT 5V AT 1A 30µF VIN > 5V 2M

FB VC

PROG MODE GND

PGND

499k

4700pF 27.4k

10pF 31141 TA06

INDUCTOR: WÜRTH 744 065 0068

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LTC3129-1

15.75V, 200mA Buck-Boost DC/DC Converter with 1.3µA IQ and Programmable Output Voltages

VIN: 2.42V to 15.75V, VOUT: Pin Programmable 2.5V to 15V, IQ = 1.3µA, ISD = 10nA, DFN and MS Packages

34

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Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC3114-1 (408) 432-1900 ● FAX: (408) 434-0507



www.linear.com/LTC3114-1

LT 1114 REV A • PRINTED IN USA

 LINEAR TECHNOLOGY CORPORATION 2014