Design for Linearizability of GaN Based Multi-Carrier Doherty Power Amplifier Through Bias Optimization Oualid Hammi
Sung-Chan Jung, Fadhel M. Ghannouchi
Electrical Engineering Department KFUPM Dhahran, Saudi Arabia
[email protected]
iRadio Lab., Electrical and Computer Engineering Department University of Calgary Calgary, Canada
Abstract—In this paper, a GaN based symmetrical Doherty power amplifier is designed. The Doherty amplifier bias conditions are optimized for a trade-off between power added efficiency and linearity. The carrier amplifier is biased for linearity and the peaking amplifier bias is chosen for maximum power added efficiency. Measurement results under a four carrier WCDMA drive signal show respectively 43% power added efficiency and –32.5dBc adjacent channel leakage ratio at 6dB output power back-off. Linearization of the designed Doherty PA using baseband digital predistortion led to quasi perfect cancellation of spectrum regrowth while operating at an output power back-off equal to the input signal’s peak to average power ratio.
I.
INTRODUCTION
Radiofrequency (RF) power amplifiers are considered among the most critical circuits in communication systems. In fact, the performance of the RF front-end both in terms of efficiency and linearity greatly depends on that of the power amplification stage. Power efficiency is highly sought to decrease the operating cost of base stations but also to reduce their carbon footprints especially with the global awareness and movement toward green communication systems. However, efficiency is still a second priority behind linearity. In fact, linearity is essential in order to avoid information loss and interference with adjacent channels. Accordingly, communication systems are designed to meet the linearity requirements with the highest possible efficiency. To enable highly efficient linear communication systems, Doherty power amplification circuits linearized using digital predistortion technique are the preferred choice that leads to the best trade-offs in terms of linearity and efficiency [1]-[4]. Doherty power amplifiers consist in using two amplifiers (carrier and peaking amplifiers) connected through a load modulation network to enable high efficiency at back-off levels where the amplifiers are intended to operate. Numerous research work have been reported on the optimization of the Doherty power amplifier (PA) for linearity and / or efficiency
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[5]-[10]. One approach that was considered relies on optimizing or adaptively controlling the bias conditions of the Doherty PA [7]-[10]. The bias optimization was performed only on the carrier amplifier to evaluate its influence on the Doherty amplifier linearity. In this paper, bias optimization based approach is proposed for the design of high efficiency predistortable Doherty power amplifier. The main contribution is that both linearity and power efficiency are taken into account in the bias optimization of the Doherty power amplifier. Moreover, this optimization is performed while the circuit is operated using multi-carrier modulated signals. The effects of the carrier and peaking amplifier biases on the linearity and efficiency of the Doherty power amplifier are successively investigated. The experimental results of the bias optimization as well as the performance of the final Doherty power amplifier are reported. Finally, digital predistortion technique was used to fully compensate for the distortions generated by the Doherty PA and recover its linearity. This paper is organized as follows. In Section II, the Doherty amplifier design along with the bias optimization is discussed. The digital predistortion algorithm and results are described in Section III. The conclusions are reported in Section IV. II.
DOHERTY AMPLIFIER DESIGN
A symmetrical Doherty power amplifier operating around 2140 MHz was designed using a 10W GaN HEMT transistor. A schematic of the manufactured Doherty PA is presented in Figure 1. In this prototype, equal power splitting is performed at the input of the Doherty power amplifier. Both the carrier and peaking amplifiers were designed using the same matching network since the load-pull contours of the device do not vary significantly with the bias conditions. Equal offset lines are used at the output of the carrier and peaking amplifiers. The offset line at the output of the peaking amplifier is used to ensure quasi open circuit output reflection
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coefficient at low input power drive. To compensate for the phase offset between the carrier amplifier path and that of the peaking amplifier introduced by the use of this offset line, an identical offset line is also used at the output of the carrier amplifier. A conventional Doherty output network is used to combine the output signals of both amplifiers.
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Fig. 1. Schematic of the designed power amplifier. 50
First, the peaking amplifier was biased at pinch-off and the gate voltage of the carrier amplifier was swept. The measurement results are reported in Figure 2. This includes the measured adjacent channel leakage ratio (ACLR) at 5MHz away from the centre frequency of the outer WCDMA carriers (carrier#1 and carrier#4) as well as the power added efficiency. This figure shows that the bias condition of the carrier amplifier affects the linearity of the Doherty PA but not its efficiency. Accordingly, the bias point of the carrier amplifier was chosen to be 200mA. In fact, for this bias condition, the ACLR of the Doherty amplifier is found to be better than –30dBc for OPBO value of –7dB and lower. This is the power range in which the amplifier will be operating when driven by WCDMA signals that typically have peak to average power ratio (PAPR) of 7dB or higher. The choice of –30dBc ACLR level threshold is to ensure the linearizability of the Doherty amplifier after optimization of the peaking amplifier bias which is expected to introduce additional nonlinearity.
Power Added Efficiency (%)
Then, the performance of the Doherty amplifier prototype was optimized by controlling the biases of the carrier and peaking transistors. The performance optimization objective was to reach a trade-off between linearity and power efficiency that consists in maximizing the efficiency of the Doherty amplifier without compromising its linearizability. This optimization was performed with a four-carrier WCDMA input signal. In fact, this type of performance optimization is usually performed when the amplifier is driven by a continuous wave (CW) input signal. However, the nonlinear behavior of the amplifier considerably depends on its input signal [11]. Thus, the optimization of the performance under a CW test signal does not provide valuable and reliable information about the amplifier’s behavior under a modulated test signal.
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(b) Fig. 2. Measured performance of the Doherty amplifier vs. bias of the carrier amplifier. (a) ACLR, (b) PAE.
In the second step, the bias of the peaking amplifier was varied for several class C operation conditions. For each bias point, the Doherty PA performances including the ACLR and the power added efficiency were measured with the fourcarrier WCDMA signal. Figure 3 presents the measurement results. This demonstrates the effect of the peaking amplifier bias on the overall efficiency of the Doherty PA. In fact, up to 8% improvement in the power added efficiency is observed following the optimization of the peaking amplifier’s bias. Similarly, the measured ACLR curves illustrate the dependency of the Doherty amplifier linearity on the bias of the peaking amplifier. Such dependency is partially attributed to the variation of the AM/AM and AM/PM characteristics of the peaking amplifier as a function of the bias point. Following these measurements, the gate bias of the peaking amplifier was set to -3.40V. Among the measured bias conditions, this setting leads to the best power added
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efficiency while maintaining an overall linearity in the range of –30dBc in the above considered output power range.
ACLR (dBc)
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Consequently, the designed Doherty amplifier was biased for a drain current of 200mA for the carrier amplifier, and a gate voltage of –3.40V for the peaking amplifier. The performance of the Doherty amplifier was then compared to that of a balanced amplifier. The measurement results of the power added efficiency and the ACLR performance under the four-carrier WCDMA signal are reported in Figure 4. This figure demonstrates the advantage of the Doherty amplifier over the balanced amplifier both in linearity and power efficiency. Indeed, the power added efficiency is increased by more than 10% in the –7 to –13dB OPBO power range. The linearity improvement is in the range of few dBs over the useful power range.
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Fig. 3. Measured performance of the Doherty amplifier vs. bias of the peaking amplifier. (a) ACLR, (b) PAE.
(b) Fig. 4. Measured performance of the Doherty amplifier vs. balanced amplifier. (a) ACLR, (b) PAE.
III.
DOHERT AMPLIFIER LINEARIZATION USING BASEBAND DIGITAL PREDISTORTION
The Doherty power amplifier was designed for linearizability by ensuring better than –30dBc ACLR over the useful power range (up to –6dB OPBO). In this section, memory polynomial based baseband digital predistortion is applied to linearize the Doherty PA. First, the instantaneous AM/AM and AM/PM characteristics of the Doherty PA were measured under multi-carrier WCDMA input signals using a complex baseband input and output waveforms measurement
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system (vector signal generator and vector signal analyzer) [12]. The digital predistortion function was then identified and applied to the DUT. The memory polynomial predistortion function used is given by: M
N
y ( n ) = ∑∑ aij ⋅ x ( n − i ) ⋅ x ( n − i )
j
i = 0 j =0
where x ( n ) and y ( n ) are respectively the predistorter’s input and output waverform samples. The predistorter’s parameters M and N are respectively the memory depth and the nonlinearity order. The measured spectra at the output of the Doherty PA before and after applying the digital predistortion function are reported in Figure 5. For these test, a four-carrier WCDMA input signal having 11.4dB PAPR was used. The measurements were performed at an output power back-off level equal to the signal’s PAPR in order to drive the amplifier up to its peak power capabilities. The ACLR obtained after applying the digital predistortion function was –53dBc with a quasi perfect cancellation of the spectrum regrowth observed at the output of the Doherty power amplifier prior to linearization. 40
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Fig. 5. Measured spectra at the output of the PA before and after linearization.
IV.
CONCLUSION
frequency band. The design of the Doherty PA and its optimization were performed while maintaining –30dBc ACLR measured under a multi-carrier WCMDA signal over the useful input power range (–6 to –20dB OPBO). This led to 44% power added efficiency at 6dB OPBO. Digital predistortion technique was then applied to linearize the Doherty PA under multi-carrier WCDMA signals. Quasi-total cancellation of spectrum regrowth was obtained. –53dBc ACLR were obtained for four-carrier WCDMA input signal at an OPBO equal to the signal’s PAPR. REFERENCES [1]
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In this paper, a 10-Watt GaN based Doherty power amplifier was designed for operation in the 2100 UMTS
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