Diode-clamped Multilevel Voltage Source Converter for Medium

Diode-clamped Multilevel Voltage Source Converter for Medium Voltage Dynamic Voltage Restorer P. Boonchiam and N. Mithulananthan

Abstract— This paper proposes multilevel voltage source converter based medium voltage dynamic voltage restorer. Three multilevel voltage source converters, namely diode-clamped, flying capacitor and cascaded H-bridge are compared. These topologies are well suited for high-power, high-voltage level and low harmonic. This paper also discusses the development of power semiconductors, modulation scheme and methodology to control the dynamic voltage restorer. These multilevel converters can feed power into distribution system with only one dc-link energy storage. The design of passive components of LC output filter, modulation strategies and control of dynamic voltage restorer are also presented. Simulation results show performance of dynamic voltage restorer and verify the validity of the proposed topology of diode-clamped multilevel voltage source converter for medium voltage dynamic voltage restorer. Keywords— dynamic voltage restorer, multilevel voltage source converter, voltage sags 1

conventional topologies [4].

1. INTRODUCTION

However, the use of VSC in utility application has been limited because of the limited power rating of self-commutated switches when used in two-level voltage source inverter. The multilevel VSC is proposed in recent years as they can avoid the power barrier by using a modular approach in which switching devices are stacked together, in almost an unlimited fashion. The number of inverter “voltage level” is proportional to the number of dc bus capacitor tap points [1]. As more voltage levels are added to the inverter, the harmonic performance improves without increased switching losses. Hence, in this paper a multilevel VSC, namely diode clamped voltage source converter, based dynamic voltage restorer (DVR), is proposed for high voltage distribution system applications.

Application of multilevel voltage source converter (VSC) is becoming popular in power and energy systems as results of its high power density, excellent performance and high reliability. Some of the conventional and emerging applications of VSC include flexible AC transmission system (FACTS), custom power devices and distributed energy system (e.g. Photovoltaic, Wind, Micro turbine) in transmission and distribution systems, respectively [1]. The application of VSC in custom power devices and distributed energy system are the recent developments that going to change the entire distribution system in many ways. Custom power devices are introduced in the distribution system to deal with various power quality problems faced by industrial and commercial customers due to increase in sensitive loads such as computer and adjustable speed drives and use of programmable logic control in the industrial process. These power quality problems could range from simple flicker to long duration power interruptions. When the problems occur the associated costs, including downtime, defects, and loss of production, can be substantial [2]. Among various power quality problems, voltage sags are more serious as they can cause customer equipment to malfunction or a production shutdown. Voltage sags may be caused by remote faults, or change in loading conditions, such as motor starting and energizing capacitor or transformer [3]. The voltage sags could last as little as a few cycles, still can affect several sensitive loads such as adjustable speed drives and programmable logic controllers. As the durations of voltage sag are so short, conventional voltage control methods such as tap changing transformers or capacitors with controls are not effective. Fast, more flexible voltage control methods are needed and power electronic system based power semiconductor devices can be used. An effective way of controlling the sags is to inject power into the system using custom power devices. Ideally, the systematic power needed for voltage control could be synthesized using a voltage-sourced inverter with small reactive component. An inverter-based compensator could have higher performance, small size, lower cost, and lower harmonic than the

Paisan Boonchiam is with the Energy field of study, Asian Institute of Technology, P.O. Box 4, Klong Luang, Pathumthani 12120, Thailand. email [email protected] Nadarajah Mithulananthan is with the Energy field of study, Asian Institute of Technology, P.O. Box 4, Klong Luang, Pathumthani 12120, Thailand. email [email protected]

Rest of the paper is organized as follows. A brief history on the development of power semiconductor devices that are used in custom power devices, especially in DVR, is presented in Section II. Section III compares three types of multilevel VSC topologies that can be used for DVR applications. Multi-carrier pulse width modulation scheme that is suitable for the proposed DVR topology is presented Section IV. Section V carries a brief description of design of output LC filter under practical condition. Some interesting simulation results of the proposed DVR are presented along with a discussion in Section VI. Finally, the major contributions and conclusions of the work are summarized in Section VII.

2. DEVELOPMENT OF POWER ELECTRONICS The rating of power semiconductor device is important for power system applications due to the need of high voltage and high power level. At present, the voltage levels of distribution system range from 11 to 69 kV, but the highest nominal voltage of the semiconductor devices is only about 9 kV with a maximum nominal current of 8 kA [5]. Hence, there is a need for selection of appropriate power converter topology for the medium and high voltage applications. Figure 1 shows development of power semiconductor from 1980’s to present by representing their highest operating voltage and current. Power semiconductor devices based on switching operation can be classified as Insulated Gate Bipolar Transistor (IGBT), Gate Turn-off Thyristor (GTO), Insulated Gate Commutated Turn-off (IGCT), MOS Turn-off (MTO) and MOS Controlled Thyristor (MCT). In custom power applications, only three types of semiconductor can be used, namely IGBT, GTO, and GCT. GTO is the most popular device used in custom power devices, whereas IGCT is emerging due to its a lower losses capability comparing to others. IGBT can not be used in custom power since it has high losses than other devices [6].

Figure 2 shows pictures of power semiconductors used in the custom power devices.

Vfw / V

Ifw / A

10 kV

9000

GTO

MTO

8000

& IGCT

7000

GCT,MTO 150 mm 125 mm

6000

IGBT MCT

Vdc 4

8000

100 mm

GTO

4000

MCT Module

3000 77 mm

2000

IGBT Module

53 mm

Vdc 4

6000

3Vdc 4

4000

Vdc 2

Vdc 4

Vdc 4

3000

Vdc 2

2000 1000 500

1980 1985 1990 1995 2000 2005

Vdc 4

Vdc 2

7000 5000

5000

1000 500

diodes are connected to taps of dc bus capacitor. In medium voltage applications, dc bus voltage is so high therefore

N

Vdc 4

Vdc 4

Year

Fig. 1: Development of power semiconductor device.

(c) (b) (a) Fig. 3: One-leg five-level multilevel topologies. capacitors are connected in series. The DC-VSC generates different voltage levels for output voltage in the ranging between positive and negative of Vdc/2. The number of levels Nlevel is N level = ceil (N index )+1

(a) IGCT

(b) GTO

(c) IGBT

The symbol ceil(x) represents the ceiling number of x. The number of single capacitors NC is

Fig. 2: Power semiconductors devices. Many literatures [6-12] have shown the relative on-state losses of different semiconductors. It becomes obvious that IGCT and GTO are a much better choice for custom power devices because they have much lower on-state losses. IGBT is easy to implement the driver circuits for switching devices by using the voltage source but they still have a problem with onstate losses and rating of power devices. However, the switches can install in all applications of custom power depended on the rating of power and the zone of power distribution system.

3. MULTILEVEL VSC TOPOLOGIES During the last 10 years, there has been steady growth multilevel converter topology as they can suit for the high voltage and high power applications. Multilevel VSC are the attractive technology for the medium voltage application, which includes power quality and power conditioning applications in the distribution system. The most well-known multilevel topologies developed so far are shown in Fig. 3. These are diodeclamped multilevel voltage source converter (DC-VSC), flying capacitor multilevel voltage source converter (FC-VSC) and cascaded H-bridge multilevel voltage source converter (CHVSC) [8-10]. As can be seem from Fig. 3, different topologies use different solutions to expend the output voltage range up to several levels. These multilevel topologies can generate multilevel output voltages with low harmonics. In order to compare the different multilevel topologies, a quantity called Nindex is defined as given in (1). N index =

Vdc ,max VD ,max

(2)

(1)

Where Vdc,max is the maximum dc bus voltage and VD,max maximum nominal voltage requirement of the devices. A. DIODE-CLAMPED VSC (DC-VSC) Figure 3(a) depicts one leg circuit diagram of a five-level DC-VSC. This topology uses clamping diodes to limit dynamic and static overvoltage for switching devices. The clamping

N C = ceil ( N index )

(3)

and number of main switching devices is NSW = 2×ceil ( N index )

(4)

In contrast to main devices, the nominal voltage of the clamping diodes is higher than the voltage of one level. Therefore, it becomes necessary to place several diodes in series to achieve the required voltage. If rated voltage of a clamping diode equals rate voltage of the main switching devices, a Nlevellevel inverter leg needs the following number of clamping diodes. N D,Clamp = ( N level -1)( N level -2 )

(5)

However, in practice, more diodes are needed due to the voltage derating of the series connection of up to (Nlevel-2) diodes. This fact introduces practical problems such as parasitic inductances or package difficulties [14]. Consequently, some papers propose that, in DC-VSC, the number of levels should be limited to seven or nine levels maximum, in practical applications. B. FLYING-CAPACITOR VSC (FC-VSC) The circuit configuration of five level FC-VSC is shown in Fig.3(b). This topology also allows multilevel output voltages. Instead of diode clamping, voltage sharing is realized by floating additional capacitors. Capacitors voltages are chosen in such a way that the difference between two capacitors corresponds to the nominal voltage of the devices VN(t). Two capacitors with two switching devices are in single commutation cell. For a Nlevel-level inverter, the number of cell (Ncell) in one leg is: N cell =N level -1

(6)

The cell voltage could be VN(t) or 0, depending on the switching state of the two switching devices in a cell. Thus, the

output voltage of the inverter (VO(t)) is the sum of all cell voltages Vk(t). N cell

VO ( t ) = ∑ Vk ( t )

(7)

k =1

It is obvious, that there are more than one possibility to generate one specific output level. This redundancy could be used to limit the charging or discharging of a capacitor during one voltage level. It can be shown, that the maximum overvoltage is given by (8). Vˆmax =

I 0 max Ck N cell f SW

(8)

where Ck is the capacitance of clamping capacitors, I0max is the maximum output current and fsw is the switching frequency. Vˆmax is often defined as a percentage (ηx) of the maximum nominal voltage of the switching devices: Vˆmax = ηx ⋅ VD ,max

(9)

Therefore, the number of cells can be calculated: ⎛ VDC ,max ⎞ ⎛V ⎞ ⎛N ⎞ N cell = ceil ⎜ DC ,max ⎟ = ceil ⎜ ⎟⎟ = ceil ⎜ index ⎟ (10) ⎜V V (1 η ) (1-η ) − D x ⎠ x ⎠ ⎝ ⎠ ⎝ ⎝ D ,max

And the capacitance of the clamping capacitors can be determined for a specific maximum voltage deviation by substituting equations (10) and (8): Cmin =

(1 − ηx ) ⋅ I 0 max ηx ⋅ VDC ,max ⋅ f SW

(11)

Note that size of the capacitors depends not on the number of cells, but on the power characteristics of the converter. The flying capacitor topology is better for higher voltage and lower currents applications. In medium-voltage converters, the maximum voltage of a capacitor typically has the same voltage rating as semiconductor devices. This means that capacitors with higher voltage rating have to be unit by series connection of multiple single capacitors. As a consequence, the number of capacitor (NC) needed for the clamping capacitors, increases dramatically: 2 N C =1+2 2 +...+N cell =

However, the fact that the dc link voltage must be isolated is the major drawback for the application of these structures. Several independent dc power supplies are required, which can be provided either by a transformer with multiple isolated secondary or by several transformers. For electrical vehicles, batteries or fuel cells can also be used. In order to balance the power provided by the dc voltage sources, each cell can be used in a cyclic way throughout each semi-cycle of a line period. Another benefit of this circulating method is that it achieves the same switching frequencies for all of the devices. Table 1 summarizes the general characteristics of the three multilevel VSC topologies.

N cell (N cell +1)(2N cell +1) (12) 6

For example, the five-level FC-VSC needs 30 capacitors. In a medium voltage application with 20 kV dc bus voltage, maximum device operating voltage of 4 kV, 16% voltage deviation and 2000A output current the capacitors have to 0.525 mF and have to operate at 1 kHz switching frequency. The example shows, that floating capacitor topology is not practical for this application. C. CASCADED H-BRIDGE VSC (CH-VSC) The last circuit configuration shown in Fig. 3(c) is a five level CH-VSC. The circuit topology is a cascaded structure consisting of full bridge inverter units connected in series. Each unit is fed by a separate dc capacitor, loaded with the dc voltage (Vdc). No additional circuits to balance the voltage matching of the switching devices are necessary. The simplicity and modularity of this structure brings many practical effects.

Table 1-Characteristic of multilevel VSC.

DC-VSC n5level level A 6(n-1) 24 B 6(n-2) 18 C n-1 4 Vdc/ Vdc/4 D (n-1) E 2n-1 9 F n3 125

FC-VSC n5level level 6(n-1) 24 0 0 3n-5 10 Vdc/ Vdc/4 (n-1) 2n-1 9 23(n-1) 4096

CH-VSC n5level level 6(n-1) 24 0 0 3n/2-1.5 6 Vdc/ Vdc/4 (n-1) 2n-1 9 23(n-1) 4096

Where, A: Switches, B: diodes, C: capacitors, D: maximum voltage applies, E: line-to-line output voltage levels and F: states of the inverter (total vectors of output voltages). As can be seen from the table DC-VSC topology uses a low number of capacitors compared to other two topologies. Although this topology requires some additional clamping diodes, its low number of reactive components is usually preferred from the economical point of view. It can be connected to a single dc link voltage. The FC-VSC also shares this advantage, but the CH-VSC does not, since this topology requires multiple isolated dc power supplies. Nevertheless, some practical experience with this topology reveals technical difficulties that complicate its application, as follows: voltage stress and neutral pole balance voltage. Therefore, the DC-VSC is selected for dynamic voltage restorer applications, in this paper.

4. MODULATION METHOD When it comes to multilevel voltage source converters, the first notion is that need for a large number of switches that may lead to complex pulse-width modulation (PWM) switching scheme. However, early developments in this area demonstrated the relatively straightforward nature of multilevel PWM. The most popular and simple switching scheme for multilevel voltage source converter is Multi-carrier-PWM (MCPWM). For an N-level converter, N-1 carrier signals with the same frequency fc and peak-to-peak amplitude Ac are placed in such a way, that they occupy continuous bands between the positive and negative dc rail of the inverter. The voltage reference, or modulation, waveform has a peak-to-peak amplitude Am and frequency fm, and it is centered in the middle of the carrier set. The voltage reference is continuously compared with each of the carrier signals. In multilevel converters, the amplitude modulation index (ma) and the frequency ratio (mf) are defined by (12) and (13), respectively. ma = and

Am A c ( N-1)

(12)

mf =

fc fm

(13)

circuit can be written as equation (14).

H ( jω ) = Related to the way the carrier waves are placed in relation to the reference signal, three cases can be distinguished: • Alternative Phase Opposition Disposition (APOD), where each carrier band is shifted by 180° from the adjacent bands. • Phase Opposition Disposition (POD), where the carriers above the zero reference are in phase, but shifted by 180° from those carriers below the zero reference. • In-Phase Disposition (PD), where all the carriers are in phase. For the multilevel voltage source converter, the influence of frequency ratio and the number of converter level for the generated harmonics were considered. Including the reason of unbalance waveform, the modulation strategy must be considered by using single-phase condition to inject the voltage via the three single phase injection transformers. The above three modulation methods are compared and given the main result as follows: • If there is three-phase systems, mf should be a multiple of three • If there is an even number of levels, mf should be odd to achieve a high symmetry of the output voltage. • If mf is odd, the PD-method generates the lowest Total Harmonic Distortion (THD) value. • If there is an odd number of levels, mf should be even to achieve a high symmetry of the output voltage. • If mf is even, the POD-method generates the lowest THD value.

=

Vinject ( jω )

(14)

Vinv ( jω )

1 + jω R f C f 1 − ω 2 L f C f + jω R f C f

Where the effective attenuation in decibels is G = 20log

1 H ( jω )

(15)

To design the output LC filter, the following design procedure is used. The design procedure contains four steps as follows: First step: chooses the resonance frequency of the filter that the resonance of the filter will be allocated between the fundamental frequency (fo=50 Hz) and the switching frequency (fsw ≤ 400 Hz) of the multilevel inverter. fr =

1 2π L f C f

VLf(t) iL(t) Lf i (t) C Vinv(t)

, f o < f r < f sw

iinj(t) Rf Cf

(16)

iload(t)

VC(t)

Vinj(t)

To Load

2Ac Reference

Carrier 1

Fig. 5: Single-phase equivalent circuit of DVR’s multilevel inverter.

Ac Carrier 2

Second step: selects the inductance Lf by taking into account the voltage drop VLf:

0 Carrier 3 Ac Carrier 4 2Ac 0

5

VLf = 2π f o L f I rated < 5% of rated voltage

(17)

Vrated = L f max 2π f o I rated

(18)

or

10 Time (ms)

15

20

Fig.4: Multilevel phase opposition disposition PWM technique for ma = 0.9 and mf = 40.

Thus, for a five-level converter, the POD method is the best method as shown in Fig. 4. It comprises four-carrier triangle waveform and the reference sinusoidal waveform which can generate the pulse width modulation for driving the five-level voltage source converter.

L f ≤ 0.05 ⋅

Third step: calculate filter’s capacitance Cf with the given filter’s resonance frequency (fr) and the switching frequency of the inverter (fsw), the filter’s capacitor (Cf) can be derived from condition given in (16).

5. DESIGN OF OUTPUT LC FILTER

Fourth step: considers the filter resistor Rf that is designed for the filter component values to result in an overdamped circuit. In addition, since the filter capacitor Cf will represent a short circuit at high frequencies, Rf is set equal to the characteristic impedance of the cable to absorb the reflected energy.

There are several polynomial low-pass filter configurations with different shapes of amplitude-versusfrequency responses. The equivalent circuit as shown in Fig.5 is chosen since the series capacitor and resistor combination reduces the power losses across the damping resistor. The lower order filter is desirable from the power of view of the total number of components, filter size, cost, and weight. From Fig. 5, the transfer function H(jω) which defines the behavior of the

It can be seen from (14) that the output voltage mainly depends on the impedance of the designed filter. The output voltage can be calculated by considering the dominant voltage of the inverter PWM voltage which, in general are the components at fsw, and the side-band frequency (2fsw). If the output voltage Vinj exceeds the specification, the filter’s inductance (Lf) or fsw should be increased. The output filter is designed by considering the rating of

load: 10 MVA, pf 0.9 lag, 50 Hz, 22 kV and assuming the DVR can inject the voltage 0.5 p.u., that means DVR can inject the voltage at 11 kV maximum, fsw : 400 Hz – 1200 kHz. Firstly, fsw is set to 400 Hz. Secondly, the resonance frequency of filter fr is chosen to be 200 Hz. secondly, from the rating of load and inverter and the condition (18), Lfmax is limited to 6.7 mH (11 kV, 260 A, 50 Hz). Therefore, the designed inductance Lf is 6 mH and capacitance is 0.1 mF. Finally, the filter resistor is considered to be 100 mΩ.

is selected for DVR control as it can be implemented easily compared to other control techniques. Figure 7 shows the performance of multilevel voltage source inverter that composes the output voltage of multilevel inverter, Vinv(t), the output current of inverter iinv(t), the load voltage Vload(t) and the load current iload(t) by using the parameters in Table 2. The output voltage of inverter has fivelevel of voltages between +9 kV to -9 kV dc link voltage. The load voltage and current are near the sinusoidal waveform due to the design of good LC filter and use of the multilevel inverter.

6. DVR SIMULATION RESULTS The proposed DVR of DC multilevel VSC based DVR is shown in Fig. 6 in which the distribution supply, Vs(t) is augmented by a injection voltage, Vinj(t). The series voltage provides boost compensation during sags to deliver rated voltage to the load, Vload(t). Supply

Sensitive Load iload,a Vload,a

Vinj,a

PT

Cf

PT

Cf 22kV, 50 Hz

Vinj,c Cf

VS Lf

Lf

Lf

iL,a

iL,b

iL,c

iload

iinv

0

iload,c V load,c 10MVA 0.9PF,lag

-10

5

10

15

20 Time (ms)

25

30

35

Fig. 7: Output waveform of 5-level voltage source inverter of DVR.

Vdc 4

Vinv,a Vinv,b Controller + PWM

Vload

iload,b Vload,b

Vinj,b

PT

Voltage (kV), Current (A/10) 10 Vinv

Vdc 4

Vinv,c

DC Source Vdc 4

Stationary reference frame Vdc 4

Fig. 6: Scheme of DVR for voltage sag and swell mitigation.

The functional procedure of a controller in a DVR is the following: • Detection of voltage sags in the distribution system. • Computation of the compensating voltage using synchronous reference frame. • Generation the voltage with sinusoidal PWM based on multilevel VSC. • Correction the load voltage via the series voltage injection. • Termination of the trigger pulses when the system event has passed. To validate the proposed DVR, the system shown in Fig.6 has been implemented with MATLAB/Simulink and tested with the parameters in table 2. Table 2-Parameters of simulated system.

Nominal frequency f = 50 Hz Max. sw frequency fsw = 400Hz Load parameters VLoad = 22 kV Sload = 10 MVA Power Factor = 0.9

DC-Link voltage VDC = 18 kV Carrier frequency fc = 1200 Hz Filter parameters Lf = 6 mH Cf = 0.1 mF Rf = 0.1 mΩ

To illustrate a typical response of DVR, consider threephase voltage sag of 20% depth. This is for 50 Hz distribution systems in most of the Asian countries. The feed forward control

Fig. 8: Compensation of DVR when three phase balance fault occurred.

Various voltage wave forms, namely, supply voltage Vs(t), the injected voltage Vinj(t) and the load voltage VL(t) of the system with the proposed DVR are shown in Fig. 8. Here, in order to see the effectiveness of the proposed DVR, a voltagesag is created at 150 ms by simulating a remote three phase fault. The voltage sag is a balanced one with a reduction of voltage magnitude of 0.2 p.u., from its nominal value. The second wave form in Fig. 8 shows the voltage injection by the DVR. As a result of the appropriate injection by the DVR, the load voltage can be kept at the nominal value as indicated in the third wave form in Fig. 8. Also, notice that the DVR is able to inject appropriate voltage component to correct the voltage anomalies within fraction of a cycle.

7. CONCLUSION This paper presents a multilevel voltage source converter based Dynamic Voltage Restorer. As the ratings of various power electronic switches are limited, multilevel voltage source converter topologies are useful for high voltage and high power

applications along with low harmonics. Among existing multilevel voltage source converters, three topologies, namely, Diode-Clamped, Flying-Capacitor and Cascaded H Bridge that can be used for DVR application are compared. Diode-Clamped multilevel voltage source converted is selected for DVR application as the number of capacitors needed and switching states are less compared to other topologies. The simulation results show the capabilities of proposed DVR along with the low pass filer in mitigating voltage sag in a 22 kV distribution system.

REFERENCES [1] T.Bernet and S.Recent, “Development of High Power Converters for Industry and Traction Application,” IEEE Trans. on Power Electronics Vol.15, Nov. 2000. [2] M.M., Kitchin, R.H., Ryan, and H.M.Reliability: “Custom power technology in distribution systems: an overview Osborne”, presented at Security and Power Quality of Distribution Systems., 1992. [3] Hingorani, N.G., “Introducing custom power,” presented at Spectrum, IEEE, 1995. [4] Xu, L., Anaya-Lara, O., Agelidis, V.G. and Acha, E., “Development of prototype custom power devices for power quality enhancement,” presented at Harmonics and Quality of Power, 2000. [5] R. De Doncker, “Recent Power Electronic Developments for FACTs and Costumed Power,” presented at Japan, 2000 [6] C. Meyer and R. De Doncker, “Power Electronics for Modern Medium-Voltage Distribution Systems,” presented at 4th International Power Electronics and Motion Control Conference (IPEMC), Xi'an (China), 2004. [7] D.A. Woodford and R.A. Menzies, “Controlling a Back to Back DC-Link to Operate as a Phase Shift Transformer,” presented at CIGRE, 1994. [8] F.Z. Peng and J.S. Lai, “Multilevel Converter- A new Breed of Power Converters,” presented at IEEE-IAS Conf, 1995. [9] J. von Bloh and R. De Doncker, “Control Strategies for Multilevel Voltage Source Converters for a MediumVoltage DC Transmission Systems, IEEE Int. Conf. on Ind. Electronics, Control and Instrumentation (IECON), Nagoya, Japan, 22-28.10.2000. [10] J. von Bloh, F. Kashani and R. De Doncker, “Optimization of Multilevel Voltage Source Converters for MediumVoltage DC Transmission Systems,” presented at

International Symposium on Industrial Electronics, IEEEISIE, Puebla, Mexico, 2000. [11] K. Fujii, U. Schwarzer and R. De Doncker, “Comparison of Hard-switched Multi-Level Inverter Topologies for a STATCOM by Loss-Implemented Simulation and Cost Estimation,” presented at IEEE Power Electronics Specialist Conference PESC 05, Recife Brasil, 2005. [12] Reed, G.F. and at el, “Applications of voltage source inverter (VSI) based technology for FACTS and custom power installations,” presented at Power System Technology, pp.381-386, 2000. [13] Sundaram, A., Mehta, H. and Tahiliani, V., “CUSTOM POWER-EPRI's response to power quality issues,” presented at Southcon/94. Conference Record , 1994. [14] Low voltage controls and distribution, available at http://www.siemens.com/ [15] Power Transmission and Distribution, available at http://www.abb.com/ Paisan Boonchiam received his B.Eng. and M.Eng. in Electrical Engineering from Rajamangala University of Technology Thanyaburi (RMUTT), and Chulalongkorn University, Thailand, in April 1997 and April 2000, respectively. He has worked as lecturer at the Department of Electrical Engineering of RMUTT since June 1997. In November 2001- December 2003, he worked as research associate at Institut fuer Stromrichtertechnik und Elektrische Antriebe (ISEA), Rheinisch Westfaelische Technische Hochschule Aachen, Germany. He is currently a doctoral student at the Asian Institute of Technology, Thailand. His main research interests are applications of FACTS and Custom Power Controllers, Power Quality Monitoring, Power Electronic System and Optimization Techniques. Nadarajah Mithulananthan (M’02) received his Ph.D. from University of Waterloo in Electrical and Computer Engineering in 2002. He has worked as an electrical engineer at the Generation Planning Branch of the Ceylon electricity Board, and as a researcher at Chulalongkorn University, Bangkok, Thailand. Dr. Mithulananthan is currently an Assistant Professor at the Asian Institute of Technology and his research interests are voltage stability and oscillation studies on practical power systems and applications of power electronics controllers in transmission and distribution systems.