later replacing the later voice analog modulation by a digital one. Like 1G,
different standards ... only a discrete RF filter, suppressing the others off-chip
filters.
Designing Reconfigurable Multi-Standard Analog Baseband Front-End for 4G Mobile Terminals: System Level Design 1
A. Silva1,2, J. Guilherme1,3, R. F. Neves1,2, N. Horta1,2
Instituto de Telecomunicações, Av. Rovisco Pais 1, 1049-001 Lisboa, Portugal Instituto Superior Técnico, Technical University of Lisbon, Av. Rovisco Pais 1, 1049-001 Lisboa, Portugal 3 Escola Superior de Tecnologia de Tomar, Estrada da Serra, Quinta do contador, 2400 Tomar, Portugal Phone: +351-218418093, Fax: +351-218418472, e-mail:
[email protected]
2
Abstract – This paper presents the system-level design of a wireless receiver’s analog baseband front-end, which satisfies the standards of 4G mobile communications. An analysis of different topologies for wireless receivers suited for multistandard purposes is performed. The Zero-IF architecture is chosen and design issues of analog baseband blocks are outlined, regarding a multi-standard solution. A detailed system-level analysis on the analog-to-digital converter block, based on a Sigma-Delta topology, is presented as an example of a reconfigurable analog block.
I. INTRODUCTION With the explosive growth of mobile communications, challenges are continuously being posed on enabling technologies to handle more demanding requirements. The next generation of wireless mobile communication systems, fourth generation (4G), is no exception. The need to support several standards in the same handheld device, associated with the power consumption and area restrictions, created the necessity to develop a portable, power efficient, integrated solution [1]. The purpose of this paper is to present such solution capable of supporting 4G mobile terminal’s requirements, through a reconfigurable multi-standard frontend implementation. This paper is organized as follows: Section II analyzes the multi-standard transceiver specifications. Section III discusses transceiver architectures considerations. Section IV addresses the implementation of reconfigurable analog frontend, focusing on analog-to-digital converter on Section V. Simulation results are presented in Section VI followed by the concluding remarks, Section VII. II. MULTI-STANDARD SPECIFICATIONS Over the years standards for wireless communications systems have constantly being developed in order to achieve higher data rates and at the same time allow the introduction of new services. Permanent technology developments allowed the design of transceivers capable to adjust to more challenging specifications through the generations of cellular systems. A review on the evolution of mobile communications systems is performed and a perspective on 4G standards is presented. A. Standards Evolution on Mobile Terminals The first generation of cellular systems that was based on analog direct voice modulation appeared in the 1980s.
Several standards operated at different parts of the globe as NMT (Nordic Mobile Telephone) on Europe or AMPS (Advanced Mobile Phone System) on North America. The succeeding generation, 2G, was introduced ten years later replacing the later voice analog modulation by a digital one. Like 1G, different standards appeared worldwide, although GSM (Global System for Mobile communications) rapidly spread over world becoming the major mobile phone standard. During 2G, data rates were progressively increased, up to 384kbps, with the development of GSM, by introducing GPRS (General Packet Radio Service) and EDGE (Enhanced Data rate for GSM Evolution) systems [2]. Previous generations supported mainly voice applications while 3G provides a wider range of services at higher data rates (about 5Mbps) through the use of the access scheme WCDMA (Wideband Code Division Multiple Access), for instance [3]. The limited success of 3G associated with new emerging standards and the upcoming of a newly generation every decade forced the development of 4G. Therefore 4G is expected to be implemented near 20102015 with data rates up to 100Mbps envisaging a new concept of mobility and cooperative services. B. 4G Standard Specs Next generation of mobile communication systems are expected to be a convergence platform, offering a variety of new heterogeneous services [4]. Besides the integration of former standards, 4G will incorporate WLAN (Wireless Local Area Network) and WMAN (Wireless Metropolitan Area Network) providing high speed communications. WLANs are implemented by using IEEE 802.11a/b/g standards, whereas WMANs correspond to WiMAX or IEEE 802.15e standards. Potential standards for implementation on 4G are shown in Table I. III. ALTERNATIVE TRANSCEIVER ARCHITECTURES Nowadays, the availability of many wireless standards that can be implemented in 4G, as shown in Table I, which associated with the continuous emergence of new wireless technologies, suggests the use of a reconfigurable multistandard receiver. The use of such flexible architecture can be achieved through the use of software defined radio (SDR). This term refers to a radio receiver, programmable by software, that defines the radio parameters and which can be upgraded to face the requirements of new forthcoming protocols. The goal of SDR is to perform the signal digitalization as near as
possible to the antenna, hence allowing the use of digital programmable hardware, such as digital signal processors (DSPs). An ideal SDR would consist in an analog to digital conversion right after the antenna, demanding an ADC with bandwidth about 6GHz and up to 14 bits of resolution. However, according to state-of-the-art analog-to-digital converters (ADCs) this possibility is still unfeasible. Consequently the digitalization of the signal has to be performed in baseband frequency, since that result is a more reasonable requirement for the ADC. Consequently, an analysis on the architecture of these receivers is performed, specifically their multi-standard and integration capabilities, described in Table II. A conventional architecture choice is the superheterodyne receiver, based on its performance in terms of sensivity and selectivity, achieved mostly due to its discrete filters. Therefore, the use of a RF (Radio Frequency), IR (Image Rejection) and IF (Intermediate Frequency) filters turns this architecture unsuitable for integration and consequently for multi-standard purposes that would require even more offchip filters.
channel bandwidth, leading to an increase in power consumption. Wideband IF double conversion [7] receiver performs the carrier translation to baseband in a similar manner that superheterodyne solution. However, this topology allows a higher level of integration since it uses only the discrete frontend RF filter. This topology requires six high linear mixers that increases the overall power dissipation of the receiver. Multi-standard configurability is still possible since channel filtering is performed in baseband like in Zero-IF approach. A Zero-IF architecture is therefore the solution that presents more advantages regarding a multistandard implementation. Such architecture was proposed on [8], reinforcing the use of this topology for multi-standard wireless applications. Table I : Wireless communications standards Standards GSM WCDMA 802.11a
(a)
(b)
802.11b 802.11g WiMAX GPS Bluetooth
Frequency Band (MHz) 890 - 915 935 - 960 1920 -1980 2110 - 2170 5150 - 5250 5250 - 5350 5725 - 5825 2400 - 2483,5 2400 - 2483,5 2000 -11000 1575,42 2400 - 2483,5
Channel Bandwidth (MHz) 0.2 3.84 20 22 22 1.25 - 28 1
Table II: Receiver’s architectures characteristics (c)
(d) Fig. 1. Transceiver’s architectures. (a) Superheterodyne, (b) Zero – IF, (c) Low – IF and (d) Wide-Band IF double conversion. The direct conversion receiver [5] or Zero-IF receiver uses only a discrete RF filter, suppressing the others off-chip filters. This is performed using a single mixer stage translating the signal directly to baseband. Thus, integration capability is improved like as multi-standard, since channel selection is performed in baseband by a low pass filter that could be programmable to support diverse standards. In a Low-IF topology [6] the RF signal is translated to a intermediate frequency closer to the baseband frequency. Besides maintaining the same level of integration as the ZeroIF, multi-standard ability is affected, since the more severe constraints are posed on bandpass filter and ADC for wide
Architecture
Discrete Filters
Superheterodyne RF, IR, IF Zero-IF RF Low-IF RF Wide-Band IF RF
Integration Level Low High High High
MultiStandard Power Ability Low High High Low Medium Medium High Medium
IV. RECONFIGURABLE MULTI-STANDARD ANALOG BASEBAND FRONT-END The goal of this project is to implement a reconfigurable solution for analog baseband signal processing. It must be able to cope with the standards previously defined. Therefore the most efficient solution, able to cope with 4G requirements, is the implementation of reconfigurable blocks, digitally controlled. The control of the analog blocks is performed through a digital processor. This solution was adopted in [8-10], where the analog baseband blocks are generally interleaved VGAs (Voltage Gain Amplifiers) and LPFs (Low Pass Filters). For instance, the multistandard analog baseband chain proposed in [10], was composed by two VGA blocks and a LPF, where the first VGA was switched according to the selected standard.
A generalized version of the analog baseband front-end is shown in Figure 2. Low pass filter is used to select the desired channel and therefore to reject the adjacent channels. Bandwidth specifications vary according to selected standards and thus this parameter must be reconfigurable. The following analog block, the VGA that is used to increase the signal’s amplitude has an adjusted gain also digitally controlled.
Fig. 2. Block diagram of analog baseband circuit Preceding the digital processor is the ADC, which due to the wide range of specifications is the most complex block to be implemented. Therefore a detailed analysis on this block is performed next. V. RECONFIGURABLE ANALOG-TO-DIGITAL CONVERTER
Over the years several solutions for multimode ADCs have been proposed, however the most demanding standards, concerning the large bandwidth, were not included (WiMAX, WLAN). Recently were published some solutions that included these standards: [11] (GSM/WCDMA/WLAN), [12] (GSM/WCDA/WLAN-WIMAX) and [13] (GSM/Bluetooth, UMTS, WLAN). The selected approach for the design of the converter intends to support the majority of 4G predicted standards, maintaining power and area constraints as near as possible to dedicated solutions. Thus, it is important to carefully select an appropriate ADC topology. An extended analysis on ADCs is performed at [14]. It is possible to conclude that Sigma-Delta (Σ∆) converters provide the highest resolutions, 24 bits (stated number of bits), while pipelined and flash converters provide the highest bandwidths, about 300MS/s and 1GS/s, respectively. While Sigma-Delta has bandwidth limitations, pipelined converters have resolution limitations as well as flash converters that also suffer from higher power dissipation. To overcome the restrictions of individual architectures, merging different topologies is a solution. This is achieved with Sigma-Delta modulators containing multibit quantizers implemented with high-resolution converters. These converters are able to trade efficiently speed for accuracy, being suitable for the majority of wireless standards, although being demanding to obtain a high bandwidth. In addition to that, Sigma-Delta architecture is very tolerant to circuit non-idealities that become relevant in analog integrated solutions. Moreover, this topology can be
easily programmable by adjusting some of its characteristics, as oversampling ratio, order of the modulator or quantizer resolution, giving it good features for reconfigurability. The architecture’s choice to implement the Sigma-Delta modulator is the Leslie-Singh topology, since it does not suffer from digital-to-analog converter (DAC) non linearity issues [15]. However this topology is based on a low order Σ∆ modulator, since a higher order single loop modulator suffers from stability limitations. Thus a topology, merging cascaded and Leslie-Singh modulators is selected with the purpose of obtaining a higher order multibit Σ∆ converter, without a DAC (Figure 3). A 6 bit pipelined ADC is selected for the multibit realization, due to its reconfiguration capability. The resolution of the multibit ADC is changed by switching the pipelined stages. The analog blocks are realized using switched-capacitor circuits, while digital filters are implemented in the digital processor. The digital filters are chosen such that the quantization errors from the single bit quantizers are cancelled, being the output given by (1). Y(z) = z-2Y1(z) – (1-z-1)2Y2(z) + (1-z-1)4Y3(z)
(1)
An approach to encase the 4G standards requirements on the suggested modulator has been performed in order to demonstrate the reliability of this solution on Table III. A trade-off between several parameters of the converter exists, so that the modulator could adjust to the less stringent standards in a power efficient way, full fitting at the same time their requirements.
Fig. 3. ADC block diagram Table III: Target modulator specifications Standard GSM Bluetooth GPS WCDMA WLAN WiMAX
Oversampling ratio 128 32 20 16 12 8
*ENOB – Effective Number of Bits
Topology 2º order - 1 bit 4º order - 1 bit 4º order - 1 bit 4º order - 1 bit 4º order - 6 bit 4º order - 6 bit
ENOB* (bits) 12 – 14 13 10 6–8 8 – 14 7 – 11
VI. MATLAB SYSTEM-LEVEL SIMULATION The chosen topology was simulated using MATLAB software to perform a behavioral simulation in order to obtain the desired set of specifications and the requisites for analog blocks. Using SIMULINK models [16-17] it is possible to include several non-idealities, such as clock jitter, thermal noise, DC gain, finite bandwidth and slew-rate, for instance. For each standard the simulation model was reconfigured in order to adjust its parameters and topology according to Table III. The results obtained are expressed using the metric figure SNRD (Signal to Noise and Distortion Ratio) to evaluate the converter’s performance. The final results, contemplating circuit non-idealities are shown in Table IV. The behavioral simulations show that the converter is able to scale through the different standards efficiently, accomplishing the requirements even in the most stringent mode, WiMAX. Table IV: Behavioral simulation results Standard GSM Bluetooth GPS WCDMA WLAN WiMAX
Minimum Required SNDR (dB) 74 80 62 38 50 44
The presented work aims to the full integration of the analog baseband front-end, so the results obtained from the ADC will be confirmed by device level simulation, like as the others blocks. Analog front-end will be submitted to integration in UMC 0.18 m technology, together with the digital processor. REFERENCES [1] [2]
[3] [4] [5]
Peak SNDR (dB) 83.4 82.5 69.7 61.3 61.0 45.7
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[11] [12]
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Fig. 4. SNDR versus input signal level VII. CONCLUSIONS AND FUTURE WORK This paper addresses the issues related to the design of reconfigurable analog baseband front-end capable to support a wide range of standards. Potential standards for the next generation of wireless systems are selected and analysis on existent wireless receivers is performed, concluding that Zero-IF is the adequate topology for multi-standard transceivers. To demonstrate the issues regarding the implementation of such a flexible architecture, a reconfigurable Sigma-Delta converter has been presented and a solution for multi-mode operation has been proposed.
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