d-q-DC Reference Frame Control Strategy for SinglePhase Current Source Cascaded Inverters Carlos R. Baier ƅ, Miguel A. Torres Ƅ, Javier Muñoz ƅ, Johan I. Guzman ƅ, Pedro E. Melin Ƈ, Jaime Rothen Ƅ, Marco Rivera ƅ ƅ Universidad de Talca – Department of Industrial Technologies, Curicó, CHILE Ƅ Universidad de Concepción - Department of Electrical Engineering, Concepción, CHILE Ƈ Universidad del BioBio - Department of Electrical and Electronic Engineering, Concepción, CHILE
[email protected],
[email protected],
[email protected] Abstract—Power quality and reliability are inherent characteristics of the cascaded multilevel converters. However, in some converters, efforts should be made to ensure the durability and reliability of the equipment. This is the case of the singlephase current source cascaded inverter (SPCS-CI) in which, due to possible differences in the DC input current to each inverter of the system, it will be necessary to limit each output voltage of each unit. This can be done through a linear control strategy. In this work, the model and the mathematics of the problems caused by unbalanced DC currents in the described cascaded system are presented. Furthermore, a control scheme based on dq reference frame components is proposed. Along with this, a control for the DC component voltages in the individual outputs of each inverter is added, which cannot be compensated completely by the d-q scheme. The proposed control strategy is a linear scheme with an updatable decoupler that allows to control d-q and DC voltages in a set of single-phase current source inverters disposed in a cascaded arrangement. Simulated results show the effectiveness of the proposed scheme. Keywords—single-phase current source cascaded inverter; multilevel inverters; current source inverter.
I.
INTRODUCTION
The single-phase current source cascaded inverter is an alternative that could eventually be used as an interface between different sources of renewable energy and the network. These kinds of inverters can (and should) operate with very low switching frequency, achieving at the same time a very high power quality. An advantage of this inverter is that to achieve this high power quality it is not necessary to connect a large number of inverters in series, because the topology incorporates an output filter in each inverter that, along with a displacement of the carriers in the modulation of each unit, allows this feature to be performed. A problem in the single-phase current source inverter is the control of the output voltage, owing to the differences in the DC input currents of each unit, which imply the emergence of DC voltages and over-voltages in the AC side affecting the semiconductors and output capacitors of each individual inverter. Therefore a control scheme to avoid this effect must be considered. Voltage source cascaded multilevel converters use low voltage semiconductor devices in their units, thus achieving higher levels of voltages when multiple inverters are connected in series. These converters are used today in a wide range of applications, among them the operation of solar photovoltaic
k,(((
(PV) power plants [1]-[2]. It is important to note that cascade converters have a very high reliability, allowing failures in one or more of their units besides achieving a high power quality as well. This power quality depends, however, on the number of units connected in series [3]. On the other hand, the use of multiple current source inverters connected in parallel has allowed the increase of the AC currents and, therefore, the increase of power in applications that require it. These topologies have the advantage of using semiconductor devices with maximum rating of current that are lower than the full system requirement. Moreover, as with the cascaded multilevel converter, a high reliability is associated, as it allows faults in at least one of the units connected in parallel [4]. One type of inverter, recently proposed, which takes advantage of both topologies discussed above is the current source cascade inverter based on single-phase units [5]-[6]. This inverter has many of the advantages that the current source converters possess, such as low switching frequency, low dv/dt and a reliable short-circuit and over-current protection [4]. At the same time, due to the series connection of the current source inverters, this topology can achieve higher voltage levels, an improved power quality and a greater reliability [6]. A further advantage is that this improved power quality can be achieved with a low number of inverters in series. However, the cascaded topology proposed in this paper presents important challenges from the control point of view. One of these challenges is related to the control of each output voltage, mainly when there are differences in the DC sources that are feeding each unit. This problem can be common, especially if the DC currents are supplied by PV cells, because it is difficult to ensure that all PV panels will give the same energy all the time. In this paper a control scheme based on single-phase d-q reference frame components is proposed for a single-phase current source cascaded inverter (SPCS-CI) which is feeding a linear load. The proposed scheme allows a balanced operation for each inverter output voltage. The control strategy also considers the compensation of a DC voltage on each output, which is produced when there are different (input) DC currents on the inverters of the system. Therefore, in each inverter the dq and DC voltages must be controlled in the output. The d-qDC control method proposed in this paper can serve as reference for applications of the SPCS-CI fed from PV panels or other non-symmetric DC sources.
II.
THE SINGLE-PHASE CURRENT SOURCE CASCADED INVERTER.
1 Ͳ CSI
idc1
A. System Description The SPCS-CI is composed of n single-phase current source inverters connected in series to feed a single-phase load, as shown in Fig. 1. Each unit is powered from a DC source, which can be controlled by a DC/DC converter, adjusting the voltage level at the input of each inverter. The voltage and current on each DC side will be converted to AC variables across the single-phase inverter. Each inverter has a capacitive filter on each output, as shown in Fig. 1, which improves the characteristic of the load voltage.
DC Source 1
B. Advantages and Disadvantages The operation in cascade of several single-phase current source inverters improves the operating characteristics of only one unit. The advantages that can be observed for these converters can be summarised as follows: (i) An increase in the voltage and power capacity of the entire system without use of higher voltage semiconductor devices than those used in a low voltage unit; (ii) The ability to operate with low switching frequencies on each individual inverter of the topology; (iii) An increase in the reliability of the total system, which makes this topology an important alternative to the classical voltage sources cascaded multilevel converter; (iv) A very high power quality without adding too many units in cascade. This is mainly due to the PS-PWM technique and the AC capacitive filter in the output of each unit. Nonetheless, the disadvantages that can be seen in the topology are: (i) The losses involved in the DC inductors and switches when the topology is working with higher currents on the DC link; (ii) The need to control the output voltages of each inverter, owing to the difficulty of maintaining, without the control, an appropriate balance between the different output voltages in the SPCS-CI.
iL
sw2 +
sw3
Co
vo1 -
sw4
idc 2 DC Source 2
In practice, the DC power source of each unit, represented as a box in Fig. 1, may be a PV panel or other kind of DC source connected through a DC/DC converter to the inverter. The modulation of the DC/DC converter and the inverter can be performed independently or through some integrated strategy. However, it is necessary to remember that for efficient operation of a current source inverter, the switching frequency should be the lowest possible [4]. One of the advantages of cascaded multi-cell converters is the low switching frequency, which can operate without affecting the power quality at the load, because the system is using a phase-shifted carrier in the pulse width modulation of each inverter (PS-PWM), shifting or moving the resulting carrier frequency of the system from 2⋅fc to 2⋅fc ⋅n, where fc is the carrier frequency of the modulation and n, as we recall, is the number of inverters connected in series of the SPCS-CI.
sw1 DC/DC Conv
+ +
DC/DC Conv
Co
vo 2 -
vLoad
iL
-
idcn DC Source n
sw1 DC/DC Conv
sw2 +
sw3
Co
von -
sw4
Fig. 1. Single-phase current source cascaded inverter system (SPCS-CI)
III.
MODEL AND BEHAVIOUR OF THE SPCS-CI.
A. Mathematical modelling It is considered, for modelling purposes, that all the inverters in Fig. 1, with respect to semiconductor devices and parameters, are equal. The model for the inverter j of the SPCS-CI is obtained from the current iL of the load, the current idcj at the DC input of the inverter and the current in the output capacitor Co, and considering Kirchoff's current law (KCL), thus obtaining the following equation:
dvoj dt
=
1 ( s j idcj − iL ) , Co
(1)
where j is a subscript that represents any inverter from 1 to n, iL is the load current that is passing through each inverter of the system, idcj is the DC current to the inverter input j, sj is the switching function that modulates the current at the inverter output, and where voj is the instantaneous voltage at the output of the same inverter. As the system is composed of n inverters, it is possible to see that the SPCS-CI has n dynamics involved and described by equation (1). However, if this cascaded inverter feeds an inductive load, the system becomes of order n +1, owing to the inductive load equation, which can be written as: diL 1 = ( − RL iL + vo1 + ... + voj + ... + von ) . dt L
(2)
With the purpose of simplifying the analysis of the system, one can consider a mainly resistive load; i.e., assuming a small load inductance (L ≈ 0), the current on it can be represented as iL = (vo1 + .. + voj + .. + von ) / RL ,
(3)
where RL is the load resistance which is fed by n units of the SPCS-CI. B. Average model. Using the concept of the average model, it is possible to approximate the switching function as a sine function, as follows: s j ≈ m j = GM j sin(ωt + φ ) ,
(4)
where G is the gain of the proposed modulation technique, Mj is the modulation index of the inverter j, ω is the operating frequency of the inverter and φ is the phase shift with respect to a given reference. Considering a very small inductance in the load or a resistive load only, from (1), (3) and (4) it is possible to obtain the average model for the j-th unit of the SPCS-CI, by the following equation: dvoj dt
=
1 ( m j idcj RL − (vo1 + ... + voj + ... + von ) ) . RL Co
(5)
In this model it can be seen that the output voltage of the inverter will be affected by the output voltage of the other inverters. C. Differences and Occurrence of DC Components in the Output Voltages. It is possible to propose a fixed and identical modulation index for each cell, where the output voltages of each unit can be controlled from a rectifier or a DC / DC converter in the DC-link. However, the differences of DC current, which can be caused by different power supplies, different PV panels or just the differences between the sensors used to control the DC input current of the inverters, induce different output voltages in the inverters of the system. To know how important these differences could become, we present the following analysis. Let’s consider only two inverters connected in series, the inverters j and k of a set of n units, where the whole system is feeding a resistive load RL, from different DC current sources. The DC currents of the inverters j and k are called idcj and idck respectively. From (5), and if the difference between equations of the inverters j and k is performed, this subsystem can be written as: dvoj dt
−
dvok 1 = ( m j idcj − mk idck ) . dt Co
(6)
If equation (6) is integrated, taking also into account (4) and considering null initial conditions, the following equation is obtained: voj − vok = G
(idcj M j − idck M k ) ta Co
³ sin(ωt )dt ,
(7)
0
where Mj and Mk are the modulation indexes of inverters j and k respectively. If the integral is solved for any lapse of time, we
may find that for any time t=ta, the voltage difference between voj and vok can be written as: voj − vok = G
(idcj M j − idck M k ) Co ω
ª¬1 − cos (ωta ) º¼ .
(8)
From this equation it is possible to find that there will be a difference between the voltages voj and vok if idcj M j ≠ idck M k . To simplify the analysis even more, if all modulation indexes are equal, then Mj and Mk are equal to Mi. Then equation (8) can be written as: voj − vok = GM i
(idcj − idck )
ω Co
ª¬1 − cos (ωta ) º¼ .
(9)
From this equation, it can be said that if all inverters of the SPCS-CI have the same modulation indexes and different DC currents on their DC-links, the difference between two output voltages of the system varies between the values given by the following inequality:
0 ≤ voj − vok ≤
2GM i ( idcj − idck )
ωCo
.
(10)
According to (9), the oscillation of the difference between the voltages is produced at the same frequency as the inverter. Also from (9), one can find that the difference between the voltages has a DC value ( voj − vok ) which is proportional to the difference between the DC currents and can be written as:
voj − vok = GM i
(i
dcj
− idck )
ω Co
.
(11)
These differences of DC voltages between two inverters can be found for any pair of output voltages in the SPCS-CI. Following a development similar to the above, and considering n inverters in the system, it is possible to find the DC value ( vojDC ) in the output voltage of the j-th inverter of the SPCS-CI when there are different DC currents in the DC-links. This DC value can be written, in terms of the DC currents, as:
vojDC = GM i
( ni
dcj
− (idc1 + idc 2 + .. + idcj + .. + idcn ) )
nωCo
,
(12)
where vojDC is the DC value at the output of the inverter j and where n is the number of inverters in the system. If the modulation indexes are different for each inverter, then equation (12) can be written as:
vojDC = G
( ni
dcj
M j − (idc1 M 1 + idc 2 M 2 + .. + idcn M n ) ) nωCo
.
(13)
To ensure the elimination of the DC components, and the differences between the outputs of each inverter, then it will be necessary to find different modulation indexes in order to set to zero the expression (13).
From (12) and (13), another consideration which serves to decrease the difference between the output voltages and the DC values of the output voltages is to increase the capacitance Co. However, to achieve good results with this latter method, it will require a higher cost per inverter, and hence a higher cost of the whole SPCS-CI. This paper proposes a control for the load voltage of the SPCSCI, eliminating, at the same time, the differences between the output voltages of each inverter. Because the SPCS-CI is a single-phase system, an interesting alternative is to use singlephase d-q reference frame components to propose a control scheme [7]-[8]. To the lineal control strategy based on d-q reference frame components proposed in this paper must be added an extra control scheme for the DC output voltages, so that the final control strategy considers d-q and DC variables.
D. Modelling of the SPCS-CI using d-q Reference Frame Components To use d-q reference frame components in the SPCS-CI as has been performed in [7] and [8], it will be necessary to generate the orthogonal imaginary variables of the circuit, which are constructed with the same real AC variables of the circuit, except that these variables are phase-shifted 90 degrees. The real and imaginary component of an AC variable can be used to find the d-q reference frame components of the variable, if they are multiplied by the following matrix: ª sin(ω t ) − cos(ωt ) º T=« ». ¬cos(ωt ) sin(ωt ) ¼
IV.
A. Linearized Model for an Inverter of the System If the d-q model of an inverter, as presented in (15), is linearized around an operating point, then the following model is valid:
½ dq = Aǻvdq o + Bǻm j + Eǻp ° dt ¾, dq dq ǻy = Cǻvo + Dǻm j + Fǻp °¿
dǻvdq oj
(16)
where disturbances p are the DC current of the inverter and the output voltages (d and q) of the adjacent inverters, whereas A, B, C, D, E and F are matrices of the system which can be found as indicated in [9]. If the matrices are found, one may find the transfer matrix in the Laplace plane for each single-phase inverter as:
ª h ( s ) h12 ( s ) º −1 H ( s ) = C ( sI − A ) B = « 11 », ¬ h21 ( s ) h22 ( s ) ¼
(17)
where, in this case,
h11 ( s ) = h22 ( s ) = idc (14)
RL Co ( sRL Co + 1)
( sRL Co + 1)
2
+ (ω RL Co )
2
,
(18)
and
In this matrix one should consider that ω corresponds to the frequency imposed by the inverter in the load. Considering the real and imaginary voltages of the model shown in (5) for any inverter j, and from (14), the model in function of d-q reference frame components can be written as:
§ dvojd ¨ ¨ dt ¨ dvojq ¨ © dt
LINEAR CONTROL STRATEGY PROPOSED FOR EVERY INVERTER OF THE SYSTEM
( mdj idcj RL − (vod1 + .. + vojd + .. + vond ) ) ·¸ · §¨ q + v ω oj ¸ RL Co ¸ ¸=¨ ¨ ¸ , (15) q q q q ¸ m j idcj RL − (vo1 + .. + voj + .. + von ) ) ¸ ( ¨ d ¸ −ω voj + ¸ ¹ ¨© RL Co ¹
where the state variables vojd and vojq are the direct and quadrature components of the output voltage of the j-th inverter, while m dj and m qj are the direct and quadrature inputs of the same inverter and wherein the output voltages of the d q other inverters ( vod1 , voq1 ,.., vojd -1 , voqj−1 , vojd +1 , vojq +1 .. von , von ) can be considered as perturbations to the j-th inverter. If the system expressed in (15) is observed, it is necessary to emphasize the possibility of an important coupling between the voltages d and q (owing to the terms ω vojq and −ω vojd ). This may not allow the implementation of a linear control without consideration of a decoupler.
h21 ( s ) = −h12 ( s) = idc
ω ( RL Co )
( sRL Co + 1)
2
2
+ (ω RL Co )
2
. (19)
As has been mentioned above, the possible coupling of d and q axes in the model (15) could require the use of a decoupler. From the transfer matrix obtained, it is possible to obtain the relative gain array (RGA) to determine whether or not to use a decoupler. B. Relative Gain Array for the Inverter To obtain the RGA matrix of the system [9], it is necessary to determine the following matrix: ˆ (0)T = ª λ11 ȁ = H(0) ⊗ H «λ ¬ 21
λ12 º , λ22 »¼
(20)
where “⊗” is the term by term product, and where H (0) and ˆ (0)T are the transfer matrix and the inverse transpose of the H
same matrix evaluated at s = 0 respectively. The terms of the relative gain matrix ȁ depend on the frequency ω, of the output capacitor Co and of the load resistance RL, and can be written as:
λ11 = λ22 =
1
( Co RLω )
2
+1
,
(21)
The simplest decoupler that may be proposed corresponds to one obtained from the inverse of the transfer matrix evaluated at s = 0, which can be written as: λ11
ª 1 « ˆ (0) = 1 « RL H idcj « «Coω ¬
λ12
(23)
In order to design this decoupler, first, it is necessary to choose the minimum resistance of the load RL considered in the system, which coincides with the maximum load supplied by the inverter. The decoupler can operate with greater resistance than the selected value. RL
Fig. 2. Evolution of the RGA elements (Ȝ11, Ȝ12) as a function of the load resistance
( Co RLω ) λ12 = λ21 = . 2 ( Co RLω ) + 1 2
(22)
These terms are the relative gains between the inputs m dj and m qj and the outputs vojd and vojq .
Considering a fixed inverter frequency and a variable resistor RL as a load, it can be seen in Fig. 2 that the highest degree of coupling is found for intermediate values in the load; therefore the use of a decoupler is necessary. C. Proposed Decoupler and Control Strategy ωiREF
vojq ∅
idcj
D. d-q and DC Control Scheme for the Inverter Output of the SPCS-CI Despite the d-q control, it is possible to find a DC voltage at the output of individual inverters, because the linear control of the d and q variables does not ensure the total elimination of the DC output component, mainly outside the operating point that was supposed in the design.
It can be observed in the upper right corner of Fig. 3 that it is necessary to obtain the output voltage through a high-pass filter, and then obtain two signals, the real and the imaginary (real value delayed 90 degrees) voltage signals. From these signals and the transformation matrix given in (14), it is possible to obtain the voltage inverter output vojd and vojq .
vojd
m Re m Im j j
Owing to the possible variation of the currents in the DClinks idcj and the effects that cause the differences between these currents in the SPCS-CI, it will be necessary to feedback this current periodically in the decoupler. Thus, the decoupler will be modified as the DC input current change. Lack of consideration of the DC current value in the decoupler matrix would cause the entire system not to operate properly.
Due to the orthogonality of the DC component with respect to the d and q output variables, it is possible to control the DC voltage without affecting the other components. Thus, the final control scheme is shown in Fig. 3.
d voREF
ˆ , idc ) H(0
mj
º −Coω » ». 1 » RL »¼
The resulting signal vojd can be filtered by a low pass filter, sw1
sw2
sw3
CO sw4
I s = idcj
sw1 sw2 sw3 sw4
d and the same signal is then contrasted by the reference voREF .
Meanwhile, the signal vojq is contrasted with a null reference. Once both error signals pass through the PI control, its results are multiplied by the decoupler proposed in (23). The resulting modulators in axes d and q are multiplied by the sine and cosine respectively to obtain the modulating signal mj by a simple sum.
voj
iL vojDC
m DC j ∅
Fig. 3. d-q-DC reference frame control strategy for each singlephase current source inverter of the SPCS-CI
We can also see in the lower right corner of Fig. 3 the DC output voltage signal from the inverter ( vojDC ), which can be detected from a low-pass filter. This signal is compared with a null value of the DC voltage which it is expected to have on each output. The error of this contrast passes through the PI
3.5
idc1
idc 2
[A] 3
idc 3
idc 2
(a)
[A]
0
100
0.05
0.1
0.15
vo 2
vo1 vo 2 vo 3
0.2
0.25
vo1
vo1
0.3
vo 3
[V] 0.05
40
0.1
vod2
[V] 30
0.15
0.2
0.25
vod1
(c)
32.3
[V]
d o3
v 0
0.05
0.1
0.15
0.2
0.25
[V] 0-4 0
voq1
voq2 0.05
0.1
9.1
[V] 0
voDC 3
-20 0
0.15
0.2
0.25
0.05
0.1
[V]
0.3
voDC 2 0.15
0.25
[V]
vLoad
-100 0
0.05
0.1
0.15 t[sec]
0.2
0.25
0.3
voDC 2
vLoad t[sec]
Fig. 5. Key waveforms of a SPCS-CI with n=3, with the proposed output voltage compensation scheme against a disturbance in t=0.1[sec]; (a) DC currents in the inverters; (b) output voltages of the inverters;(c) d components of (b); (d) q components of (b); (e) DC component of (b); (f) load voltage.
Fig. 4. Key waveforms of a SPCS-CI with n=3, without output voltage compensation scheme against a disturbance in t=0.1[sec]; (a) DC currents in the inverters; (b) output voltages of the inverters;(c) d components of (b); (d) q components of (b); (e) DC component of (b); (f) load voltage.
control whose output m DC is added directly to the modulating j signak mj that controls the d-q axes. Finally, the overall modulating signal is delivered to the block PS-PWM, which provides the trigger signals to each switch of the inverter. The simulated results that give support to this work are presented below. V.
voDC 3
0.3 (f)
[V] 0
voDC 1
[V] -18.2
0.2
vod2
q voq1 vo 2
(e)
100
vod1
voq3
13.8
-12.9
voDC 1
20
vod3
0.3 (d)
voq3
vo 3
0.3
20
-20
vo 2
vo 3 0
33.3
20
vo1
(b)
[V] 0 -100
idc 3
vo 2
2.7
2.5
idc1
RESULTS AND SIMULATIONS FOR A SYSTEM WITH THREE INVERTERS
In order to observe the effectiveness of the proposed control scheme, we consider the simulation of a cascaded system of n = 3 inverters with a resistive load of 60[ohm] (RL=60Ω), in where each output capacitor is 30[uF] (Co = 30[uF]). The nominal DC current at the input of each inverter is 3[A]. For this system, three cases are simulated using PSIM software. A. Case (i) of Simulation. The first simulation considers a system with a modulation index such that the total output voltage is 100[V]. It is known according to the model presented in (1) and (5) that this voltage can be changed by the modulation index or the input DC current.
In the simulation, the DC current of the three inverters connected in series are identical during 0 t
