Dynamic Voltage Restorer Using a New Compensation ... - IEEE Xplore

IEEE REGION 8 SIBIRCON 2008

139

Dynamic Voltage Restorer Using a New Compensation Voltage Control and Converter Based Input-Output Linearization V. Fernão Pires*¸, Gil Marques♦¸, J. F. Martins, and J. Fernando Silva♦¸ *

Escola Sup. Tecnologia Setúbal / Inst. Politécnico Setúbal, Setúbal, Portugal, [email protected] ♦ Instituto Superior Técnico / Universidade Técnica de Lisboa, Lisboa, Portugal Faculdade Ciências e Tecnologia, Univ. Nova de Lisboa, Lisboa, Portugal, [email protected] ¸ CIEEE, Lisboa, Portugal, [email protected], [email protected] Abstract— dynamic voltage restorer (DVR) is known as an effective device to mitigate voltage sags and swells. This paper presents a control method based on the input-output linearization applied to the DVR. The synthesis of the parameters is presented. A new compensation voltage control is also proposed. This control is based on the ClarkConcordia transformation and a robust PLL structure. Several simulation results are presented. This allows showing the performance of the control method based on the input-output linearization applied to the DVR and the effectiveness of the compensation voltage control.

I.

INTRODUCTION

Voltage variations, such as voltage sags and swells are two of the most important power quality concerns for customers [1]. Normally, these variations occur during fault conditions on the power system. Since it is impossible to eliminate the occurrence of faults, there will always voltage variations. They can affect a wide range of electrical equipment and are of particular concern to industry. In fact, the consequences of this type of occurrences are sensitive equipment dropout and possible full-process or industrial-line disruption, with the obvious customer economic losses and complaints. Voltage sags usually last until network faults are cleared, and typically range from a few milliseconds to several seconds. To mitigate voltage variations can be used dynamic voltage restorers (DVR). This equipment is a relatively new static var device that has seen applications in a variety of distribution and subtransmission applications. DVR is a series compensator which is able to protect a sensitive load from the distortion in the supply side during fault or overloaded in power system. In this way, the DVR injects a voltage on the network in order to correct any disturbance affecting the critical load voltage [2], [3], [4]. One of the main issues for the control of the DVR is the method to detect voltage variations. Several methods have been proposed. The most accepted ones are: 1) monitoring the peak values of the voltage supply [5] [6]; 2) monitoring of in a vector controller [6] [7] [8]; 3) locking a narrow bandpass filter or phase locked loop

978-1-4244-2134-3/08/$25.00 ©2008 IEEE

(PLL) to each phase [6] [9]; 4) applying the Fourier transform to each phase [6] [10], and 5) applying the wavelet transform to each phase [6] [11]. The objective of this paper is to study and analyze a new compensation voltage control scheme. A control method based on the input-output linearization applied to the DVR it was investigated. This paper is organized into five sections. The first one is this introduction. In section II it is presented the proposed new compensation voltage control. The control of the power converter it is presented in section III. The effectiveness of the proposed approach is presented in section IV. In this section it is presented several simulation results. These results are obtained using a Matlab/Simulink-based simulator. Finally, in section V will be presented the conclusions of this work. II.

DVR REFERENCE VOLTAGE GENERATOR

Fig. 1 shows the one line diagram of a DVR. This device consists in a rectifier, three or single phase inverters, DC storage capacitor, transformers and a low pass filter.

Fig. 1. Schematic diagram of a typical DVR.

The typical three-phase DVR uses three single-phase inverters to control the voltage insertion to each phase. This has the advantage to operate each phase independently without affecting the other two phases. In this way, it is obtained the benefits in the simplicity and independent control and analysis. Another advantage of

140


this structure is that the zero sequence voltage can be injected into the system.

Fig. 2. Main circuit of the DVR.

As can be seen by Figs 1 and 2, the control system of the DVR is dependent of the voltage variation detection, injected voltage reference vref generation and control of this injected vCf voltage. When the source voltage is at its normal level, the DVR should be offline. When there is disturbance in the voltage source, the DVR must go online very quickly and inject the required voltage to maintain the critical load voltage with the required level. The dc/ac converter should control the transformer voltages in order to compensate for any disturbance affecting the load voltage. Three main blocks are required to control this converter: detection of voltage variation, generation of the voltage references and PWM modulator. For the detection of the voltage variation, it is proposed a method based on the alfa/beta vector magnitude

vαβ . This vector presents a constant nominal

value when there is no voltage variation. In this way, it is only necessary to use the Clark-Concordia transformation (1), and to calculate the alfa/beta vector magnitude. ªvα º « » = ¬v β ¼

2 3

ªvsa º − 0.5 º « » ª1 − 0.5 » «vsb » « ¬0 0.866 − 0.866¼ « » ¬vsc ¼

(1)

The vector magnitude that is used is given by the following expression:

vαβ error =

(vα − vα ref )2 + (vβ − vβ ref )2

(2)

It is considered a voltage variation when the vector magnitude (2) is greater then a threshold value (3).

vαβ error ² vthreshold

(3)

The generation of the voltage references ( vα ref and

vβ ref ) requires the synchronization with the supply voltage. For the synchronization of the DVR to the supply voltage it is used Phase-Locked-Loop (PLL). A typical phase-locking structure is based on the estimation of the difference between phase angle of the input signal and that of a generated output signal. This difference should be regulated to zero value to zero by means of a control loop. This is done using a phase detector, a lowpass filter and a voltage controlled oscillator (VCO). However, this structure is slow and disturbances in the utility voltages can cause large transient tracking errors [12] [13]. In this way new structures have been proposed. One of the fast PLL scheme is based on the use of the Clark-Concordia transformation and a PI controller [14]. However, in this work it was used a similar structure as can be seen by Fig. 3. In this structure, instead of use a PI controller it was used a sliding mode controller due to his fast dynamic response, robustness and system order reduction.

Fig. 3. Block diagram of the proposed PLL structure and generation of the voltage references.

This structure uses an analogy between PLL signals and the basic quantities from Akagi’s pq theory [7, 8]. The Į and ȕ components of the input voltages are obtained from the measured supply voltages through the Clarke-Concordia transformation. The sum of the products of the individual components ( vα with the cos( θ ) and v β with sin( θ )) can be interpreted as being analogous to the “instantaneous real power,” according to Akagi’s pq theory. If this sum is equal to zero then the estimated θ is synchronized with the source voltages. In this way, this quantity will be the input error signal for the sliding mode controller. The sliding surface is given by: S = vα f iα

+ v β f iβ

(3)

In order to ensure that the sliding surface is equal to zero (angle θ synchronized with the source voltages) the following control law is obtained:

V. FERNÃO PIRES, GIL MARQUES, J. F. MARTINS AND J. FERNANDO SILVA: DYNAMIC

ω = + ωo ° ® ° ω = −ω o ¯

, if S > 0

(4) , if S < 0

The sum of the products of the individual components will converge to zero for the sliding mode controller in order to reach steady state with a constant output frequency. This condition is only achieved as a stable equilibrium point when the functions f iα and f iβ (fictitious currents) are 90ƕ ahead of the Į and ȕ components of the measured supply voltages, since in this case the input of the sliding mode controller will average to zero. The generation of the compensation voltage references is based on a combination of the supply and load voltage in the alfa/beta coordinates and the use of the voltage references ( vα ref and vβ ref ) as can be seen by Fig. 4. The comparison between the supply and load voltage in the alfa/beta coordinates gives the converter voltage references.

141

III. CONVERTER CONTROL SCHEME In single and three-phase dc/ac power converters, normally it is used pulse width modulation (PWM) technique. However, using techniques such as SPWM presents some problems such as large noise peaks at the multiple numbers of carrier frequencies. In this way, a control method based on the input-output linearization [16] [17] applied to the power converter of the DVR is proposed. The state-space model of the circuit can be obtained (for each phase):

° ° ® ° ° ¯

diL f dt

=−

1 1 vC f + α VDC Lf Lf

(5)

dvC f

1 1 iL f − Io = dt Cf Cf

Where α is the input control function. Lets consider the reference voltage and his error *

~

(6)

vcf = v − v

Introducing equation (6) in equation (5) the following equation is derived: ~

Cf Fig. 4. Principle of the voltage reference frame.

However, in converter control open loop such us SPWM [15], this is not enough since the voltage drop across the filter inductor and other parameters such as the transformer must be compensated. So, the error between the voltage references and the load voltage in alfa/beta coordinates will be used as the input of the PI controller. The output of this controller is added to minimize any steady state error in the fundamental component (Fig. 5).

d vcf dt

*

= Cf

d vcf dt

+ iL f − I o

(7)

Equation (7) is a linear time dependent differential equation. To synthesize a controller using input-output linearization technique, let’s define a control law: *

Cf

d vcf dt

~

+ iL f − I o = − K vcf

(8)

Introducing equation (8) into (7), equation (9) is derived. ~

Cf

d vcf dt

~

= − K vcf

(9)

Equation (9) represents the dynamics of the system in closed loop with the control action given by (8). It is a first order linear homogeneous equation and guarantees that the error vCf vanishes in a time constant:

τ = Fig. 5. Generation of the converter references.

Cf K

(10)

142


In this way, the control system with the control law given by (8) will be controlled appropriately because the error will be zero as fast as wanted, depending on the constant k . SIMULATION RESULTS

IV.

Several simulations of the DVR with the proposed compensation voltage scheme and a power converter control method based on the input-output linearization have been made. These simulations where performed using the Matlab/Simulink program. The system parameters used in this study are presented in Table I. TABLE I PARAMETERS OF THE TEST SYSTEM

Description Source voltage Frequency Inductor filter Capacitor filter

Value 230 VRMS 50 Hz 1 mH 10 μF

Several different tests where performed. First, with the system operating in the steady state for two cycles, voltage sag occurs in which all phases of the supply voltage drop to 0.70 times their nominal value. Voltage sag may be caused by the drastic amount of fault current, the switching of heavy loads, or the starting of large motors. Fig. 6 shows the three-phase voltage source and, the system response is shown in Fig. 8, and in Fig. 9 the three-phase voltage load. It can be seen that the sag does have impact on the load voltages as they are maintained during this period. It is clear from Figs. 7 and 8 that the DVR voltage follows the reference voltage closely. Fig. 10 shows another test. In this case a voltage swell that can be caused by a rapid reduction in power loads or the turn-off of heavy equipment. Fig. 11 shows the threephase DVR voltages and Fig. 12 shows the three-phase voltage load. From these figures it is possible to verify that this disturbance does have impact on the load voltages.

Fig. 7, Three-phase DVR reference voltages.

Fig. 8, Three-phase DVR voltages.

Fig. 9, Three-phase load voltages.

Fig. 6. Three-phase source voltages.

Since the generation of the voltage references requires the synchronization with the supply voltage, several tests have been made in order to verify the behavior of the proposed PLL. Figs. 13 and 14 show the obtained results in one of the tests that have been made to verify the synchronization of the DVR to the supply. Fig. 13 shows

V. FERNÃO PIRES, GIL MARQUES, J. F. MARTINS AND J. FERNANDO SILVA: DYNAMIC

143

the input source voltage with a phase jump. At time t = 40 ms there is the supply voltage phase jumps. From Fig. 14 it is possible to verify that the PLL tracks the positive sequence component of the supply. This response also shows that the PLL has a fast response time and it starts tracking the new angle of the supply.

Fig. 13, Single-phase source voltage.

Fig. 10. Three-phase source voltages.

Fig. 14, PLL response.

V.

Fig. 11, Three-phase DVR voltages.

CONCLUSIONS

A new compensation voltage control scheme for a DVR was proposed in this paper. This control is based on the Clark-Concordia transformation and a new PLL structure. The proposed PLL structure is based on a sliding mode controller due to his fast dynamic response, robustness and system order reduction. To control the DVR power converter it was used a method based on the input-output linearization. The proposed control method has been presented a fast response characteristic. Several simulation results were presented. From these results it was possible to validate the proposed strategy for the detection and control of the DVR. These results also have shown that the DVR compensation is fast and the source voltage fault can be compensated by series voltage injection.

Fig. 12, Three-phase load voltages.

ACKNOWLEDGMENT Authors thank the CIEEE – “Center for Innovation in Electrical and Energy Engineering” of IST/TU Lisbon and POSC – “Programa Operacional da Sociedade do Conhecimento” for partial financial support of this work.

144


REFERENCES [1]

[2] [3]

[4]

[5]

[6]

[7]

[8]

[9]

[10]

[11] [12]

[13]

[14]

[15]

[16] [17]

P. Wang, N. Jenkins, and M. H. J. Bollen, “Experimental investigation of voltage sag mitigation by an advanced static var compensator,” IEEE Trans. Power Delivery, vol. 13, pp. 1461– 1467, Oct. 1998. N. H. Woodley, L.Morgan, A. Sundaram, “Experience with An inverter-Based Dynamic Voltage Restorer,” IEEE Trans. On Power Delivery, vol.14, no.3, pp.1181-1186, July 1999. S.S. Choi, B.H. Li, and D.M. Vilathgamuwa, “Dynamic voltage restoration with minimum energy injection,” IEEE Trans. Power Syst., vol. 15, pp. 51-57, 2000. J. G. Nielsen and F. Blaabjerg, “Comparison of system topologies for dynamic voltage restorers,” in Proc. IEEE/IAS’01 Conference, pp. 2397–2403, Chicago, 2001. C. Zhan, C. Fitzer, V. K. Ramachandaramurthy, A. Arulampalam, M. Barnes, and N. Jenkins, “Software phase-locked loop applied to dynamic voltage restorer (DVR),” in Proc. IEEE-PES Winter Meeting, 2001, pp. 1033–1038. Chris Fitzer, Mike Barnes, and Peter Green, “Voltage Sag Detection Technique for a Dynamic Voltage Restorer”, IEEE Transactions on Industry Applications, vol. 40, no. 1, january/february 2004. V. Kaura and V. Blasko, “Operation of a phase locked loop system under distorted utility conditions,” IEEE Trans. Ind. Applicat., vol. 33, pp. 58–63, Jan./Feb. 1997. John Godsk Nielsen, Michael Newman, Hans Nielsen, and Frede Blaabjerg, “Control and Testing of a Dynamic Voltage Restorer (DVR) at Medium Voltage Level”, IEEE Transactions on Power Electronics, vol. 19, no. 3, May 2004. Antony C. Parsons, W. Mack Grady, Edward J. Powers, “A Wavelet-Based Procedure for Automatically Determining the Beginning and End of Transmission System Voltage Sags”, IEEE Proceedings of PES Winter Meeting 1999, Vol. 2, pp1310-1315. H. S. Song and K. Nam, “Instantaneous phase-angle estimation algorithm under unbalanced voltage-sag conditions,” Proc. IEE— Generation, Transmission, Distrib., vol. 147, no. 6, pp. 409–415, Nov. 2000. D. Gregory, C. Fitzer, and M. Barnes, “The static transfer switch operational considerations,” in Proc. PEMD Conf., Apr. 16–18, 2002, pp. 620–625. V. Kaura and V. Blasko, “Operation of a Phase Locked Loop System Under Distorted Utility Conditions”, IEEE Transactions on Industry Applications, vol. 33, no. 1, 1997, pp. 58-63. L. N. Arruda, B. J. Cardoso Filho, S. M. Silva, S. R. Silva and A. S.A.C. Diniz, “Wide Bandwidth Single And Three-Phase Pll Structures For Grid-Tied PV Systems”, Twenty-Eighth IEEE Photovoltaic Specialists Conference, September, 2000, pp. 16601663. L. G. Rolim, R. R. Costa Jr. and Maurício Aredes, “Analysis and Software Implementation of a Robust Synchronizing PLL Circuit Based on the pq Theory,” IEEE Trans. Ind. Electronics, vol. 53, nº 6 pp. 1919–1926, December 2006. Michael John Newman, Donald Grahame Holmes, John Godsk Nielsen, and Frede Blaabjerg, “A Dynamic Voltage Restorer (DVR) With Selective Harmonic Compensation at Medium Voltage Level”, IEEE Transactions on Industry Aplications, vol. 41, no. 6, pp. 1744-1753, November/December 2005. Jean-Jacques Slotine, and Weiping Li, “Applied Nonlinear Control”, Prentice Hall, 1991. G.D. Marques, “Control of a AC/DC Voltage Converter Based on Input-Output Linearization”, in Proceedings of 6th ELECTRIMACS Conference, September 1999.