Dynamical Sliding-Mode Control of the Boost Inverter - Semantic Scholar

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 9, SEPTEMBER 2009

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Dynamical Sliding-Mode Control of the Boost Inverter Domingo Cortes, Member, IEEE, Nimrod Vázquez, Member, IEEE, and Jaime Alvarez-Gallegos, Senior Member, IEEE

Abstract—The boost inverter is a device that is able to generate a sinusoidal voltage with an amplitude larger than the input voltage. Based on the idea of indirectly controlling the output voltage through the inductor current, a dynamical sliding-mode controller for the boost inverter is proposed in this paper. Unlike the usual approach of generating a sinusoidal voltage in both capacitors of the boost inverter, the strategy proposed in this paper focuses on generating a sinusoidal voltage on the load despite the voltage form of both capacitors. A consequence of doing so is that only the desired output voltage is required as reference to implement the controller. Furthermore, it has a fast response, is robust under load and input voltage variations, and yet, is remarkably simple to implement. Although it is strongly nonlinear, it can be implemented using standard electronics circuitry and only needs voltage measurements. Index Terms—Boost inverter, current control, inverters, sliding-mode control, variable structure systems.

I. I NTRODUCTION

I

T IS KNOWN that the design and control of inverters are challenging problems of practical importance [1], particularly for those used in uninterruptible power supplies (UPSs). This has motivated an intense research in this area, both in the search of new topologies [2], [3] and the proposals of better control strategy [1], [4]–[6]. This paper presents a robust, nonlinear, and easy-to-implement controller for a recently proposed topology. Based on the key observation that the traditional inverter can be seen as two buck dc/dc converters connected differentially through the load, an inverter topology regarded as the boost inverter was proposed in [2]. Consisting in two boost dc/dc converters, the boost inverter is able to generate, in a single stage, a sinusoidal voltage with a larger or smaller amplitude than its input dc voltage. Due to its boosting capability, the boost inverter has drawn the attention of many researchers. Among other applications, it has been applied in UPS systems [3], [7], [8]. Nevertheless, control difficulty is still a matter of concern in the design process of a boost inverter. Manuscript received December 17, 2007; revised May 9, 2008 and August 11, 2008. First published November 25, 2008; current version published August 12, 2009. This work was supported in part by CONACYT Mexico under Grant 44969. D. Cortes is with the Departamento de Ingeniería Eléctrica, Centro de Investigación y Estudios Avanzados del Instituto Politécnico Nacional, Mexico City 07360, Mexico (e-mail: [email protected]). N. Vázquez is with the Instituto Tecnológico de Celaya, Celaya 38010, Mexico (e-mail: [email protected]). J. Alvarez-Gallegos is with the Computing Research Center, National Polytechnic Institute, Mexico City 07738, Mexico (e-mail: [email protected]). Digital Object Identifier 10.1109/TIE.2008.2010205

It is known that the average model of the boost dc/dc converter is a bounded-input nonlinear nonminimum phase with a highly varying parameter system [9], [10]. Moreover, a fast system response and robustness under load and input voltage variations are required. These characteristics and requirements make the boost converter difficult to control. A great effort has been dedicated to cope with this problem, resulting in a variety of solutions [10]–[14]. Since the boost inverter is formed by two boost dc/dc converters, it is even more difficult to control. Furthermore, in the case of the boost inverter, the control goal is the tracking of a sinusoidal signal instead of the easier regulation problem of the dc/dc conversion. Until now, the control of the boost inverter has been achieved by controlling each boost dc/dc converter separately. In this approach, each boost converter is controlled to generate a sinusoidal voltage. Generated voltages have a phase shift of 180◦ , such that the load voltage is a sinusoid with twice the amplitude of the sinusoid generated by each converter. Since a boost dc/dc converter cannot generate a voltage lower than its input dc voltage, the sinusoid generated by each boost dc/dc converter must be mounted on a dc voltage. Under certain system properties, which the boost dc/dc converter has, a controller which achieves regulation can also achieve tracking if the reference signal is slow enough [15]. Hence, by controlling each boost converter separately, any controller proposed for the boost converter could be used for controlling the boost inverter with more or less success. The control of the boost inverter by controlling each boost dc/dc converter separately has been successfully achieved in [7], [16], and [17]. However, such controllers have some disadvantages. In spite of the control technique employed, two controllers are needed for the overall system, each one with its own reference. In addition, the dc part of each reference must be canceled to achieve a non-dc-mounted sinusoid across the load. Instead of the traditional approach of controlling each boost dc/dc converter separately, in this paper, a single controller focused on generating a sinusoidal voltage on the load despite the voltage in both capacitors is proposed for the first time. The resulting controller is very easy to implement and does not need current sensors, and only the desired output voltage is required as reference. In addition, it has a fast response and is robust under input voltage and load variations. In Section II, the boost inverter and its control problem are described. The controller proposed is developed in Section IV. Since it is based on the current-mode control idea, this is briefly examined in Section IV-A, while the sliding-mode controller (SMC) is revisited in Section IV-B. Using the

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Combining both models results in (3a)

z˙2a

(3b)

Fig. 1. Boost inverter.

z˙1b z˙2b

Fig. 2. Boost inverter: Representation to emphasize that it is formed by two boost converters.

current-mode-control underlying idea, an SMC is proposed in Section IV-C. In Section V, simulations and experimental results are examined. In particular, the experimental results shown in Section VI confirm the predicted performance and robustness of the controller. Conclusions are given in the last section. II. B OOST -I NVERTER -C ONTROL P ROBLEM Fig. 1 shows a diagram of the boost inverter. The same circuit is shown in Fig. 2 to emphasize that it consists of two boost dc/dc converters with the load connected differentially. Note that the two power supplies shown in Fig. 2 are indeed the same. Using the Kirchhoff’s laws, a model for each switch position can be obtained as 1) For ua = 1 and ub = 1 Vin L z2a − z2b =− RC Vin = L z2b − z2a . =− RC

z˙1a =

(1a)

z˙2a

(1b)

z˙1b z˙2b

(1c) (1d)

2) For ua = 0 and ub = 0 Vin − z2a L z1a z2a − z2b + =− RC C Vin − z2b = L z1b z2b − z2a + =− RC C

z˙1a =

(2a)

z˙2a

(2b)

z˙1b z˙2b

(2c) (2d)

where z1a and z1b are the currents through the inductor of converter A and B, respectively. z2a = Va and z2b = Vb are the capacitors’ voltages.

Vin − (1 − ua )z2a L (1 − ua )z1a z2a − z2b + =− RC C Vin − (1 − ub )z2b = L (1 − ub )z1b z2b − z2a + . =− RC C

z˙1a =

(3c) (3d)

System (3) is a discontinuous model for the boost inverter. It should be pointed out that “discontinuous” here refers to the fact that ua and ub can only have two values; consequently, the right-hand side (RHS) of model (3) is discontinuous. This fact should not be confused with the discontinuous operation mode that arises in power converters when the inductor current falls to zero within a switching period. Indeed, switches for inverters are implemented such that the discontinuous operation mode is avoided. From model (3), it is possible to obtain an average (continuous) model which is commonly used to control the boost inverter. In this paper, the discontinuous model is mainly used; however, the control objective and other relationships are more conveniently expressed in terms or average variables. t The average of a function f (t) is given by f˜(t) = (1/T ) t−T f (s)ds, where T is the switching period. The objective of the boost inverter can be expressed as follows: to design switching policies for ua and ub such that Δ V˜o = z˜2a − z˜2b → Vref ,

Vref = A sin(ωt)

(4)

with a suitable speed of convergence and robustness under load and input voltage variations. Parameters A and ω are the amplitude and frequency of the desired ac voltage, respectively. III. U SUAL A PPROACH TO THE C ONTROL OF THE B OOST I NVERTER Until now, the common approach to the control of the boost inverter has been to control each boost dc/dc converter separately. The idea is the following: If VR √ 2 sin(2πωt) 2 VR √ 2 sin(2πωt) = Vdc − 2

z2a = Vdc +

(5)

z2b

(6)

√ then Vo = VR 2 sin(2πωt) (see Fig. 2). The problem can thus be reduced to controlling each boost dc/dc converter to generate a dc-biased sinusoidal voltage. Therefore, instead of the fourthorder model [(3)], the second-order system Vin − (1 − u)z2 L (1 − u)z1 z2 z˙2 = − + RC C

z˙1 =


(7a) (7b)

CORTES et al.: DYNAMICAL SLIDING-MODE CONTROL OF BOOST INVERTER

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can be used for each converter and pose the control objective as follows: Given the model (7), design a switching policy for u such that z˜2 → z2ref

(8)

where z2ref = Vdc ± (VR /2) sin(2πωt). Several works dealing with the control of the boost inverter in this way have been published. In particular, in [3], [7], [17]–[19], interesting experimental results are reported. Some of these works are summarized in the following. A. State Error Sliding-Mode Control With reference to the variables of model (7) corresponding to one boost converter, in [7], the following sliding-mode control is proposed: σ = k1 (z2 − z2ref ) + k2 (z1 − z1ref ) 0, if σ > 0 u= 1, if σ < 0.

(9a) (9b)

It is not clear how the reference for the inductor current z1ref should be. In [7], there is not an expression for this signal. Nevertheless, to implement the control law (9), z1ref is obtained from z1 passing it through a high-pass filter. Hence, z1ref is not a (exogenous) reference indeed. As it has been pointed out in [17], using such a filter can lead z1 to have very large values in the transient. The constants k1 and k2 must be carefully selected to avoid closed-loop instability. These facts diminish an otherwise simple and robust controller. The same kind of controller is used in [2] and [3]. B. TLC A two-loop control strategy (TLC) was proposed in [17]. With reference to the variables of model (7), this (average) controller can be expressed as Vin − VLref (10a) 1−u ˜= z˜2 t VLref = kpc (ILref − z˜1 ) + kic (ILref − z˜1 )dt (10b) 0

where ILref is the output of the outer loop and is specified by z˜2 ILref = (Ic + Io ) (11a) Vin ref t Icref = kpv (Voref − z˜2 ) + kiv (Voref − z˜2 )dt (11b) 0

where Io is the output current. The controller described by (10) and (11) involves four integrators (two for each boost) in addition to several divisors and multipliers. Moreover, two voltages and four currents need to be measured in the control of the overall system. These facts increase the difficulty of the controller implementation. Note that, despite the control technique employed, two controllers are needed for the overall system if the boost dc/dc converters are considered separately, each one with its own

Fig. 3. Current-mode-control modulator. Current signal Sn and sawtooth signal Se are added and compared with voltage Vc to control the duty cycle.

reference. In addition, the dc part of each reference must be canceled to achieve a non-dc-mounted sinusoid across the load. Furthermore, min(z2a ) = min(z2b ) > max(Vin ). According to (5), this means that Vdc > max(Vin + Vo /2). In contrast, the controller presented in the next section focuses on generating a sinusoidal signal on the load in spite of the capacitors’ voltages. It only requires the desired load voltage as a reference which eliminates the major drawback that poses the dc cancellation in controllers proposed until now. IV. P ROPOSED C ONTROLLER First, the current- and sliding-mode controls are revisited in this section. Then, an SMC is proposed to accomplish the underlying idea of the current-mode control. The controller focuses on generating an ac voltage on the load rather than on the capacitors. A. Current-Mode Control Current-mode control [20], [21], also regarded as currentprogramming control, has been successfully used in the control of power converters. A simplified implementation diagram of the current-mode control, taken from [21], is shown in Fig. 3. Vc is called the control voltage, Sn is a signal proportional to the inductor current, and Se is an external signal. Let us suppose that Se = 0 (indeed, this was true in the first implementations of current-mode controllers). Then, it can be said that the Δ idea behind the circuit of Fig. 3 is to make Sn = kil = Vc . That means that the modulator makes the inductor current to be controlled by Vc which is a function of the voltage error. Usually, the block Gcm (see Fig. 3) is a proportional–integral (PI) controller; in this case, the circuit goal is to make iL = −kp (Vo − Vref ) − ki (Vo − Vref )dt. In current-mode control, signal Se is introduced to stabilize the circuit when the duty cycle is larger than 0.5 [20]. The current-mode-control idea has been shown to be related with the backstepping design procedure [22]. B. Sliding-Mode Control Consider the system ξ˙ = f (ξ) + g(ξ)usm + usm , if σ(ξ) < 0 usm = u− sm , if σ(ξ) > 0


(12) (13)

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where ξ ∈ n , f and g are continuous vector fields, and σ(ξ) is a continuous function such that σ˙ =

∂σ(ξ) ˙ ξ ∂ξ

(14)

+ depends on usm . u− sm and usm are two different constant values. + In the case of power converters, u− sm and usm take 0 and 1, respectively. In [23], it is proved that, if the system trajectory evolves on the sliding surface σ = 0, then this trajectory is described by

˙ ˜ + g(ξ)u ˜ eq ξ˜ = f (ξ)

be used to indirectly control the output voltage. According to the current-mode-control idea t z1a − z1b = −kp (Vo − Vref ) − ki

t σ = z1a − z1b + kp (Vo − Vref ) + ki

(20) From (3), inductor currents z1a and z1b can be written as t z1a = t z1b =

(16)

Vin − ua z2b L

dt + z1a (0)

(21)

dt + z1b (0).

(22)

0

where ka and kb are constant values and (D) is a continuous function. A useful property of this kind of surfaces is that its equivalent control and, hence, its closed-loop stationary state performance are the same, independent of ka and kb values. In fact, σ(ξ, ˙ usm ) = ka D(ξ, usm ) = 0 has the same solution for usm no matter what the values of ka and kb are.

Then, σ in (20) can be expressed as t σ= 0

Vin − (1 − ua )z2a L

t

−

Vin − ua z2b L

dt + z1a (0)

dt − z1b (0)

0

C. Controller Derivation

t

Unlike previous approaches, where each boost dc/dc converter is controlled separately and the switches of the circuit are independent, in this paper, the switches are considered to be complementary, i.e., ub = 1 − ua in model (3). Given system (3), the dynamical sliding-mode control is proposed 1, if σ(z, t) < 0 (17) ua (t) = 0, if σ(z, t) > 0 1 L

Vin − (1 − ua )z2a L

0

0

σ=

(Vo − Vref )dt = 0. 0

t D(ξ, usm )dτ + kb

(19)

should be accomplished. To implement this idea, (19) can be posed as the sliding surface

(15)

˙ = 0 and is regarded as where ueq is the solution for u of σ(ξ) the equivalent control of the controller (13). In [23], it is also shown that the equivalent control is the average of usm that is ˜sm . ueq ≈ u Let us consider a surface of the form σ = ka

(Vo − Vref )dt 0

t

(Vo − Vref )dt.

(23)

0

According to the discussion of Section IV-B, the initial conditions z1a (0) − z1b (0) can be dropped without affecting the system behavior. Eliminating the initial conditions in (23) and after straightforward simplifications, (18) is obtained. D. Controller Analysis Proposition 1: Consider the system (3) with ua = 1 − ub and the controls (17) and (18). Let R, Vin , L, C, kp , and ki be positive constants. If

(ua (τ )z2b (τ ) − (1 − ua (τ )) z2a (τ )) dτ 0

t + kp (Vo (t)−Vref (t)) + ki

+ kp (Vo − Vref ) + ki

(Vo (τ )−Vref (τ )) dτ

Vin > max(kp V˙ ref + ki Vref ) t L

0

(18) which resembles the underlying idea of the current-mode control as it is shown in the following. For the sake of notation simplicity, the argument (t) will be dropped from functions hereafter. In the boost inverter, the output voltage is the difference between the voltages through both capacitors. Therefore, instead of using a single inductor current to control its correspondent capacitor voltage, the difference of both inductor currents can

(24)

then any trajectory of the system (3) goes into a sliding motion on the surface σ(x, t) = 0. Proof: The proof is divided in two parts. First, the surface σ = 0 will be shown to be locally attractive. Second, any trajectory will be shown to hit the surface within the attraction zone. From (18), the derivative of σ along the system trajectories is σ˙ =

ub z2a ua z2b − + kp (V˙ o − V˙ ref ) + ki (Vo − Vref ). (25) L L



For the first part of the proof, two cases are considered. 1) Case 1: σ < 0. From the switching policy (17), ua = 1, and ub = 0. Hence, σ˙ > 0 in the following set: S1 = (z ∈ 4 |kp V˙ o (t) − V˙ ref (t) z2b

(26) + ki (Vo − Vref ) > − L where z = (z1a , z2a , z1b , z2b ). 2) Case 2: σ > 0. In this case, ua = 0, and ub = 1. Consequently, σ˙ < 0 in the following set: S2 = (z ∈ 4 |kp V˙ o (t) − V˙ ref (t) z2b

. (27) + ki (Vo − Vref ) < L Thus, σ σ˙ < 0 in the set S1 ∩ S2 := S, i.e., z2a < kp V˙ o (t) − V˙ ref (t) S = (z ∈ 4 | − L

Therefore, a sliding motion takes place on σ = 0 when the system trajectory hits the surface within the set S. Now, it is shown that any trajectory eventually hits the surface σ = 0. Suppose that σ < 0 at a certain time, then ua = 1, and ub = 0. Thus, the system is described by z˙1a =

(29a)

z˙2a

(29b)

z˙1b z˙2b

(29c)

Vin − kp V˙ ref − ki Vref . L

(30)

z˙1a =

(31a)

z˙2a

(31b)

z˙1b z˙2b

σ˙ → −

Vin − kp V˙ ref − ki Vref . L

(32)

Again, from condition (24), σ˙ eventually becomes negative, and the system trajectory eventually hits the surface σ = 0. Thus, the trajectory reaches the surface σ = 0 from any point z ∈ 4 . When the system evolves on the sliding surface, (19) is accomplished; hence, the inductor currents become a kind of PI controller for the output voltage. Since the tracking of the sinusoid is not asymptotic but approximated, perturbation methods could be used to formally prove that, indeed, the output voltage Vo is close enough to Vref . Nevertheless, such controller [i.e., (19)] had been tested for a long time in many practical conditions [17], [20], [21]. The simulation and experimental results of the next sections reaffirm this fact. Note that condition (24) gives an insight for choosing the controller parameters. V. S IMULATION R ESULTS

From condition (24), it follows that σ˙ eventually becomes positive, and hence, the system trajectory eventually hits the surface σ = 0. On the other hand, when σ > 0, the system becomes described by Vin − z2a L z1a z2a − z2b + =− RC C Vin = L z2b − z2a . =− RC

TABLE I SIMULATION PARAMETERS

(29d)

Hence, z → (∞, Vin , 0, Vin ), and according to (25), it is obtained that σ˙ →

Fig. 4. Hysteresis loop was used in simulations instead of (17).

Hence, z → (0, Vin , ∞, Vin ). From (25), it results to

z2b

. (28) + ki (Vo − Vref ) < L

Vin L z2a − z2b =− RC Vin − z2b = L z1b z2b − z2a + . =− RC C

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(31c) (31d)

The controller performance was evaluated in simulation. To limit the switching frequency a hysteresis loop was used, see Fig. 4. The parameters of Table I proposed in [17] are used in this section. PN is the inverter nominal power, and fs is the switching frequency. The PI controller included in (18) was designed to have a phase margin of 110◦ and a bandwidth of about 330 Hz. These values correspond to kp = 0.3133 and ki = 1333. Fig. 5 shows the reference and the rated performances of the boost-inverter model (3) controlled by the dynamical SMC (DSMC) given by (17) and (18). In this situation, the converter supplies a load of 32.3 Ω. The capacitor voltage and inductor current of converter A are shown in Fig. 6. It is interesting to note from Figs. 5 and 6 that each capacitor voltage is not sinusoidal. However, their difference, i.e., the output voltage, is sinusoidal. As it is known, in a boost dc/dc converter, the capacitor voltage cannot be smaller than Vin in steady state. That is why it is interesting to note in Fig. 6 that the capacitor voltage has


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Fig. 5. Nominal performance of the proposed controller.

Fig. 6. Nominal capacitor voltage (top in V) and inductor current (bottom in A) of the proposed controller.

Fig. 7. Performance of the proposed controller under load variations.

a dc component that is large enough to assure that it never falls below Vin , and this dc voltage is adjusted automatically by the controller without measuring Vin . To examine the performance of the controller under load variations, a simulation where the load was changed according to R = 32.3(1 + pR sign(sin(2π100t))), with pR = 0.15, was carried out. In other words, the load was perturbed by a 100-Hz square-wave disturbance with an amplitude of 30%. The results obtained are shown in Fig. 7. It can be observed that the controller is robust under large load variations. Note that the

Fig. 8.

Performance of the controller proposed in [17] under load variations.

Fig. 9.

Block diagram of the controller.

voltage variations at the instant when the load changes are small, and the system has a fast recovery. For comparison purposes, the performance under load variations of the TLC proposed in [17] and given by (10) and (11) was also simulated. Each boost converter is controlled separately in this scheme; hence, two references are needed. The reference Voaref = 226 + (220/ (2)) sin(2π50t) was used. The other parameters are the same as those in Table I. For these parameters in [17], a phase margin of 130◦ and a bandwidth of 4 kHz is proposed for the PI controller of the inner loop. The PI controller of the outer loop is proposed to have the same phase margin and a bandwidth of 400 Hz. These specifications correspond to kpc = 0.643, kic = 7598.7, kpv = 0.643, and kiv = 759.87. The results obtained with the TLC are shown in Fig. 8. Comparing Figs. 7 and 8, it can be observed that both controllers are robust under load variations. However, note that voltage variations at the instant when the load changes are smaller for the system controlled by the DSMC. Furthermore, it has a faster recovery. VI. I MPLEMENTATION I SSUES AND E XPERIMENTAL R ESULTS As it was mentioned in Section IV-B, the performance of an SMC is not affected if σ is multiplied by a constant. This fact can be explained by observing that the sliding-mode control modifies the switch position to take the system phase to the surface σ = 0. Hence, if the RHS of (18) is multiplied by a constant, the surface defined by σ = 0 remains the same.



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Fig. 10. Controller implementation. TABLE II PARAMETERS USED IN PRACTICAL SETTING

Fig. 12. Rated performance. (Top to bottom) Voltage on capacitors, output voltage, and inductor current.

Defining KP = Lkp and KI = Lki , σ can be written as t (ua z2b − (1 − ua )z2a ) dt

σ = ksm 0

Fig. 11. Startup performance. (Top to bottom) Capacitor 1 voltage, capacitor 2 voltage, and output voltage.

t + ksm KP (Vo − Vref ) + ksm KI

t (ua z2b − (1 − ua )z2a ) dt 0

t

+ Lksm kp (Vo − Vref ) + Lksm ki

(Vo − Vref ). 0

(34)

0

Multiplying the RHS of (18) by Lksm results σ = ksm

(Vo − Vref ).

(33)

The introduction of the gain ksm gives an extra freedom to select the electronic components to build σ. Fig. 9 shows a block diagram of the controller. Note that the electronic implementation of each block is straightforward. The switching logic block limits the switching frequency. An implementation of this block diagram, which was used to obtain the experimental results described in the following, is shown in


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Fig. 13. Performance under load variations. (Top to bottom) Voltage on capacitors, output voltage, and load current.

Fig. 15. Performance under input voltage variations. (Top to bottom) Input voltage, capacitor 1 voltage, and output voltage.

Fig. 14. Performance under load variations. (Top to bottom) Voltage on capacitors, output voltage, and load current.

Fig. 16. Performance when supplying a nonlinear load. (Top to bottom) Voltage on capacitors, output voltage, and load current.

Fig. 10. Notice that each analog switch is implemented by a combination of an operational amplifier and a diode. Instead of a hysteresis loop, a comparator is used to limit the switching frequency as it is proposed in [24]. Component values were chosen in order to have ksm = 83.9, KI = 2.5, and KP = 0.03 [see (34)]. The inverter used for experiments has the parameters shown in Table II. Fig. 11 shows the inverter startup. In this case, the input voltage was already present when the controller was turned on. Fig. 12 shows the rated performance of the controlled inverter. In this situation, the inverter supplies a resistive load of 100 Ω The total harmonic distortion was of 4%. As it was predicted in the simulations, each capacitor voltage is not sinusoidal but the output voltage is.

The controller performance under significant load variations is shown in Fig. 13. In this experiment, the load was suddenly changed from 200 to 100 Ω. Fig. 14 shows a zoom of the moment when the load change takes place. The perturbation on the capacitors and the output voltage are appreciated in this figure. Note that they are really small and only take 1 mS to get stabilized. Fig. 15 shows the controller response under input voltage variations. The source voltage was changed from 60 to 40 V. In this case, it is observed that variations have an appreciable effect on the capacitor voltages but not on the output voltage. Particularly note that, when the input voltage changes, the dc component of the voltage on capacitors is automatically adjusted. This adaptation is not possible in schemes with two



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TABLE III COMPARISON BETWEEN THE SCHEME WITH TWO CONTROLLERS PROPOSED IN [19] AND THE PROPOSED CONTROLLER

controllers. In fact, in schemes with two controllers, the dc part of the voltage on capacitors has to be set by design, usually assuming the worst case. It should be pointed out that this perturbation rejection is achieved without measuring the output current and neither the input voltage. The performance of the controlled inverter is shown in Fig. 16. It is interesting to observe that, in spite of the rapid change of the current demanded by the load, no perturbation is appreciated in the output voltage. Table III summarizes a comparison between the inverter controlled by the scheme with two controllers proposed in [19] and the one controlled by the proposed scheme in this paper. Note that, under nominal conditions given in the table, the harmonic contents and, hence, the energy loss in the conversion are a little more higher in the proposed controller. However, in the scheme with two controllers, Vdc is constant. The nominal value of Vdc = 150 V makes the controller nonrobust under input voltage variations. To improve the robustness, Vdc has to be increased. However, if Vdc is incremented, losses on the converter become higher than the proposed controller. Furthermore, a bad selection of Vdc in schemes with two controllers may result in saturation if the input voltage changes, making the inverter unable to generate the desired voltage. Since the proposed controller adjusts the dc component of the voltage on capacitors, it does not have these problems. VII. C ONCLUSION The underlying idea of the current-mode controller and some facts coming from the sliding-mode-control theory have given rise to the controller for the boost inverter proposed in this paper. This controller is endowed with a simple design and construction and a high performance. A remarkable feature of the controller is that, even if it does not depend on the output current and neither on the input voltage, it is robust under load and input voltage variations. Extensive simulations and practical experiments have shown that perturbations have no significant effect on the output voltage. Although the controller is easy to implement, it is strongly nonlinear. However, the source of its nonlinearity is not due to multipliers, divisors, and other complicated circuitry but to the

use of small power switches and the feedback of the control output within the control circuit itself. R EFERENCES [1] G. Escobar, P. R. Martínez, and J. Leyva-Ramos, “Analog circuits to implement repetitive controllers with feedforward for harmonic compensation,” IEEE Trans. Ind. Electron., vol. 54, no. 1, pp. 567–573, Feb. 2007. [2] R. O. Cáceres and I. Barbi, “A boost DC–AC converter: Analysis, design, and experimentation,” in Proc. IEEE IECON, Orlando, FL, Nov. 1995, pp. 546–551. [3] N. Vázquez, C. Aguilar, J. Arau, R. Cáceres, I. Barbi, and J. Alvarez, “A novel uninterruptible power supply system with active power factor correction,” IEEE Trans. Power Electron., vol. 17, no. 3, pp. 405–412, May 2002. [4] J. Rodríguez, J. Pontt, C. Silva, P. Correa, P. Lezama, P. Cortés, and A. Ulrich, “Predictive current control of a voltage source inverter,” IEEE Trans. Ind. Electron., vol. 54, no. 1, pp. 495–503, Feb. 2007. [5] H. Deng, R. Oruganti, and D. Srinivasan, “A simple control method for high-performance UPS inverters through output-impedance reduction,” IEEE Trans. Ind. Electron., vol. 55, no. 2, pp. 888–898, Feb. 2008. [6] G. Escobar, P. Hernandez-Briones, P. Martinez, M. A. Henandez-Gomez, and R. Torres-Olguin, “A repetitive-based controller for the compensation of 6 ± 1 harmonic components,” IEEE Trans. Ind. Electron., vol. 55, no. 8, pp. 3150–3158, Aug. 2008. [7] R. O. Cáceres and I. Barbi, “A boost DC–AC converter: Analysis, design, and experimentation,” IEEE Trans. Power Electron., vol. 14, no. 1, pp. 134–141, Jan. 1999. [8] M. Rashid, Power Electronics: Circuits, Devices and Applications, 3rd ed. Englewood Cliffs, NJ: Prentice-Hall, Aug. 2003. [9] G. Escobar, R. Ortega, H. Sira-Ramírez, J.-P. Vilain, and I. Zein, “An experimental comparison of several nonlinear controllers for power converters,” IEEE Control Syst. Mag., vol. 19, no. 1, pp. 66–82, Feb. 1999. [10] D. Cortes, J. Alvarez, J. Alvarez, and A. Fradkov, “Tracking control of the boost converter,” Proc. Inst. Elect. Eng.—Control Theory Appl., vol. 151, no. 2, pp. 218–224, Mar. 2004. [11] H. Sira-Ramírez and M. Rios-Bolívar, “Sliding mode control of dc-to-dc power converters via extended linearization,” IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 41, no. 10, pp. 652–661, Oct. 1994. [12] H. Sira-Ramírez, “Flatness and trajectory tracking in sliding mode based regulation of dc-to-ac conversion schemes,” in Proc. 38th IEEE Conf. Decision Control, Phoenix, AZ, Dec. 1999, pp. 4268–4273. [13] T. Siew-Chong, Y. M. Lai, C. K. Tse, L. Martínez-Salamero, and W. Chi-Kin, “A fast-response sliding-mode controller for boost-type converters with a wide range of operating conditions,” IEEE Trans. Ind. Electron., vol. 54, no. 6, pp. 3276–3286, Dec. 2007. [14] T. Siew-Chong, Y. M. Lai, and C. K. Tse, “General design issues of sliding-mode controllers in dc–dc converters,” IEEE Trans. Ind. Electron., vol. 55, no. 3, pp. 1160–1174, Mar. 2008. [15] H. Khalil, Nonlinear Systems, 3rd ed. Englewood Cliffs, NJ: PrenticeHall, 2001. [16] N. Vázquez, J. Alvarez, C. Aguilar, and J. Arau, “Some critical aspects in sliding mode control design for the boost inverter,” in Proc. IEEE CIEP, Morelia, Mexico, Oct. 1998, pp. 76–81.


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[17] P. Sanchis, A. Ursaea, E. Gubia, and L. Marroyo, “Boost DC–AC inverter: A new control strategy,” IEEE Trans. Power Electron., vol. 20, no. 2, pp. 343–353, Mar. 2005. [18] N. Vázquez, J. Alvarez, and J. Arau, “Passivity-based control for the boost inverter: Details of implementation,” in Proc. Congreso Latinoamericano de Control AutomAático, CLCAAt, Oct. 2002. CD-ROM. [19] N. Vázquez, D. Cortes, C. Hernández, J. Alvarez, J. Arau, and J. Alvarez, “A new control strategy for the boost inverter,” in Proc. IEEE PESC, Acapulco, Mexico, Jun. 2003, pp. 1403–1407. [20] R. D. Middlebrook, “Modeling current-programmed buck and boost regulators,” IEEE Trans. Power Electron., vol. 4, no. 1, pp. 36–52, Jan. 1989. [21] R. Ridley, “A new continuous-time model for current-mode control,” IEEE Trans. Power Electron., vol. 6, no. 2, pp. 271–280, Apr. 1991. [22] J. Alvarez-Ramírez, G. Espinosa-Pérez, and D. Noriega-Pineda, “Currentmode control of DC–DC power converters: A backstepping approach,” in Proc. IEEE Int. Conf. Control Appl., Mexico City, Mexico, Sep. 2001, pp. 190–195. [23] V. Utkin, “Sliding modes in control and optimization,” in Communications and Control Engineering. New York: Springer-Verlag, 1991. [24] T. Siew-Chong, Y. M. Lai, and C. K. Tse, “Implementation of pulsewidth-modulation based sliding mode controller for boost converters,” IEEE Power Electron. Lett., vol. 3, no. 4, pp. 130–135, Dec. 2006.

Domingo Cortes (M’05) was born in Chiapas, Mexico. He received the B.S. degree in electronics engineering from the National Polytechnic Institute (IPN), Mexico City, Mexico, in 1994 and the Ph.D. degree in electronics engineering from Centro de Investigacion Cientifica y de Educacion Superior de Ensenada, Ensenada, Mexico, in 2004. He was the Head of the Computing Engineering Department, Computing Research Center, IPN (2007–2008). He is currently with the Departamento de Ingeniería Eléctrica, Centro de Investigación y Estudios Avanzados del Instituto Politécnico Nacional, Mexico City, Mexico. His fields of interest are mechatronics, computer engineering, and power electronics.

Nimrod Vázquez (M’98) was born in Mexico City, Mexico, in 1973. He received the B.S. degree in electronics engineering from the Instituto Tecnológico de Celaya, Mexico City, in 1994 and the M.Sc. and Ph.D. degrees in electronics engineering from the Centro Nacional de Investigación y Desarrollo Tecnologico, Cuernavaca, Mexico, in 1997 and 2003, respectively. He is with the Instituto Tecnológico de Celaya, Celaya, Mexico. His fields of interest include dc/ac converters, power-factor correction, and nonlinear control techniques.

Jaime Alvarez-Gallegos (SM’97) was born in Tampico, Mexico. He received the B.S. degree in electronics engineering from the National Polytechnic Institute (IPN), Mexico City, Mexico, in 1973 and the M.Sc. and Ph.D. degrees in electrical engineering from the Centro de Investigación y Estudios Avanzados del Instituto Politécnico Nacional (CINVESTAV), in 1974 and 1978, respectively. He was the Head of the Department of Electrical Engineering, CINVESTAV (1992–1996) and the Director of the School of Interdisciplinary Engineering and Advanced Technologies, IPN (1997–2000). He is currently the Director of the Computing Research Center, IPN. He was a Visiting Professor at the Imperial College of Science and Technology, London, U.K., in 1985–1986. His fields of interest are mechatronics, power electronics, optimization methods, and nonlinear control systems.
