ECG computer-based system - CiteSeerX

ECG computer-based system Todor Stoyanov, Nikolay Mudrov, Ivaylo Christov, Ivan Dotsinsky ___________________________________________________

We developed a PC based ECG system with synchronous signal acquisition from all electrode locations, total power-line interference elimination, real-time presentation of selected groups of leads on the monitor screen and simultaneous signal storing in the PC RAM of an epoch of about 10 minutes, followed by transfer to the HD. The software allows multiple opening, processing and closing of the initially memorized ECG files, baseline wander suppression, file contents exploration by means of a program-viewer, QRS and ectopic beats detection and printing of messages and signal traces. Разработена е ЕКГ система за персонален компютър (ПК), която приема синхронно сигналите от всички електроди чрез допълнително изолиран усилвател, отстранява напълно мрежовите смущения и представя в реално време на екрана на монитора избрани групи от отвеждания, които записва в RAM-а на ПК и прехвърля в твърдия диск след регистриране на епоха от около 10 min. Програмата позволява многократно отваряне, обработка и затваряне на вече запаметените ЕКГ файлове, потискане на дрейфа на нулевата линия, детектиране на QRS комплекси и екстрасистоли, анализ на сигналите и отпечатване на съобщения и графики. ___________________________________________________

Introduction Recently, the personal computer (PC) performances open various possibilities for research of sophisticated problems in the field of the biomedical signal analysis and especially in electrocardiography, leading to essential improvement of the diagnostic process. An ECG computer based system has to acquire, process, analyse, classify and visualize the standard leads, as well as to allow the application of advanced examinations and tests, for example micro-potentials analysis (late potentials, His potentials), stress-test, HRV (heart rate variation) analysis, etc. We developed a PC based ECG system having the following main performances: • synchronous signal acquisition from all electrode locations (the two arms, the left leg and the six chest points), with sampling rate SR=1 kHz; • real-time presentation of selected groups of leads on the monitor screen, including total power-line interference elimination; • simultaneous signal storing in the PC RAM of an epoch of about 10 minutes, followed by data transfer to the hard disk (HD); • multiple opening, processing and closing of the initially memorized ECG files; • baseline wander suppression; • file contents exploration by means of a programviewer allowing zoom in, zoom out, rescaling and

Electrotechniques & Electronics “E+E”, 1-2/2002

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manual measurement of amplitudes and timeintervals; QRS and ectopic beats detection; printing of messages and signal traces of processed and analyzed epochs.

Front-end floating amplifier The floating amplifier is built in accordance with strong requirements for small size, low weight and low consumption. Therefore the number of op. amps is reduced and the digital CMOS section is simplified by transferring the main part of the data flow processing to a PC-connected µP module. The amplifier channels are only eight. Each of them (Fig. 1) consists of one non-inverting op. amp. in the first stage, followed by a RC circuit with time-constant of 3.2 s and a next non-inverting op. amp. The powerline interference is suppressed by body driving [1, 2]. The left leg potential F is compared to the ground and the inverted difference is fed back to the body, thus rejecting the common mode voltage at the inputs of the channels R, L, C1÷C6. The effect is equal to that of the well-known instrumentation amplifier, obtained by larger number of op. amps. Besides, this type of driving yields eight differences R-F, L-F, C1-F÷C6-F with a gain of k1*k2=200. They are biased by the voltage Uref, multiplexed, AD converted to unsigned numbers and sent in serial format to the µP module through an opto-coupler.

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K1 =10

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N TS ST MXClk Fig. 1. Front-end floating amplifier

The acquired eight differences (called primary leads, for brevity) are transformed to the standard 12leads [3] by a simple PC-software procedure, before their visualization. The TIMER generates pulse sequences. The basic sequence TS (Fig. 2) controls the sampling period. Its first half includes 10 pulses Ch of 20 µs width, each one followed by 30 µs pause. The second half of TS is a pause of 500 µs. The sequence Ch is within the TIMER and is used for the generation of ST, MX and Clk pulses. The signal ST coincides with the onset of the 20 µs Ch pulse, starting the ADC. The beginning of the 30 µs Ch pause results in a MX pulse, which increments the decimal counter CNT, thereby controlling the multiplexer MUX. During the period of 30 µs the ADC receives a burst of 15 clock pulses Clk, transmitting via its serial output the sequence OUT. It contains a start bit bS=1, followed by 12 bits (b12 through b1) of the already converted signal and 2 zero bits. This is repeated 8 times in succession. Then the 2 last pulses run empty data, ignored by the µP module. No means are provided for TIMER and CNT initialization with the power switching-on, because the TIMER is organized as a ring counter and all sequences are self-adjustable. They become correct

2*500 µs TS 20µs 30 µs Ch ST MX OUT bS b12..b10 0

bS x .. x 0 0 Fig. 2. Time diagram of the TIMER pulse sequences


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after a first transfer of digitized primary leads. It is necessary to point out once again, that at first glance such a structure without microprocessor does not seam explicitly rational and well founded. However, thus the chip number is reduced, the total consumption of the analog and digital parts from the transverter is decreased to less than 15 mA and the size and weight of the front-end part are very convenient for floating signal acquisition. It could be mounted in the patient cable branching box and supplied by a battery. The elaborated floating amplifier may be easily adapted to a radio-frequency link to the µP module. µP module The most difficult problem when using a PC for real-time signal acquisition and continuous display is how to combine the WINDOWS facilities for trace drawing, with the inability of the PC for fast servicing of equally spaced external interrupt requests, even in running the corresponding program under DOS. This is true for all types of interfacing, except for the still not fully disclosed possibilities of the universal serial bus (USB). Another problem is the simultaneous use of two clocks – one for sending the signal samples and another - for their acquisition in the PC. In such a case a drop of a byte or an overlap of 2 bytes in the receiving part are inevitable after a period depending of the clock frequencies difference. We developed a µP structure including two small RAMs with alternating functions. During 100 ms, counted by the amplifier clock, one of them is open for writing-in, while the other one is available for reading by the PC program and vice versa. The program execution is synchronized with the µP module, which controls the writing-in and generates a signal every 100 ms. At this point the program sets an internal timer for 90 ms, reads consecutively the 1600 bytes in groups of 16, processes the primary lead samples and runs the real-time trace visualization. This is done for about 60 ms, largely before the set time is elapsed. For the last 10 ms an internal interrupt initiates a polling procedure to recognize the incoming signal from the µP module. Thus a continuous leads display is achieved and any byte drop or overlap is eliminated by the fact that the transfer control uses the amplifier clock only. The pulse sequences from the floating amplifier enter the 2 serially connected three-state 8-bit shift registers SR1 and SR2 (Fig. 3), by the opto-coupler. Each time the bS bit reaches the fifth position of SR2,


the local TIMER generates a latch signal transferring the SR contents into their output registers, after that the SRs are cleared by the Cl signal. Then the pulses en2 and en1 enable consecutively the output registers of SR2 and SR1 for two-byte data transfer through a buffer in the RAM currently used for writing, e.g. BUF1 enabled by E1 and RAM1. This is done by two pulse pairs. The pulse Clk increments the counter CNT1, which controls the address locations, where the data is written-in using WR1. The RAM1output register and BUF3 are disabled during 100 ms by appropriate signals on OE1 and ET. The buffer BUF2 is disabled, the RAM2 output register is enabled by OE2 and the PC clock ClkPC together with PC pulses EPC control the RAM2 locations and the BUF4 during the data transfer into the PC. At the beginning of the next 100 ms the counters CNT are cleared (not shown in the Figure). They alternate the received clocks Clk and ClkP. The two RAMs and the four buffers change their functions. This change includes the swap of the disabling signal ET and the PC pulses enabling EPC between BUF3 and BUF4. PC program 1. PC configuration The PC program is implemented using a simple configuration: 300 MHz Pentium processor, 64 Mbytes RAM, 2.5 Gbytes HD, monitor with 2Mbytes video RAM, ink-jet printer and WINDOWS 95 or 98. 2. Data transfer and interference elimination The first 100 ms of the data are used for initialization. Then groups of 16 bytes are read in sequence. The two-byte samples are allocated as primary lead samples in a small buffer, created during the initialization. A procedure for power-line interference elimination is applied [4] without affecting any ECG frequency components, including the power-line frequency. The procedure is based on signal averaging and interference extraction from the intervals of near to zero frequency. Further, the extracted values are subtracted from the remaining part of the signal, with respect to the phase of the interference. The sum of a few of samples used for averaging is updated by subtracting the oldest value in the buffer and adding the new received one. Finally, the processed primary lead samples are written in the PC RAM.

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opto-coupler

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b1 |……………….. |b8 SR1

b9 |….|b12 | bs | 0 | 0 | 0 SR2

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ET en2 en1 Clk WR1 OE1 WR2 OE2

100 ms

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bS latch Cl E1 E2 ET EPC en2 en1 Clk WR1

OE1 WR2 OE2 ClkPC

Fig. 3. µP module with the corresponding pulse sequences


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4. Data transfer on HD and processing of ECG files The part of RAM used for real-time ECG signal storing has a capacity of about 10 min. The data may be transferred on the HD, enabling thereby another, virtually continuous writing in the RAM. The epoch may become longer if the PC RAM capacity is higher then 64 Mbytes. Some software utilities are implemented for facilitating the processing of the memorized signals. A viewer-menu is available for opening, modification and closing of already created files. The user may zoom selected ECG parts, set marks on the signal by the mouse cursor and obtain measured intervals and amplitudes. He may also manually correct possibly false- detected QRS complexes, ectopic beats, wave onsets and offsets, etc. The baseline drift is suppressed by a two-pass digital filter, applied consecutively forward and backward, thus canceling distortions provoked by the non-linear-phase properties of the filter [3]. The cutoff chosen is 0.64 Hz, being above the standard value of the first-order RC circuit with 3.2 s time-constant. Therefore the filter has a high efficiency, as shown by the example in Fig. 5.

Fig. 4. Real time display of 3 leads on the PC monitor. The vertical line at the centre of the screen is the boundary between the new coming data and the old one

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3. Real-time visualization The 12 standard leads are computed. The user may choose for observation one group of 3 or 6 leads or keep the primary leads, with the advantage of supervising the quality of all electrode connections. A special triad of traces is offered too. The selected II, aVF and V1 leads have the advantage to be quasiorthogonal and V1 better reflects the atrial activity. Usually the number of the samples exceeds the number of points necessary for visualization on the monitor screen with the standard time-scale of 25 mm/s. Most of the samples are ignored, but the signal peaks must be preserved. Therefore, extremes are searched for a period of N consecutive samples and are fed to the WINDOWS drawing program. The value of N depends on the sampling rate and on the monitor resolution. The drawing program is called during about 60 ms only, but it uses the accumulated samples while drawing the traces, until the end of the 100 ms, without any apparent jitter. An example of 3 leads, shown in real time on the screen and printed in pause mode, is given in Fig. 4.

0 -2 -4 -6

Fig. 5. Forward and backward filtration by a recursive high-pass filter for baseline wander suppression.

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Fig. 6. QRS detection in a case of strong baseline wander and electromyographic noise

A slope method for QRS detection was developed [5]. It is based on the comparison between the absolute value abs(D) of the differentiated ECG and a threshold value M. A QRS complex is detected if abs(D) ≥ M. Moving average filtering is applied to reduce eventual electromyographic noise after the differentiation. The method is adaptive and selfadjustable to the wave slope, independently of amplitude and sampling rate. QRS detection in a case of strong baseline wander and electromyographic noise is shown in Fig. 6. An algorithm for onset and offset detection of QRS complexes and ectopic beats is also implemented [6]. The onsets are investigated using two criteria. The first is satisfied if at least 2 large equal-signed increments or decrements are consecutively present in an interval of 40 ms. The second criterion allows low slew rate waves to be detected. It is activated by a pair of opposite-signed high amplitudes in 240 ms interval. The offsets are marked when samples within 40 ms do not differ by 60 µV in amplitude. The efficiency of the algorithm is demonstrated in Fig. 7, where especially difficult cases are selected. Asterisks mark the QRS complexes. Circles point out the onsets and offsets. Discussion Some electronic medical equipment manufacturers offer various ECG computer based systems. The type of data transfer they use is a company secret. The realtime display of the signals is not in all cases


Fig. 7. Demonstration of the algorithm for onset and offset detection of the QRS complexes and ectopic beats suppression

perfect, without jitter, loss of bytes or is a quazi-realtime process. The proposed system operates perfectly in real time and yields possibilities for intelligent ECG signal analysis and automatic diagnostics.

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The system is open for including of additional and/or improved functions. An update, we are presently developing, consists of: • tremor suppression in the signals; • diagnostic classification using the Minnesota-code and/or Washington-code criteria; • HRV analysis; • transform of the standard 12 leads into the 3 linear orthogonal Frank-leads with subsequent synthesis of vectorcardiogram loops. We also intend to elaborate a front-end amplifier for electroencephalogram signal acquisition together with appropriate software for frequency analysis and zero-derivative method application. REFERENCES [1] Levkov, C.L. Amplification of biosignals by body potential driving. Med. Biol. Eng. Comput., 20, pp. 248-250, 1982. [2] Levkov, Ch.L. Amplification of biosignals by body potential driving. Analysis of the circuit performance. Med. Biol. Eng. Comput., 26, pp. 389-396, 1988 [3] Daskalov, I.K., Dotsinsky, I.A. and Christov, I.I. Developments in ECG acquisition, preprocessing, parameter measurement and recording. IEEE Eng. in Med. Biol., 17, pp. 50-58, 1998. [4] Доцински, И. и Даскалов, И. Потискане на мрежови смущения в електрокардиограмата. Електроника и електротехника, No 5/6, pp. 32-38, 1996. [5] Christov, I. and Stoyanov, T. Steep slope method for real time QRS detection. 10-th Conference with International Participation “ELECTRONICS ET’2001”, Sozopol, September, 2001, (in press).

[6] Dotsinsky, I. and Christov, I. Detection of QRS complexes and ventricular ectopic beats in the electrocardiogram. International Scientific Colloquium, Ilmenau, Band 2, pp. 99-103, 1997. ________________________ Res. Eng. Todor V. Stoyanov graduated from the Technical University of Sofia, Faculty of Electronic Engineering, Division of Electronic Medical Equipment, with an MS degree in 1999. The same year he joint the Biosignal Analysis Department at the Centre of Biomedical Engineering of the Bulgarian Academy of Sciences. He is presently working on PC aided electrocardiographs e-mail: [email protected] Assoc. Prof. Nikolay Mudrov, PhD, graduated from the Technical University of Sofia, Faculty of Electronic Engineering, with an MSc degree in 1973. His PhD thesis was on pacemaker patients monitoring. He is presently with the Centre of Biomedical Engineering of the Bulgarian Academy of Sciences. His research interests are in the field of biosignal monitoring, electrical stimulation, cardiac defibrillation. Assoc. Prof. Ivaylo I. Christov, PhD is presently with the Centre of Biomedical Engineering of the Bulgarian Academy of Sciences. He graduated from the Technical University of Sofia, Faculty of Electronic Engineering, Division of Medical and Nuclear Engineering, with an MS degree in 1979. His PhD thesis was on Acquisition Processing and Recording of electrocardiographic signals. His present fields of interest include microcomputer ECG, EEG and EGG instrumentation, biosignal analysis and simulation, portable recorders, etc. e-mail: [email protected] Prof. Ivan A. Dotsinsky¸ PhD, DrScEng graduated from the Technical University of Sofia, Faculty of Electrical Engineering in 1959. His PhD thesis was on the statistical assessment for reliability of electrical and electronic circuitry. In 1994 he joints the Centre of Biomedical Engineering of the Bulgarian Academy of Sciences. He is lecturing at the Faculty of Electronic Engineering and Technology of the Technical University of Sofia. From 1999 till 2001 Prof. Dotsinsky was holding a diplomatic position abroad. e-mail: [email protected]

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