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Effect of Temperature on Impedance Behavior of Insulation Layer in a HTS MEMS Switch for RF Applications Yazan Hijazi, A. Bogozi, Mariya Brzhezinskaya, Jose Martinez, J. Burke, Julian Noel, Yuriy A. Vlassov, and Grover L. Larkins, Jr.
Abstract—We have successfully developed High Temperature Superconducting (HTS) MicroElectroMechanical (MEM) switches for RF applications. A typical switch is composed of a superconducting Yttrium Barium Copper Oxide (YBa2 Cu3 O7 ) coplanar waveguide structure with a gold bridge membrane suspended above an area of the center conductor covered with Barium Titinate (BaTiO3 ) ferroelectric. A control voltage applied between the membrane and transmission line causes the membrane to collapse on top of the dielectric layer by electrostatically induced force; this in turn allows the RF signal to capacitively shunt to ground. Initial testing of switches showed very promising RF behavior with insertion losses less than 0.1 dB with 30 dB isolation at 3 GHz. These switches rely on the “ON/OFF” impedance ratio to achieve switching; this is determined by the dielectric constant of the BaTiO3 ferroelectric. These switches will be operated at cryogenic temperatures; we have investigated the impedance behavior vs. temperature of the HTS/ferroelectric/metal heterostructure to better understand the behavior of the insulating layer at cryogenic temperatures. Index Terms—BaTiO3 , HTS, MEMS, YBa2 Cu3 O7 .
I. INTRODUCTION AND BACKGROUND
T
HE demand for high speed, very low loss, and durable switches is constantly on the rise especially in the area of RF communication systems. MEMS switches offer a very attractive alternative to semiconductor-based switches such as GaAs FET’s and PIN diodes [1]–[8]. MEMS switches can be operated in shunt or series mode and can be adapted to a wide range of switching applications from single switch implementations to switch arrays to perform signal routing or phase-shift arrays. In the most basic RF shunt configuration, a control voltage causes a suspended membrane to collapse on top of a dielectric patch deposited on top of an RF transmission line (microstrip/coplanar waveguide-CPW), forming a capacitive shunt to ground (Fig. 1). The combination of HTS (near zero microwave losses), with low loss, small size, high isolation RF MEMS switches, while making use of frequency agile ferroelectrics promises to offer a wide variety of new devices with very low intermodulation Manuscript received October 4, 2004. This work was supported by the U.S. Air Force Office of Scientific Research under Grant F49620-02-1-0044. Y. Hijazi, M. Brzhezinskaya, J. Martinez, J. Noel, and G. L. Larkins, Jr. are with the Florida International University, Miami, FL 33174 USA (e-mail:
[email protected];
[email protected]; larkins@ eng.fiu.edu). Y. A. Vlassov is with the Florida International University, Miami, FL 33174 USA, on leave from the Ioffe Physico-Technical Institute, St. Petersburg, Russia (e-mail:
[email protected]). Digital Object Identifier 10.1109/TASC.2005.850133
Fig. 1. Switch in (a) up (b) down position.
distortion, and power consumption. These devices will have the ability to perform in-band frequency trimming such as tunable capacitors and resonators [9], phase shifters [10] and electro-optic modulators [11]. In earlier work we have successfully demonstrated the feasibility of incorporating MEMS-based High Temperature Sudevices (switches) with ferroelectric structures for perconductor (HTS) and frequency agile microwave resonators [12], [13]. Fig. 2 shows such a switch used to change the tap position of a “T” resonator with the switch at the bottom of the “T” (Fig. 2(c)). When the switch is in the up-position, this is an open circuit quarter wavethat translates a short circuit at length resonator the input to an open circuit at the resonant frequency; hence a notch in the response at 2 GHz (Fig. 2(a)). When the switch is in the down-position the notch disappears (Fig. 2(b)). The degree of invasiveness presented by the switch was calculated by assuming that an ideal (zero insertion loss) resonator will have an infinitely deep resonance; thus the insertion loss (IL) due to the switch at resonance (Fig. 2(a)) as: alone can be calculated from (1) It is important to note here that although the energy is not passing through the switch but around it, yet the presence of the switch presents a capacitive leak to ground; accordingly the definition of insertion loss here is slightly out of convention. This value is already an order of magnitude lower than the best available normal conductor MEMS switches [6], [7]. By
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Fig. 3. Two-theta plot for (1) PLD and (3) sputtered deposited BaTiO . Fig. 2. s response (a) up (b) down for “T” resonator implementation (c) 3D layout of device.
TABLE I COMPARISON OF DIFFERENT SWITCHING TECHNOLOGIES
Fig. 4.
varying the voltage beyond the actuation voltage (100 V typical) we achieved 15% tunability across the band by polling the dielectric material. Table I gives a comparison between semiconductor-based switching technologies and MEMS switches. Since this type of capacitive switches rely on the capacitance , it is crucial to pay ratio to achieve switching careful attention to the dielectric material. Thus investigating the properties of the ferroelectric material, especially at low temperatures, is important to understand its effect on the RF performance, and also aid in the design process. In this work we ferroelectric, and investigate further characterize the the effects of temperature on the material properties as quantified by the dielectric constant, dissipation factor, and available capacitance in the down position. II.
SURFACE CHARACTERIZATION
Two deposition methods for the ferroelectric layer have been utilized in switch fabrication; namely, Pulsed Laser Deposition (PLD) and RF magnetron sputtering, while PLD supercondeposition was used for the underlying ductor. These two methods produce significantly different films both in terms of surface topography and electrical (stoichiometrical) properties. The main differences between the two methods
SEM images of sputtered (left) and PLD (right) deposited films.
are the temperature (680 for PLD, 35 for sputtering), deposition time (1 hr PLD, 5 hrs sputtering), and environment (200 for PLD, Ar gas for sputtering). The sputtering of the mTorr material in the absence of was a forced compromise as it was caused a back sputtering problem, which found that ionized severely hindered film growth. Comparing twotheta-theta X-ray diffraction measurements for both films reveals some epitaxial growth for the PLD deposited film, whereas the sputtered film shows no signs of epitaxy. This is fairly reasonable as the elevated deposition temperature and the ablative action of the laser in PLD provides sufficient energy for some preferential atomic registration, this is in contrast with the amorphous film sputtered (Fig. 3). Both films showed at 80 W of RF energy and 35 underlayer. good c-axis oriented The film thickness is around 200 nm for both deposition techniques, surface spectroscopy measurements using SEM and AFM demonstrate the difference in texture and surface roughness for the two types of deposition. The SEM images show that the PLD deposited film is composed of relatively large chunks of ablated material; this is in stark contrast with the sputtered film, which appears translucent on top of the HTS transmission line (Fig. 4). The AFM surface roughness analysis gives an rms surface roughness of 152 nm and 236 nm for the sputtered and PLD deposited films respectively (Fig. 5). It is important to note that the underlying HTS layer also contributes to the overall thickness; thus the actual roughness of the films is slightly lower.
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IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY, VOL. 15, NO. 2, JUNE 2005
Fig. 6.
Equivalent circuit model for dielectric film.
Fig. 7.
Capacitance versus temperature.
From a mechanical performance perspective it is advantageous to have a maximally flat surface for the underlying dielectric material, this would help alleviate any bridge stiction problems upon collapse. Accordingly the sputtered film is more suited from a mechanical performance perspective. From an suffers from shorting in RF perspective, the sputtered some areas, which may be due to inadequate film coverage, existence of pinholes, or oxygen deficiency. Therefore only the PLD film capacitance measurements will be presented.
and other ferroelectric crystals It is known that bulk display pure Debye resonances [15], [16]. For thin films the frequency response shows power law dependence with high dielectric losses [17]. This loss is in the dielectric and is represented is the isolation reby a parallel resistance R (Fig. 6), where sistance, and r and L are the resistance and self-inductance due to the test fixture and testing leads. This dielectric loss can be represented by the dissipation , which is the ratio of the reactive and resistive parts factor of the total impedance. In most applications utilizing ferroelectric media the aim is generally to reduce the dissipation factor in the medium; however in the case of the capacitive shunt RF MEMS switch the dissipative loss is irrelevant since the aim of the dielectric layer is to shunt/dissipate the RF signal to ground.
III. IMPEDANCE MODEL
IV. RESULTS AND DISCUSSION
As mentioned earlier the switch relies on the “ON/OFF” impedance ratio to achieve switching, in this case the impedance is mainly capacitive and is given by:
To measure the impedance of the film, heterostructures were patterned as parallel plate capacitors using conventional photolithography techniques. , this area was chosen to The capacitive area measures 4 facilitate testing though the actual capacitive area in the switch is much smaller. The capacitance, quality factor and dissipation factor were measured from room temperature down to 40 K using an HP4263 LCR meter, and a closed-cycle Janus refrigeration system. As expected the capacitance decreased with decreasing temperature with no drastic changes through the superconducting transition temperature (Fig. 7). This confirms that the film is insulating and free of pinholes. There was a 20% change in capacitance from room temperature down to 40 K (700 pF to 550 pF); this corresponds to a change in dielectric constant from 74 to 55.
Fig. 5. AFM roughness analysis of (a) PLD (b) sputtered BaTiO .
(1) (2) In the OFF (unactuated) position the capacitance is due to the series combination of the air and dielectric, whereas the dielectric layer determines the capacitance in the ON (actuated) position. An accepted ratio for such types of switches is 100. The switches discussed herein have a ratio of 1600.
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stabilizes; it is highly sensitive to applied voltage suggesting possibility of achieving better tunability. From the measured impedance response a dielectric value of 55 was extracted at 40 K, this value will consequently be used in the design instead of an earlier assumed value of 300. ACKNOWLEDGMENT The authors wish to acknowledge the support of the U.S. Air Force Office of Scientific Research REFERENCES
Fig. 8.
Dissipation factor versus temperature.
Fig. 9.
Dissipation and quality factor with applied bias at 40 K.
The dissipation factor follows a steep decrease of 0.04 to 0.005 from room temperature down to 138 K, after which stabilizes to within 5% down to 40 K (Fig. 8). The change in represents an order of magnitude change. The dissipation factor was highly sensitive to applied bias (Fig. 9) increasing from 0.015 to 0.14 with only 5 V of applied bias. V. CONCLUSION results in very smooth films that are adSputtered vantageous in minimizing membrane stiction; however the film electrical properties are not to par with the PLD film. It shows low resistance and even shorting in some regions. This could be due to incorrect stoichiometry or inadequate coverage and needs further investigation. Thus the ideal film lies somewhere beof PLD tween the PLD and sputtered films. The follows an exponential decrease down to 138 K after which it
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