Journal of the Korean Physical Society, Vol. 54, No. 1, January 2009, pp. 473477
Fabrication of Silicon-Oxide Thin Film by Using Ionized Physical Vapor Deposition and Application to Gate Insulators in Transparent Thin-Film Transistors
Woo-Seok Cheong, Chi-Sun Hwang, Jae-Heon Shin, Sang-Hee Ko Park, Sung-Min Yoon, Doo-Hee Cho, Minki Ryu, Chun-Won Byun, Shinhyuk Yang, Hye Yong Chu and Kyoung Ik Cho Transparent Electronics Team, Electronics and Telecommunications Research Institute, Daejeon 305-350
(Received 24 January 2008) Using an ionized physical vapor deposition (IPVD) apparatus, we formed a low-temperature silicon-oxide gate insulator (GI) for top-gate-type In-Ga-Zn oxide channel transparent thin- lm transistors (IGZO-TTFTs) for the rst time. IGZO-TTFTs with SiOx GIs (100 nm) showed a low gate leakage current of about 10 12 A up to 30 V (gate voltage) comparable to an AlOx GI fabricated by atomic layer deposition (ALD). However, it had a high drain o -current (10 8 A) with a low drain current on-o ratio of 10 2 A due to the inductively coupled plasma (ICP) stream during the IPVD-GI process. In order to protect an IGZO channel layer from the plasma e ect, we deposited a shallow AlOx (10 nm) layer on the IGZO by using ALD. Using this double-layered GI, a high mobility transistor (30.95 cm2 /sV) with a drain current on-o ratio of 106 could be achieved. PACS numbers: 07 Keywords: IPVD, Ionized physical vapor deposition, Silicon oxide, Transparent thin- lm transistor
character, this is a very hard material, so it takes a long time to deposit a GI lm of suitable thickness. SiOx and SiNx deposited by using PECVD can be candidates for larger areas and good productivity [3]. However, these materials have a problem related to hydrogen penetration into semiconductors. Other methods, such as superlattice (ATO, AlOx -TiOx ) and hybrid-type (inorganicorganic), have been tested for the purpose of reducing the process temperature and obtaining a good leakage character [4,5]. The hysteresis problem caused by di erent GI materials needs to be overcome. We have tried to nd a low-temperature GI process useful for transparent & exible displays. In this letter, we will introduce a newly designed IPVD apparatus, which combines an o -axis-type RF magnetron sputter and ICP reactor at the top position in order to obtain dense lms at the relatively low temperatures [6]. In the SiOx GI deposited by using IPVD, a good leakage character comparable to that of AlOx grown by using ALD can be shown.
I. INTRODUCTION
Recently, n-type oxide semiconductors have attracted much attention as potential candidates for organic light emitting display (OLED) backplanes, due to important advantages, such as high mobility (>10 cm2 /Vs), good uniformity and low processing cost [1]. In addition, because they are basically transparent, they can realize the next-generation transparent display products (headup displays (HUD) for cars and air planes, double-sided monitors, head-mounted displays (HMD), smart windows for shops, transparent LED, Radio frequency identi cation (RFID) and so on) with other transparent materials such as transparent substrates, electrodes, insulators and OLED lms. Furthermore, the transparent &
exible display can o er more diverse applications, but it needs additional technologies to overcome the process temperature limit (about below 200 C) because exible substrates like plastics have a weak tolerance to thermal budget. Specially, it is not simple to search and develop robust GI materials applicable to low-temperature processes. There have been several research e orts for the goal. Using a RF magnetron sputtering method at room temperature, the Y2 O3 GI applied to TTFTs showed low leakage currents [2]. In spite of the good leakage E-mail:
[email protected]; Fax: +82-42-860-5202
II. EXPERIMENTS
-473-
In order to compare SiOx grown by using IPVD with other sputtered GI lms, we deposited SiOx and SiNx by using the conventional RF magnetron sputtering method. In addition, AlOx grown by using ALD was used as the reference GI [7]. All gate insulators
-474-
Journal of the Korean Physical Society, Vol. 54, No. 1, January 2009
Fig. 1. (a) schematic description of the cross -section of a top-gate TTFT and (b) the top-view of the 40 { 20 (W-L) m pattern obtained by the optical microscopy.
had the same thickness (100 nm). Patterning processes for the top-gate TTFTs could be carried out by using UV-lithography and wet-etching techniques. For etching SiOx and SiNx , a diluted-HF solution was used, while for AlOx , 100 % phosphoric acid (120 C) was used. The photo-mask consisted of a series of patterns with various channel widths (W) and channel lengths (L) such as 1, 2, 5, 10, 20, 40, 60, 80 and 160 m. The 20 20 mm sized glass was used as the substrate. The source & drain and gate electrodes (150 nm) were made from an indiumtin-oxide target (ITO, weight percent (90 : 10)), which could be formed by using the dc magnetron sputtering method. A 25-nm-IGZO (In-Ga-Zn-oxide, composition ratio of the target = 1 : 1 : 1) as a semiconductor was formed by using the RF magnetron sputtering method, with 15 % O2 gas mixed with Ar gas under a working pressure of 1 5 mTorr [7]. After fabricating the devices, an annealing treatment was carried out at 300 C for 1 hour in an O2 ambient.
Fig. 2. Typical transfer curve of IGZO-TTFT with an AlOx GI fabricated by using ALD: (a) transfer curves and (b) output curves.
ricated by using four mask steps: namely, source and drain, active, metal contact and gate mask. From the optical microscope, the typical TTFT with a 40 { 20 (W-L) pattern (40-m channel width, 20-m channel length) is shown in Figure 1(b), where the lower two pads are the source and the drain while the upper two are for the gate. The small-sized rectangles in the pad are contact holes connecting the top pad to the bottom one. The transmittance of the device is over 80 %. Figure 2(a) illustrates typical dc transfer characteristics (logjId j-Vg ) and gate leakage current (log(jIg j)-Vg ) curves for IGZO-TTFT with AlOx (100 nm) grown by using ALD. The transfer curve shows a drain current on/o ratio of 108 , a subthreshold swing (SS) of 0.94 V/decade and a saturated mobility of 3.2 cm2 /sV. The gate leakage was below 10 12 A, showing a good leakage performance. Figure 2(b) shows the related drain current - drain voltage (Id -Vd ) curves, indicating currentsaturated characteristics.
III. RESULTS AND DISCUSSION
1. Top-gate IGZO-TTFT with an AlOx GI
Figure 1(a) schematically shows the cross-sectional structure for the top-gate IGZO-TTFT, which was fab-
2. Ionized Physical Vapor Deposition
Among the deposition methods, ALD can make the densest lm structure, obtaining a step-coverage of up to
Fabrication of Silicon-Oxide Thin Film by Using Ionized Physical { Woo-Seok Cheong et
al.
-475-
Fig. 3. Photographs showing (a) the ICP plasma and (b) the dual sputter guns (2' 7') located in the side of the chamber and at the o -axis to the substrate. Fig. 5. Transfer curves of an IGZO-TTFT (a) with a SiNx GI formed at 150 C by RF magnetron sputtering and (b) with a SiOx GI formed at 100 C by using IPVD.
Fig. 4. AFM results of sputtered-GI lms. (a) and (b) are SiOx obtained at the room temperature and at 100 C by using IPVD while (c) and (d) are SiOx and SiNx obtained by using the conventional RF magnetron sputtering method at 150 C.
100 %. The next method for a dense structure is chemical vapor deposition (CVD), but this demands high process temperatures. In general, physical vapor deposition (PVD), capable of deposition at the room temperatures, has the character of poor step-coverage and a not-fullystacked lm structure. It is possible that the denser lm is obtained by ionization of the sputtered atoms in the
sputtering method, even at room temperature. This is the concept of IPVD, which has been researched in many industry sectors, by using various reactors for ionization [6]. We newly designed and fabricated an IPVD apparatus using an ICP reactor as an ionization tool, where the ICP frequency ranged from 13.56 to 27.12 MHz and the ICP power could control the energy states of sputtered atoms. Figure 3(a) shows the ICP plasma region working at an O2 gas ow of 20 sccm at a pressure of 10 mTorr and a plasma power of 150 W and the plasma stream is coming from top to bottom along a circular cone. Figure 3(b) indicates 2-inch-high 7-inch-wide dual sputter guns (2' 7') working at a plasma power of 300 W and a pressure of 10 mTorr. The sputter guns are located on opposite sides of the chamber and are o -axis relative to the bottom substrate. This o -axis concept will reduce lm damage caused by sputtered atoms. The substrate can be rotated to improve lm uniformity, so the thickness uniformity of SiOx deposited on a 100 100 mm glass substrate was 2.04 % for a 200-nm-thick lm. Figure 4 shows AFM morphologies of various GI lms. Figures 4(a) and (b) are SiOx GI lms obtained at room temperature and at 100 C by using IPVD while Figure 4(c) and (d) are SiOx and SiNx deposited at 150 C by
-476-
Journal of the Korean Physical Society, Vol. 54, No. 1, January 2009
device being strongly a ected by both the plasma gases and the ionized atoms during the IPVD GI process.
3. High-mobility IGZO-TTFT with a SiOx GI
In order to protect the IGZO semiconductor from the plasma stream, we introduced a 10-nm-thick protective layer (PL) to the device, where IGZO and PL could be etched out together by using a dry-etching process. We fabricated the IGZO-TTFT structure, where AlOx (10 nm) deposited by using ALD was used as the PL. Figure 6(a) illustrates the dc transfer characteristic (logjId jVg ) and the gate leakage current (log(jIg j)-Vg ) curves for the IGZO-TTFT with SiOx (100 nm) deposited by using IPVD. The transfer curve shows a drain current on/o ratio of 106 , a subthreshold swing (SS) of 0.47 V/decade and a saturated mobility of 30.95 cm2 /sV. The mobility is about ten times larger than the one in the IGZO-TTFT with AlOx deposited by using ALD. In general, the eld e ect mobility strongly depends on the gate insulator and the insulator/semiconductor interface. The real reason for that will remain for the next study. Figure 6(b) shows the related drain current - drain voltage (Id -Vd ) curves, indicating high drain current levels and current-saturated characteristics. Fig. 6. Electrical properties of an optimized IGZO-TTFT with a SiOx GI fabricated by using IPVD and PL grown by using ALD: (a) transfer curves and (b) output curves. IV. CONCLUSION
using the RF magnetron sputtering method. The root mean square roughnesses (Rrms ) for them are 2.07, 1.64, 1.05 and 0.53 nm, respectively. SiOx GI lms deposited by using IPVD show small-sized hill & valley while SiOx and SiNx deposited by RF magnetron sputter deposition have higher projecting points in places, which can act as sources of high leakage current or low breakdown voltage. Figure 5(a) shows the transfer characteristics (logjId jVg ) and the gate leakage current (log(jIg j)-Vg ) curves for an IGZO-TTFT with a SiNx (100 nm) GI formed at 150 C by using the RF magnetron sputtering method, which is the same SiNx GI as in Figure 4(d). The gate leakage current increased rapidly, showing a weak breakdown characteristic (about 5 V (gate voltage)). Similarly, IGZO-TTFT with a SiOx GI deposited by RF magnetron sputtering at 150 C also showed a low breakdown behavior (not shown in this paper). Figure 5(b) presents the transfer curve for the IGZO-TTFT with the SiOx (100 nm) GI deposited at 100 C by using IPVD. SiOx GI deposited by using IPVD shows the low value of gate leakage, 10 12 A up to 30 V, comparable to AlOx deposited by using ALD as shown in Figure 2(a). However, the device shows a high drain o -current (10 8 A) and a low drain current on-o ratio of 10 2 A, which presumably results from the IGZO semiconductor of the
In order to obtain gate insulators with a good leakage character at low temperatures, we designed and made an IPVD apparatus, which combined two o -axis type RF magnetron sputters and an inductively coupled plasma (ICP) reactor. A SiOx GI deposited by using IPVD was applied to the fabrication of the IGZO-TTFT for the rst time. The SiOx GI had a low gate leakage current of about 10 12 A up to 30 V, but also a high drain o current (10 8 A) with a low drain current on-o ratio of 10 2 A due to the ICP plasma stream during the IPVD-GI process. In order to prevent plasma damage, we deposited a protective layer (AlOx , 10 nm) on IGZO by using ALD. Using this double-layered GI process, we have achieved high mobility transistors (30.95 cm2 /sV) with an on-o current ratio of 106 .
ACKNOWLEDGMENTS
This work was supported by the IT R&D program of Ministry of Knowledge Economy (Grant No. 2006S079-02, Smart Window with Transparent Electronic Devices).
Fabrication of Silicon-Oxide Thin Film by Using Ionized Physical { Woo-Seok Cheong et REFERENCES
[1] T. Iwasaki, N. Itagaki, T. Den, H. Kumomi, K. Nomura, T. Kamiya and H. Hosono, Appl. Phys. Lett. 90, 242114 (2007). [2] H. Yabuta, M. Sano, K. Abe, T. Aiba, T. Den, H. Kumomi, K. Nomura, T. Kamiya and H. Hosono, Appl. Phys. Lett. 89, 112123 (2006). [3] M. K. Kim, J. H. Jeong, H. J. Lee, T. K. Ahn, H. S. Shin, J. S. Park, J. K. Jeong, Y. G. Mo and H. D. Kim, J. Appl. Phys. Lett. 90, 212114 (2007).
al.
-477-
[4] A. Suresh, P. Wellenius, A. Dhawan and J. Muth, Appl. Phys. Lett. 90, 123512 (2007). [5] J. H. Noh, C. S. Kim, S. Y. Ryu and S. J. Jo, Jpn. J. Appl. Phys. 46, 4096 (2007). [6] U. Helmersson, M. Lattermann, J. Bohlmark, A. P. Ehiasarian and J. T. Gudmundsson, Thin Solid Films 513, 1 (2006). [7] W. S. Cheong, C. S. Hwang, S. H. K. Park, J. H. Shin, C. W. Byun. D. H. Cho, M. K. Ryu, S. H. Yang, S. M. Yoon, J. I. Lee, H. Y. Chu and K. I. Cho, MRS 2007 Fall Meeting, Proceeding Book, to be published.
