Family of Cascaded High-Voltage-Gain Bidirectional Switched-Capacitor DC–DC Converters Song Xiong Member, IEEE and Siew-Chong Tan Senior Member, IEEE Department of Electrical and Electronic Engineering The University of Hong Kong, Hong Kong Email:
[email protected]. Abstract—High-voltage-gain step-up DC–DC converters are required for the applications of distributed energy resources (DERs). A family of bidirectional switched-capacitor (SC) converters with high gain ratio of any positive integer are proposed in this paper. These converters are of high efficiency, easy to control, and are with low output voltage ripple of less than 1%. The proposed converters are also capable of delivering bidirectional power, which is a key requirement for the applications with battery storage. A prototype of 9-time SC converter at 20 V input voltage, 100 W output, 75 kHz, is built and tested. Experiment results show that the maximum efficiency of the 9-time SC converter is over 98% without driver’s loss and the efficiency over the entire load range between 25 W and 100 W is over 95.5% including the driver’s loss.
I. I NTRODUCTION The demand for distributed energy resources (DERs) such as photovoltaic (PV) arrays, thermoelectric generators (TEG) and fuel cells, has been growing at a significant rate. The outputs of these DERs resources are of DC voltage form and they are of relatively low level as compared with the required voltage of power grids [1], which is ranged from 200 V to 400 V [2]. High-efficient high-voltage-gain DC–DC converters are required to bridge the DERs to the grid [1]. The single-stage boost converter, which is the most common magnetic-based boost converter, can theoretically, in its ideal form, achieve any high-voltage-gain conversion M by increasing its duty ratio. However, parasitic resistance and the leakage inductance degrade the converter’s efficiency, and practically limit its overall achievable gain M [3]. To reduce the duty ratio of the boost converter, modifications by inserting extra circuits with coupled inductor, in-built transformer, switched-capacitor structure, or multiplier circuits have been proposed [1]–[6]. However, these topologies are only suitable for low power applications as the converter’s efficiency drops significantly at high power level, thereby limiting their ranges of operating loads. Besides, magnetic-based converters are unsuitable for application in the high temperature environment as the permeability will decrease significantly as temperature increases. It is inevitable that some DERs must be functional in a high temperature environment. Such DER includes the PV arrays and TEGs. Hence, with DERs that do not require using the
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transformer isolation for protection, it is preferred to avoid using converters with transformer. The magnetic-less converter known as the switchedcapacitor (SC) converter, which is composed of only switches and capacitors, is known for its light weight, high efficiency and high power density [7]–[18]. The drawbacks of SC converters are their high input current ripple and poor regulation, which prevent their wide applications. This issue, however, can be limited within an acceptable range through the proper design of the SC converters [12]. Interleaving technique can also be used to make the converter’s input current continuous [13]. There are many types of SC converters. Series-parallel SC converter is of high efficiency, simple to control, and good for power extension. However, it requires too many components when used in the high-voltage-conversion application [14]. Ladder-type SC converter is also of high efficiency and low input current ripple [15]. However, it also needs large number of switches and capacitors in high-voltage-gain conversion. Fibonacci SC converter [10], [16] and exponential SC converter [17] require fewer components. However, the voltage conversion ratio is rigid and not continuously incremental, which limits its application. In paper [18], an N × step-up SC converter which uses fewer components and has a flexible conversion ratio is proposed. However, the number of the capacitors and switches of these topologies are still relatively high. In paper [19], a high-voltage-gain SC-based converter made up of cascading SC voltage multiplier cells, has been proposed. However, the achievable efficiency with this converter is relatively low. In this paper, a family of cascaded SC converters that are of high efficiency and with high gain conversion of different integer ratio, which uses fewer components, is proposed. The voltage stress of the switches and capacitors is relatively low as compared with that of other types of SC converters. The proposed SC converters are of bidirectional power flow, which also fits the requirement of battery application that are commonly used as storage elements in DERs. II. T HE PROPOSED SWITCHED - CAPACITOR CONVERTERS A. Basic SC Cells The proposed high-conversion-ratio bidirectional SC DC– DC converters are composed of two basic SC cells. For simplicity, the expression X-time (X = 2, 3) SC cell represents
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a bidirectional SC structure which has conversions of X for step-up mode and X1 for step-down mode. The basic SC cells are shown in Fig. 1, which includes a 2-time and a 3-time SC cell. In the basic SC cells, the capacitors with node voltages that are constant with respect to the ground when the switches are turned on/off are named the bypass capacitors. They are denoted as Cx , where x is an integer. The capacitors with node voltages that changed as the switches are turned on/off are called the flying capacitors. They are denoted as Cf x , where x is an integer.
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In the other state, which is shown in Fig. 2(b), the flying capacitor (Cf 1 ) is paralleled with the bypass capacitor (C1 ). Here, the flying capacitor Cf 1 will discharge to the bypass capacitor C1 , and this leads to the bypass capacitor’s voltage being equal to the flying capacitor’s voltage, i.e., Vc1 = Vcf 1 .
B. Operation of the Basic Cells The basic SC cells can operate in both step-up and stepdown modes. It is assumed that the flying and bypass capacitors are large enough to keep their voltages constant. In the step-up mode, the power source is connected to the low voltage side and the high voltage side is the load, i.e., Vin = VL and Vo = VH . According to the operation timing diagram shown in Fig. 1(c), there are only two operating states (by neglecting the extremely low dead-time state) for the SC structures. Fig. 2 shows the two operating states of the structure. In these two operating states, the flying capacitor Cf 1 is alternatively paralleled with the low voltage side VL and the bypass capacitor C1 . In one state, which is shown in Fig. 2(a), the flying capacitor Cf 1 is paralleled with the low voltage side VL . Here, the flying capacitor Cf 1 is charged by the low side voltage source, and at the end of this state, the voltage of the flying capacitor Vcf 1 is equal to the low side
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Hence, in the steady state, according to (1) and (2), the voltage of the bypass capacitor will also be equal to the low side voltage, i.e., Vc1 = VL . (3) According to the circuit, the high voltage side VH is the sum of the bypass capacitor’s voltage Vc1 and the low side voltage VL , i.e., (4) VH = Vc1 + VL . Therefore, by substituting (3) into (4), the high side voltage VH is derived to be double of the low side voltage VL , that is V H = 2 · VL .
(5)
Hence, in the step-up mode, the voltage conversion ratio of the 2-time SC cell is 2. In the step-down mode , the input power source and the load are interchanged as compared with
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its step-up mode, of which the input power source is connected to VH and the load is connected to VL , i.e., Vin = VH and Vo = VL . In this mode, the converter still complies equation (5). Thus, the conversion of the 2-time SC cell in the stepdown mode is 0.5. Similarly, the 3-time SC cell has the conversion ratio of 3 for step-up mode and 13 for the stepdown mode.
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The proposed SC converters are composed of a basic SC cell, followed by the cascading of one or more basic SC cells. The SC cells input is part of or all of the stacked bypass capacitors of previous cells. For discussion simplicity, the step-up mode SC converter is used to introduce the proposed bidirectional SC topologies, where the input power source is connected to VL . The number 2 and 3 in the following will represent the 2-time and 3-time SC cells, respectively. 1) Two-cell SC converters: It is composed of two basic SC cells. Hence, there are four possible combinations 22, 23, 32, 33, where: the first number represents the basic SC cell used in the first cell of the converter, and the second number represents the basic SC cell of the second cell used in the converter. The second cell of the converter has different connection. Table I shows the possible connections of the two-stage SC converters. Note that the subscript of the points represent the cell number. 2) Three-cell SC converters: It is composed of three basic SC cells. Hence, it includes 8 combinations: 222, 223, 232, 233, 322, 323, 332, and 333. 3) Examples of the proposed SC converters: A 5-time bidirectional SC converter is shown in Fig. 3. It composes of a 2-time SC cell and a 3-time SC cell. The 3-time SC cell will firstly step up the input voltage to its 3-time voltage output. Then, the 2-time SC cell outputs a voltage 4-time the input voltage by double boosting the 2-time input voltage, which is the sum of the voltages of the two series-connected bypass capacitors (C2,1 , C3,1 ). Therefore, this 4-time output voltage and the input voltage source forms a 5-time output voltage. Similarly, two-cell 6-time, 7-time and 9-time SC converters can be derived and are shown in Fig. 4(a), Fig. 4(b), and Fig. 4(c), respectively. A three-cell 10-time SC converter is shown in Fig. 4(d). 4) Components comparison of the proposed SC converters and other SC converters: Figs. 5(a) and 5(b) respectively give a comparison of the switch number and the capacitor number of the proposed SC converters, the series-parallel (SP) SC converter [14], Fibonacci SC converter [10], [16], and N × SC converter [18]. Among all the SC converters mentioned, the proposed SC converter uses the least number of switches as well as its related driver circuits. When the conversion ratio is higher than 6, the proposed SC converter also uses fewer capacitors as compared with the SP SC converter and the N × SC converter. Figs. 5(c) and 5(d) show the comparison of the maximum voltage stress of the MOSFETs and capacitors among the same converters. The voltage stress of the proposed SC converter is of relatively low level. Fig. 6 shows the ratio of the maximum voltage stress of the MOSFETs and the capacitors to the high-side voltage for different conversion
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5) Operation of N -time bidirectional SC converters: The switching frequency of the SC cells for the different stages can be identical or different. Fig. 3(b) shows an example of the timing diagram for the 5-time SC converter. According to the
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TABLE I C ONNECTION OF T WO - STAGE SC CONVERTERS BASED ON THE TWO BASIC SC CELLS SHOWN IN F IG . 1 Combinations
first-stage input
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second-stage input connected points H1 ,M1 H1 ,L1 H1 ,M1 H1 ,L1 H1 ,M U1 H1 ,M D1 H1 ,L1 H1 ,M U1 H1 ,M D1 H1 ,L1
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timing diagram shown in Fig. 3(b), there are four main states. In state 1, switches S4,1 , S6,1 , and S8,1 are turned on, switches S5,1 , S7,1 and S9,1 are turned off, and flying capacitors Cf 2,1 and Cf 3,1 are paralleled with the power source and the bypass capacitor C2,1 , respectively. Simultaneously, switches S0,2 and S2,2 are turned on, switches S1,2 and S3,2 are turned off, flying capacitor Cf 1,2 is paralleled with the two series connected bypass capacitors C2,1 and C3,1 . In state 2, switches S4,1 , S6,1 and S8,1 are off, switches S5,1 , S7,1 and S9,1 are on, flying capacitors Cf 2,1 and Cf 3,1 are paralleled with the two bypass capacitors C2,1 and C3,1 , respectively. Concurrently,
the switches S1,2 and S3,2 are off, switches S0,2 and S2,2 are on, flying capacitor Cf 1,2 is paralleled with the two series connected bypass capacitors C2,1 and C3,1 . In state 3, switches S4,1 , S6,1 and S8,1 are on, switches S5,1 , S7,1 and S9,1 are off, and flying capacitors Cf 1,1 and Cf 2,1 are paralleled with the power source and C2,1 , respectively. Meanwhile, S0,2 and S2,2 are off, S1,2 and S3,2 are on, and Cf 1,2 is paralleled with C1,2 . In state 4, S4,1 , S6,1 and S8,1 are off, S5,1 , S7,1 and S9,1 are on, Cf 2,1 and Cf 3,1 are paralleled with C2,1 and C3,1 , respectively. Meanwhile S0,2 and S2,2 are off, switches S1,2 and S3,2 are on, Cf 1,2 is paralleled with C1,2 .
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IV. S IMULATION AND E XPERIMENTAL R ESULTS In order to verify the properties of the N -time SC converter, simulation based on OrCad is performed. Table II shows the parameters of the simulation. In the table, fsc1 and fsc2 are the switching frequency of Φ0,1 , Φ1,1 and Φ0,2 , Φ1,2 , respectively. Similarly, Sx,y represents MOSFET switches of S4,1 , S5,1 , S6,1 , S7,1 , S8,1 , S9,1 , S4,2 , S5,2 , S6,2 , S7,2 , S8,2 , and S9,2 . Fig. 7 shows the efficiency of the N -time step-up SC converter obtained by simulation, which shows that the N time step-up SC converter is of very high efficiency (up to 98.4%).
ripple of the output voltage is 1.2 V, which is 0.7% of the output voltage, and the input peak-to-peak voltage ripple is 0.6 V, which is 3% of the input voltage. The experiment result indicates that the output voltage ripple is as low as 0.35% of the output voltage. ˇϭ͕Ϯ
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Fig. 7. Efficiency of the N -time (N = 5, 6, 7, 9) step-up SC converter by OrCad simulation at 24 V input voltage.
A prototype of the 9-time SC converter is built. The parameters of the 9-time SC converter prototype is shown in Table III. The efficiency measurement of the converter is performed through PM6000 (Voltech) power analyzer with 10 MHz bandwidth, 30 A shunt current setting. The PCB board is shown in Fig. 8. The key waveforms of the converter are shown in Fig. 9. Fig. 9(a) shows the input voltage, input current and output voltage waveforms of the converter at 75 kHz switching frequency, 20 V input voltage, and 0.5 A output current, where the output voltage is 173.33 V. Fig. 9(b) shows the ripples of the input and output voltage. The peak-to-peak voltage
(b) Fig. 9. The key waveforms of the 9-time SC converter at 75 kHz switching frequency, 20 V input voltage, and 0.5 A output current. (a) Waveforms of the input and output voltage and input current (Vin : 10 V/div, Vo : 50 V/div, Iin : 1 A/div, Φ1,2 : 10 V/div), and (b) the ripples of the input and output voltage (Vin : 1 V/div, Vo : 2 V/div, Φ1,2 : 10 V/div).
The measured efficiency curves of the converter with 20 V input voltage are shown in Fig. 10. Fig. 10(a) shows the efficiency of the converter without considering the driver losses. When the output power of the converter is lower than 50 W, a lower switching frequency leads to a higher efficiency, and the maximum efficiency achievable is higher than 98%. When the load of the converter is higher than 50 W, the maximum efficiency occurs at 100 kHz switching frequency. The efficiency of the converter is over 96% at 100 kHz switching frequency. By considering also the driver losses, the overall efficiency of the converter at 100 kHz switching frequency is higher than 95.5% over the entire load range. V. C ONCLUSIONS
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Photograph of the 100 W 9-time SC converter prototype.
This paper presents a family of N -time (N is a positive integer) DC–DC bidirectional SC converters of high conversion ratio and high efficiency. These proposed SC converters use lower components as compared with other SC converters with the same conversion ratio. The converter is applicable to high temperature operations as they do not contain any magnetic component. Moreover, the converter is of low output voltage ripple of less than 1%. The control is simple as it is implemented through two pairs of PWM signals with duty ratio of 0.5.
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TABLE II S IMULATION PARAMETERS OF THE N- TIME S TEP -U P SC C ONVERTER
5-time 6-time 7-time 9-time
Step-Up Step-Up Step-Up Step-Up
SC SC SC SC
fsc1 250 kHz 200 kHz 200 kHz 200 kHz
fsc2 50 kHz 100 kHz 100 kHz 100 kHz
Sx,1 FDMS8023S FDMS8023S FDMS8023S FDMS8023S
Sx,2 SiR826ADP SiR826ADP SiR846ADP SiR846ADP
Vin 24 V 24 V 24 V 24 V
TABLE III T HE PARAMETERS OF THE 9- TIME SC CONVERTER PROTOTYPE . Sx,1 C2,1 ,C3,1 C2,1 ,C3,1
Sx,2 Cf 2,1 ,Cf 3,1 Cf 2,1 ,Cf 3,1
BSC059N04LSG 4 paralleled CKG57NX7S2A226M500JH 2 paralleled CKG57NX7S2A226M500JH and 33 μF film capacitor
BSZ22DN20NS3 10 paralleled CKG57NX7S2A226M500JH 5 paralleled CKG57NX7S2A226M500JH and 68 μF film capacitor
99 50k 75k 100k 125k 150k
98.5 98 97.5
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97 96.5 96 95.5 95 94.5 94 93.5 93 92.5 20
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80
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(b) Fig. 10. Measured efficiency curves of the 9-time SC converter (a) without considering and (b) with the driver loss at 20 V input voltage.
ACKNOWLEDGMENT This work is fully supported by the Hong Kong Research Grant Council under GRF project 17207314. R EFERENCES [1] W. C. Li, X. Xiang, C. Li, W. H. Li, and X. N. He, “Interleaved high step-up ZVT converter with built-in transformer voltage doubler cell for distributed PV generation system,” IEEE Trans. on Pow. Electron., vol. 28, no. 1, pp. 300–313, Jan. 2013.
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