IEEE SIGNAL PROCESSING LETTERS, VOL. 11, NO. 8, AUGUST 2004
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Generation of Signed-Digit Representations for Integer Multiplication Andrew G. Dempster, Senior Member, IEEE, and Malcolm D. Macleod, Member, IEEE
Abstract—This letter presents an algorithm for generating all of the signed-digit representations of a given integer. There is an infinite number of representations, so the tree algorithm is terminated when a defined number of digits above the minimum possible is reached. It is shown that by having available these other representations, more efficient multiplication circuits can be designed than when using existing algorithms. Index Terms—Algorithms, digital arithmetic, multiplication, multiplying circuits.
I. INTRODUCTION
S
IGNED-DIGIT (SD) representation was introduced by Avizienis [1]. An integer coefficient in “n-bit” signed-digit representation can be written (1) where represents minus where is taken from the set 1. In general, there are several different SD representations for a given integer, and the representation that has fewest nonzero digits is known as the canonic signed-digit (CSD) representation. Reitweisner [2] showed that the representation with no string of nonzero bits is canonic, and an algorithm for finding this representation was presented by Hwang [3] and appears in many texts such as [4]. Garner [5] showed that, on average, and for long wordlengths, CSD requires 33% fewer nonzero digits than binary. Since in integer “long” (i.e., shift-and-add) multiplication nonzero digits represent additions (or subtractions), CSD therefore is significantly more efficient in adders than binary. Here, we consider addition and subtraction to be equivalent operations in terms of cost (e.g., chip area). An algorithm presented by Park and Kang [6] produces all of the signed-digit representations having the same number of non-zero digits as CSD. They call these representations minimal signed-digit (MSD). The algorithm presented here differs from that one both in approach, and in that it can also produce all representations at any number of non-zero digits above the minimal number. One reason that it is useful to have access to SD representations other than just CSD and binary is that such representa-
Manuscript received November 6, 2003; revised December 17, 2003. The associate editor coordinating the review of this manuscript and approving it for publication was Dr. Elias S. Manolakos. A. G. Dempster is with the Department of Electronic Systems, University of Westminster, London W1W 6UW, U.K. (e-mail:
[email protected]). M. D. Macleod is with QinetiQ, Ltd., Malvern, Worcs., WR14 3PS, U.K. (e-mail:
[email protected]). Digital Object Identifier 10.1109/LSP.2004.831725
tions can be used to design more efficient multiplier circuits. The sub-expression elimination techniques of Hartley [7] and Pasko et al. [8] assume CSD representation and look for recurring patterns in the digits. Potkonjak et al. [9] recognize the benefits of different SD representations but do not search exhaustively. An . It can example of how this works is integer occurs twice in the bibe seen that the pattern “101” nary representation, once based at , and once based at . So, instead of a straightforward multiplier using 3 ad, we can design a multiplier using ditions , then using the two adders: the first multiplying by output of that adder to produce . Using CSD representation, both positive and negative versions of the pattern has the recurring patcan be used. The CSD for , the positive version appearing at and tern the negative version at . This leads to a two subtractor . In both of these cases, solution the application of sub-expression elimination has saved us an “adder”, but in many cases, as we show, it is possible to find patterns in representations that are neither the binary nor CSD representations, and may even have more digits than CSD, but lead to better multiplier designs. It is important to note that Park’s algorithm does not work for SD representations with more bits than CSD. It functions with 11 and vice versa. For inby replacing sequences of it starts with stance to generate the MSD representations of (using, say, [4]) and first replaces the the CSD version, leading three digits to create , then the final three digits to produce 1011(the binary representation). This produces all three MSD representations from the CSD representation. However, if one extra digit is used, it can be seen that using this algorithm representation of to another cannot convert the . such as II. INFINITE REPRESENTATIONS Any integer has an infinite number of SD representations. This can readily be seen as the number 1 can be represented as (i.e., ) in SD. The leading 1 can again be replaced 1 or (or ) and so on. Any positive integer with to give has a leading 1 so it can be replaced by any number of these sequences. Likewise for any negative integer, which has a leading which can be replaced by . III. TREE ALGORITHM TO GENERATE ALL REPRESENTATIONS The new algorithm works as follows: An odd integer can only have a 1 or in its LSB. We therefore cover both cases and create two branches of the tree—one where the LSB is 1
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IEEE SIGNAL PROCESSING LETTERS, VOL. 11, NO. 8, AUGUST 2004
Fig. 1.
Signed-digit tree algorithm applied to integer eleven. Three highlighted results are MSD.
and the other for . This exhaustively covers all possible LSB , values. If however, the original integer was even with where was odd, then the LSB would be 0 and the second LSB would be 1 or , so in that case the branches are assigned values (again an exhaustive coverage of options). The 10 and and so on. The numbers labeling the same applies for branches are then subtracted from the original integer to give us the remainders for the two cases where those branch digits appear in the SD representation. For an odd number, these outputs and . For , they would be and would be , and so on. The remainders will always have zeros in positions up to and including the position of the digit just assigned, i.e., the significance of the new bits that are assigned increases. The process is then repeated on these new remainders until the remainder is 0. When this occurs, summing the branches back to the beginning gives the SD representation. Because for each remainder, we retain both possibilities for the least significant nonzero digit, this is an exhaustive search and hence produces all possible representations of a given number of digits. , 1 in the An example is shown in Fig. 1. For the integer , and gives remainder . InLSB gives a remainder of has as its lowest power of two factor, so branches teger for (10) and are added, giving remainders of and . The remainder can obviously be achieved exactly with a single nonzero digit (1000) and so that branch has remainder 0. Summing back along the branches to the input gives , requiring 3 digits. Similarly there and , the latter are two other three-digit solutions: being the recognized CSD version (because the nonzero digits have maximum string length 1), although clearly all three solutions are truly canonic (they all have the minimum 3 nonzero digits), so can be called MSD. The algorithm could be terminated here, having explored all 3-digit solutions, or allowed to continue on the nonzero remainders, running through more
levels of the tree, each of which adds a digit to the representation. Note that the leftmost branches of this tree give the binary solution (i.e., they never use ).
IV. SIGNIFICANCE OF ALLOWING EXTRA NON-ZERO DIGITS Examples of where the new algorithm enables better results to be achieved than the existing approaches are: , which Integer 105 has CSD representation has no recurring pattern, and requires 3 adders to create. However, another 4-digit (canonic) representa, has two patterns ( and ) tion, which recur as negatives, and hence can be synthesized ), i.e., as, e.g., using 2 adders. ii) In multiplier blocks, several products of a single multiplicand are required. For the two products 5 and 45, subexpression elimination using ) requires 3 adders: CSD (101 and . If a different representation of 45 (the binary, in fact: 101 101), re, using dundancy can be found: only two adders. Both of these results would have been found by Park’s method [6]. However, examples which would not be found by that method are as follows: iii) Integer 363 has CSD representation which has no recurring patterns and has 5 digits, requiring 4 adders. Another representation, 101101011, which is not canonic, with 6 digits, can be synthesized (pattern using 3 adders because of its patterns: (pattern 1011), . 11),
i)
DEMPSTER AND MACLEOD: GENERATION OF SIGNED-DIGIT REPRESENTATIONS FOR INTEGER MULTIPLICATION
iv)
Integer 1395 requires 4 adders for MSD or if one extra digit is allowed, but if two extra digits are allowed, repcan be synthesized in 3 resentation adders: . v) Integer 46 425 requires 6 adders for MSD, 5 adders if one extra digit is allowed, but only 4 adders if two extra digits are allowed: represencan be synthetation sized: . In these examples, the new method combined with subexpression sharing achieves the optimal results that graph techniques [10]–[12], achieve. In practice, when designing a new multiplier, the process would be as follows. First, all SD representations would be generated using up to a certain number of extra digits (this limit has yet to be established, but empirical results suggest 2 extra bits are sufficient for 16 bit multipliers). Second, design a multiplier for each representation and choose the one using fewest adders. This is a fast procedure and hence may mean that more complicated algorithms for identifying good representations may not be necessary. V. CONCLUSION A new algorithm has been presented that exhaustively searches the SD representations of an integer. Examples are given where subexpression elimination can design better multipliers by using representations other than CSD. Better results can occur where the number of digits in the representation is
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not canonic. Better multiplier blocks can also be designed by exploring these different SD representations. REFERENCES [1] A. Avizienis, “Signed-digit representation for fast parallel arithmetic,” IRE Trans. Electron. Comput., vol. 10, pp. 389–400, Sept. 1961. [2] G. W. Reitweisner, “Binary arithmetic,” Adv. Comput., vol. 1, pp. 232–308, 1960. [3] K. Hwang, Computer Arithmetic: Principles, Architecture and Design. New York: Wiley, 1979. [4] P. Pirsch, Architectures for Digital Signal Processing. New York: Wiley, 1998, pp. 61–63. [5] H. L. Garner, “Number systems and arithmetic,” Advances in Computers, vol. 6, pp. 131–194, 1965. [6] I.-C. Park and H.-J. Kang, “Digital filter synthesis based on an algorithm to generate all minimal signed digit representations,” IEEE Trans. Computer-Aided Design, vol. 12, pp. 1525–1529, Dec. 2002. [7] R. I. Hartley, “Subexpression sharing in filters using canonic signed-digit multipliers,” IEEE Trans. Circuits Syst. II, vol. 43, no. 10, pp. 677–688, 1996. [8] R. Pasko et al., “A new algorithm for elimination of common subexpressions,” IEEE Trans. Computer-Aided Design, vol. 18, no. 1, pp. 58–68, 1999. [9] M. Potkonjak, M. B. Srivastava, and A. Chandrakasan, “Multiple constant multiplications: Efficient and versatile framework and algorithms for exploring common subexpression elimination,” IEEE Trans. Computer-Aided Design, vol. 15, no. 2, pp. 151–165, 1996. [10] A. G. Dempster and M. D. Macleod, “Constant integer multiplication using minimum adders,” in Proc. Inst. Elect. Eng. Circuits, Devices, and Systems, vol. 141, Oct. 1994, pp. 407–413. [11] A. G. Dempster and M. D. Macleod, “Use of minimum-adder multiplier blocks in FIR digital filters,” IEEE Trans. Circuits Syst. II, vol. 42, no. 9, pp. 569–577, Sept. 1995. [12] O. Gustafsson, A. G. Dempster, and L. Wanhammer, “Extended results for minimum-adder constant integer multipliers,” in Proc. ISCAS 2002, Phoenix, AZ, May 2002, pp. 73–76.
