IEEE PEDS 2005

High-efficient Soft-Switching Converter for Three-Phase Grid Connections of Renewable Energy Systems Klaus Rigbers∗ , Peter L¨urkens† , Matthias Wendt† , Stefan Schr¨oder∗ , Ulrich B¨oke† , Rik W. De Doncker∗ ∗ Institute

for Power Electronics and Electrical Drives (ISEA), RWTH Aachen University, Germany Email: [email protected] † Philips Research Laboratories, Aachen, Germany Email: [email protected]

Abstract— Despite their high efficiency, soft-switching threephase inverters ca have disadvantages like higher conduction losses (Resonant Pole Inverter [1][2]), voltage stress and subharmonics (Resonant DC-link Inverter [1][2]) or the need for additional components (Auxiliary Resonant Commutated Pole Inverter [3]). In contrast to single-phase grid connection, the three-phase grid connection provides a continuous power flow without the need for large energy storage devices. If the inverter is fed by a constant power source, it is possible to overcome these disadvantages by using the novel Double 120◦ FlatTop Modulation, which results in an inverter with low conduction losses, small dc-link capacitance and soft-switching operation without the need for additional components. The developed inverter prototype in the kW-range operates with a total dclink capacitance of only 10 µF. All these characteristics make it promising for grid-connection of renewable energy systems.

Fig. 1.

Basic system blocks of the PV inverter

Inductor currents in A

DC−link voltage in V 600

20

I. I NTRODUCTION

0

500

−20

If the proposed inverter depicted in 1 is supplied by a constant power source, the output currents can be controlled to be sinusoidal employing an appropriate inverter control where always one half-bridge output is connected for 120◦ to the positive rail and one converter phase-leg output is connected for 120◦ to the negative rail, while the third halfbridge is switching (Double 120◦ FlatTop Modulation). This is possible, since a symmetrical three-phase system delivers or draws always constant power to/from the grid with 120◦ phase shifted sinusoidal phase voltages of same amplitude. The resulting dc-link voltage and phase currents are depicted in figure 2. This approach inherently offers various advantages: • • •

Each phase-leg is switching only a third of the time. Soft-switching using the resonant pole concept [1][2] can be employed. If the filter capacitors are connected to dc-ground as depicted in figure 1 the inductor L1 sees only one third of the time a current ripple and will therefore show lower losses. This can result in a smaller inductor and also lowers common mode signals on costs of an additional reactive current flowing through the capacitors [4].

0-7803-9296-5/05/$20.00 © 2005 IEEE

246

400

20

300

0

−20

200

20 100

0

−20 0

5

10 time in ms

15

20

0 0

Phase currents Fig. 2.

5

10 timer in ms

15

20

DC-link voltage

Phase currents iL1a , iL1b , iL1c and DC-link voltage

II. V ECTOR C ONTROL A. Control in dq-Reference Frame The control method I in figure 3 works in a dq-reference frame selecting always a voltage vector which decreases the q-component of the current as illustrated in figure 4. The d-component does not have to be controlled since it is automatically adjusted by the power delivered from the power source. Thus, every selected voltage vector is always selected for an increasing current (I). Because of the current through the filter capacitors to ground, the reference value for iSq has to be adjusted. This can be done by an additional PI-controller or by an angle and load dependent compensation function. This

6x2x3 Switching Table

iSq*

Driver Signals

iSa* iSd* iSq*

Sector Calculation

e

PI

2

jq

2

- jq

e

iSq

3

iSc*

iSa iSb iSc

PI Controller Reset

Sector 1 1 2 2 3 3 4 4 5 5 6 6

iL1a Inductor iL1b Currents iL1c

Output -1 1 -1 1 -1 1 -1 1 -1 1 -1 1

Phase 1 1 0 1 1 1 1 0 1 0 0 0 0

Phase 2 0 0 0 0 1 0 1 1 1 1 0 1

iSd

Phase 3 1 1 0 1 0 0 0 0 1 0 1 1

iSq

Sector 1 1 2 2 3 3 4 4 5 5 6 6

Capacitor voltages in V 600

uC1b

uC1c

b

q

400

iS iSq

300

200

1

3

2 5

4 10 time in ms

Sectors Fig. 4.

q

6

5 15

uS

3

Phase 1 -1 1 X X X X -1 1 X X X X

Vector control in abc-coordinates

Phase 2 X X X X -1 1 X X X X -1 1

Phase 3 X X -1 1 X X X X -1 1 X X

Phase 1 0 1 1 1 1 1 0 1 0 0 0 0

Phase 2 0 0 0 0 0 1 1 1 1 1 0 1

Phase 3 1 1 0 1 0 0 0 0 0 1 1 1

TABLE II S WITCHING TABLE FOR ABC - CONTROL (X= ARBITRARY )

The outputs of the hysteresis current controller are connected to the switching table depicted in table II. The active hysteresis controller is determined according to the actual sector. All other hysteresis controller are deactivated (marked by the X in table II). The vector control can operate at interrupt-service routine frequencies of some kHz, while the current control is performed by fast comparators and CPLDs.

d

III. C URRENT C ONTROL

a

selected voltage vector

20

iSa Output iSb Currents iSc

2

iSb

iSd

100

0 0

iSa -jq

e

Fig. 5.

control method has the disadvantage that the current vector has to be rotated and therefore the components have to be multiplied with the sinus and cosines of the angle. This has to be done every switching instance and requires either a very fast DSP or a FPGA (Field Programmable Gate Array) with integrated multipliers.

uC1a

uSa Grid uSb uSc Voltages

PLL

Vector control in dq-coordinates

TABLE I S WITCHING TABLE FOR DQ - CONTROL

500

uCa uCb Voltages of uCc C1a to C1c

Sector Selection

q

i

Fig. 3.

Driver Signals

8x6x3 Switching Table

3

q iSd

iSb*

Space vectors Space vectors and sector boarders

B. Control in stationary Reference Frame Since the proposed control method in dq-reference frame requires a very fast DSP or an FPGA with hardware multiplier for rotating the current vector, a control in stationary abccoordinates is advantageous, since here no fast rotation of current components is required. The proposed control as depicted in figure 5 is able to control the currents to be sinusoidal. As in the dq-control, the amplitude is given by the power source. To reduce this degree of freedom, the measured amplitude of the current vector is fed back and rotated to the angle θ of the grid voltage in order to obtain unity power factor. The q-component PI-controller is used to adjust the reactive current flowing through the filter capacitors.

247

As explained, each half-bridge is just switching two times 60◦ . During these 60◦ Zero Voltage Switching (ZVS) is ensured by adjusting the upper and lower hysteresis level in a way that the energy inside the inductor L1 is sufficient to

î+IL0 î

IL0

ip iref iL1

-IL0 in -î -î-IL0

Fig. 6.

Inductor current and reference currents of one phase

charge/discharge the snubber capacitors as well as the drainsource capacitance (Resonant Pole) [1] [2] [5]. Because the voltage of the filter capacitors has to change very slowly compared to the switching period, the mean value of iL1 has to be equal to Iref during each switching period. Therefore, the upper Ip and lower In switching current level can be calculated as follows, where IL0 is the inductor current used to charge and discharge the snubber capacitors to achieve ZVS: IL0 for Iref < 0 (1) Ip = for Iref > 0 2Iref + IL0 2Iref − IL0 for Iref < 0 (2) In = for Iref > 0 −IL0 iL IL0

The input power can be calculated as follows: Using C1 = C2 = C with L Z0 = 2C Hence: IL0(min) =

1 Z0

2 2UDC Uout − UDC

(11)

(12)

For Iref and Uout independent operation IL0(min) results to: IL0(min) =

UDC Z0

(13)

Since there are always losses the current, IL0 has to be increased by some percent compared to the calculated value IL0(min) . By further increasing IL0 it is possible to fasten the commutation process significantly.

t

C1 uC1 L

UDC

IV. E XPERIMENTAL R ESULTS

uC UDC

iL

uC2

uC1

A. Setup

Uout

C2 uC2

tm

0

Equivalent resonant circuit Fig. 7.

t

Behavior of inductor current and capacitor voltages

Zero Voltage Switching (ZVS)

Assuming the following initial conditions for the transient depicted in figure 7: At t = 0: At t = tm :

iL1 = IL0(min) , iL1 = 0,

uC1 = 0, uC1 = UDC ,

uC2 = UDC uC2 = 0

During interval 0 < t < tm duC1 duC2 − C2 dt dt If the snubber capacitances are equal (C1 = C2 = C): iL1 = C1

duC1 duC duC2 =− = dt dt dt

(3)

(4)

Hence:

duC dt From energy conservation considerations: iL1 = 2C

(5)

∆Estored = Estored (t = tm ) − Estored (t = 0)

(6)

Ein − Eloss − Edelivered − ∆Estored = 0

(7)

The three-phase inverter prototype as depicted in figure 9 has been built using the components listed in table III. It has a total effective dc-link capacitance of 10 µF. The minimum current IL0 has been adjusted to 1.8 A, which results in a maximum switching frequency of approximately 325 kHz. The vector control in stationary coordinates is performed by an AixControl XCS2000 [6] Digital Signal Processor (DSP)System, while the current control is performed by additional control printed circuit boards. The prototype has been set into operation using a linear current regulator (LCR) and an adjustable three-phase transformer as substitute for a renewable energy source (figure 9). This will be replaced by a fast and high-efficient DC/DC converter in the next stage. The LCR gets a current reference signal from the DSP. The DSP calculates this reference signal according to ∗ and the measured dc-link voltage the desired input power Pin uDC as follows: P∗ (14) i∗DC = in uDC For test purposes the inverter is connected to a three-phase resistor bank. The inductor currents iL1a to iL1c and the output currents are depicted in figure 10 and 11. It can clearly be seen that each half-bridge is just switching one third of the time.

Assuming lossless circuit elements: 1 1 1 2 2 2 LI + C2 UDC = C1 UDC + Edelivered − Ein (8) 2 L0(min) 2 2 tm Edelivered = Uout iL1 dt (9) 0

Substituting iL1 from equation 5 and knowing the boundary conditions of uC1 and uC2 and assuming a constant Uout during commutation: tm UDC duC1 2 dt = CUDC (10) Ein = C1 dt 0

248

Linear Current Regulator Fig. 8.

Inverter Prototype Hardware

Linear current regulator

iDC

S1

Pv(avg,max)=500 W

L1

S3

C1a C1b C1c

S5

uSa

L1a

iSa

iL1b

L1b

iSb

iL1c

L1c

iSc

iL1a 1

L2

UDC

uSb

2

CDC

uSc 3

L3

S2

S4

S6 C1a C1b C1c

Fig. 9.

DSP Unit

IDC*

L1a=L1b=L1c=L1 C1a=C1b=C1c=C1

Experimental setup L1 C1a =C1b CDC S1..6 Gate Resistance CSnubber

120 µH, 3C96 PQ35-Core with 200 x 0.1 mm2 Litz wire 5 x 1 µF, MKS 3 x 680 nF, MKP APT10035B2LFLL with RDSON = 350 mΩ 10 Ω 330 pF TABLE III C OMPONENT DATA

B. Inverter Efficiency

Fig. 10.

Since soft-switching can always be ensured and inductor current ripple is relatively low, a high efficiency η can be expected. Measurements using a Yokogawa PZ4000 power analyzer lead to an efficiency (without LCR and without control) for US = 230 V (rms) of η=98.8 % at 1.5 kW and η=98.6 at 3 kW. An efficiency of η=98.4 % has been achieved for an input power of 4.7 kW. At these low losses pure electric measurements can have large errors. Therefore, the results at 3 kW have been checked using the calorimeter depicted in figure 12, which has been built based on [7]. The calorimetric measurement box is constructed in a way that the air heats up by passing the inverter and is heated again by passing a reference heater with Pref =81.5 W. Heat exchange to the ambient is constricted by good isolation. The inverter losses have been calculated using the following equation: T 1 − T4 T 2 − T1 (15) Pref + E · T2 − T4 Ploss = T3 − T2 T3 − T4

Currents of L1a ..L1c

Fig. 11.

Where T1 is the air temperature before the inverter, T2 is the temperature behind the inverter and before the reference heater, T3 is the temperature behind the reference heater and T4 is the ambient temperature. The error matrix E considers a heat flow through the isolation and has been determined in a calibration process. After 4 hours at 3 kW the temperatures of the inverter and

Output currents

249

C. Temperature Distribution The temperature distribution shown in figure 14 has been determined using a JenOptik thermocamera after 60 min inverter operation at 2 kW and 75 min at 2.8 kW. The temperature of the capacitors C1 (Temperature T1 ) is somewhat higher than the ambient temperature. It can be seen that the temperature of the inductor windings (Temperature T3 ) are higher than the temperature of the cores (Temperature T2 ). This shows that here is some room for improvements. The component inside the white circle is a MOSFET which has not been properly connected to the heatsink. The hottest components of the inverter are some fast optocouplers used for galvanic isolation of the switching signals.

Fig. 12.

Caloriemetric test setup

the calorimetric measurement system reached steady state as depicted in figure 13. The results are depicted in table IV.

Fig. 14. Temperature distribution at 2.76 kW after 135 minutes of operation

Temperatures differences inside the calorimetric measurement box / K 20

V. S UMMARY

18

A new modulation technique for power-source inverters has been proposed. Two different vector control methods have been presented and discussed. Finally, experimental results have been presented, which show the proper operation of an inverter prototype in the kW-range employing a dc-link capacitance of only 10 µF and small filter inductances. A calorimetric measured efficiency of more than 98% shows the suitability of this concept for grid-connection of renewable energy systems. The next steps will be grid-connection and further optimization concerning efficiency.

16 Reference Heater P

ref

T3−T1

= 81.5 W

14

12 T2−T1

10

Inverter

8

6

4

2

0

0

0.5

1

1.5

2

2.5

3

3.5

4

t/h

R EFERENCES Fig. 13.

Temperature differences inside the measurement box

Measured input power Measured total inverter losses including control Measured losses of half-bridge driver and deadtime generators Measured losses of current sensors and control boards Efficiency including control Efficiency excluding control

3040 kW 59 W 4W 10.5 W 98.1 % 98.5 %

TABLE IV R ESULTS FROM THE CALORIMETRIC MEASUREMENT

250

[1] D. M. D IVAN , G. S KIBINSKI: Zero Switching Loss Inverters For High Power Applications, IEEE-IAS Annual Meeting, Conference Records, 1987, pp. 635-640. [2] D. M. D IVAN , G. V ENTAKATARAMANAN , R. W. D E D ONCKER: Design Methologies for Soft Switched Inverters, IEEE-IAS Annual Meeting, Conference Records, 1988, pp. 759-766. [3] R. W. D E D ONCKER , J.P. LYONS: The Auxiliary Resonant Commutated Pole Inverter, IEEE-IAS Annual Conference 1990, pp. 1228-1235. [4] H. VAN DER B ROECK: Use of LC Filters in Hard switching PWM Inverter Drives, Proceedings EPE 1995. [5] M. H. K HERALUWALA: High Power High Frequency DC-DC Converter, PhD-Thesis, University of Wisconsin Madison 1990. [6] A IX C ONTROL: XCS2000, www.aixcontrol.com [7] A. VAN DER B ORSCHE: Flow calorimeter for power electronic converters, Proceedings EPE 2001.

High-efficient Soft-Switching Converter for Three-Phase Grid Connections of Renewable Energy Systems Klaus Rigbers∗ , Peter L¨urkens† , Matthias Wendt† , Stefan Schr¨oder∗ , Ulrich B¨oke† , Rik W. De Doncker∗ ∗ Institute

for Power Electronics and Electrical Drives (ISEA), RWTH Aachen University, Germany Email: [email protected] † Philips Research Laboratories, Aachen, Germany Email: [email protected]

Abstract— Despite their high efficiency, soft-switching threephase inverters ca have disadvantages like higher conduction losses (Resonant Pole Inverter [1][2]), voltage stress and subharmonics (Resonant DC-link Inverter [1][2]) or the need for additional components (Auxiliary Resonant Commutated Pole Inverter [3]). In contrast to single-phase grid connection, the three-phase grid connection provides a continuous power flow without the need for large energy storage devices. If the inverter is fed by a constant power source, it is possible to overcome these disadvantages by using the novel Double 120◦ FlatTop Modulation, which results in an inverter with low conduction losses, small dc-link capacitance and soft-switching operation without the need for additional components. The developed inverter prototype in the kW-range operates with a total dclink capacitance of only 10 µF. All these characteristics make it promising for grid-connection of renewable energy systems.

Fig. 1.

Basic system blocks of the PV inverter

Inductor currents in A

DC−link voltage in V 600

20

I. I NTRODUCTION

0

500

−20

If the proposed inverter depicted in 1 is supplied by a constant power source, the output currents can be controlled to be sinusoidal employing an appropriate inverter control where always one half-bridge output is connected for 120◦ to the positive rail and one converter phase-leg output is connected for 120◦ to the negative rail, while the third halfbridge is switching (Double 120◦ FlatTop Modulation). This is possible, since a symmetrical three-phase system delivers or draws always constant power to/from the grid with 120◦ phase shifted sinusoidal phase voltages of same amplitude. The resulting dc-link voltage and phase currents are depicted in figure 2. This approach inherently offers various advantages: • • •

Each phase-leg is switching only a third of the time. Soft-switching using the resonant pole concept [1][2] can be employed. If the filter capacitors are connected to dc-ground as depicted in figure 1 the inductor L1 sees only one third of the time a current ripple and will therefore show lower losses. This can result in a smaller inductor and also lowers common mode signals on costs of an additional reactive current flowing through the capacitors [4].

0-7803-9296-5/05/$20.00 © 2005 IEEE

246

400

20

300

0

−20

200

20 100

0

−20 0

5

10 time in ms

15

20

0 0

Phase currents Fig. 2.

5

10 timer in ms

15

20

DC-link voltage

Phase currents iL1a , iL1b , iL1c and DC-link voltage

II. V ECTOR C ONTROL A. Control in dq-Reference Frame The control method I in figure 3 works in a dq-reference frame selecting always a voltage vector which decreases the q-component of the current as illustrated in figure 4. The d-component does not have to be controlled since it is automatically adjusted by the power delivered from the power source. Thus, every selected voltage vector is always selected for an increasing current (I). Because of the current through the filter capacitors to ground, the reference value for iSq has to be adjusted. This can be done by an additional PI-controller or by an angle and load dependent compensation function. This

6x2x3 Switching Table

iSq*

Driver Signals

iSa* iSd* iSq*

Sector Calculation

e

PI

2

jq

2

- jq

e

iSq

3

iSc*

iSa iSb iSc

PI Controller Reset

Sector 1 1 2 2 3 3 4 4 5 5 6 6

iL1a Inductor iL1b Currents iL1c

Output -1 1 -1 1 -1 1 -1 1 -1 1 -1 1

Phase 1 1 0 1 1 1 1 0 1 0 0 0 0

Phase 2 0 0 0 0 1 0 1 1 1 1 0 1

iSd

Phase 3 1 1 0 1 0 0 0 0 1 0 1 1

iSq

Sector 1 1 2 2 3 3 4 4 5 5 6 6

Capacitor voltages in V 600

uC1b

uC1c

b

q

400

iS iSq

300

200

1

3

2 5

4 10 time in ms

Sectors Fig. 4.

q

6

5 15

uS

3

Phase 1 -1 1 X X X X -1 1 X X X X

Vector control in abc-coordinates

Phase 2 X X X X -1 1 X X X X -1 1

Phase 3 X X -1 1 X X X X -1 1 X X

Phase 1 0 1 1 1 1 1 0 1 0 0 0 0

Phase 2 0 0 0 0 0 1 1 1 1 1 0 1

Phase 3 1 1 0 1 0 0 0 0 0 1 1 1

TABLE II S WITCHING TABLE FOR ABC - CONTROL (X= ARBITRARY )

The outputs of the hysteresis current controller are connected to the switching table depicted in table II. The active hysteresis controller is determined according to the actual sector. All other hysteresis controller are deactivated (marked by the X in table II). The vector control can operate at interrupt-service routine frequencies of some kHz, while the current control is performed by fast comparators and CPLDs.

d

III. C URRENT C ONTROL

a

selected voltage vector

20

iSa Output iSb Currents iSc

2

iSb

iSd

100

0 0

iSa -jq

e

Fig. 5.

control method has the disadvantage that the current vector has to be rotated and therefore the components have to be multiplied with the sinus and cosines of the angle. This has to be done every switching instance and requires either a very fast DSP or a FPGA (Field Programmable Gate Array) with integrated multipliers.

uC1a

uSa Grid uSb uSc Voltages

PLL

Vector control in dq-coordinates

TABLE I S WITCHING TABLE FOR DQ - CONTROL

500

uCa uCb Voltages of uCc C1a to C1c

Sector Selection

q

i

Fig. 3.

Driver Signals

8x6x3 Switching Table

3

q iSd

iSb*

Space vectors Space vectors and sector boarders

B. Control in stationary Reference Frame Since the proposed control method in dq-reference frame requires a very fast DSP or an FPGA with hardware multiplier for rotating the current vector, a control in stationary abccoordinates is advantageous, since here no fast rotation of current components is required. The proposed control as depicted in figure 5 is able to control the currents to be sinusoidal. As in the dq-control, the amplitude is given by the power source. To reduce this degree of freedom, the measured amplitude of the current vector is fed back and rotated to the angle θ of the grid voltage in order to obtain unity power factor. The q-component PI-controller is used to adjust the reactive current flowing through the filter capacitors.

247

As explained, each half-bridge is just switching two times 60◦ . During these 60◦ Zero Voltage Switching (ZVS) is ensured by adjusting the upper and lower hysteresis level in a way that the energy inside the inductor L1 is sufficient to

î+IL0 î

IL0

ip iref iL1

-IL0 in -î -î-IL0

Fig. 6.

Inductor current and reference currents of one phase

charge/discharge the snubber capacitors as well as the drainsource capacitance (Resonant Pole) [1] [2] [5]. Because the voltage of the filter capacitors has to change very slowly compared to the switching period, the mean value of iL1 has to be equal to Iref during each switching period. Therefore, the upper Ip and lower In switching current level can be calculated as follows, where IL0 is the inductor current used to charge and discharge the snubber capacitors to achieve ZVS: IL0 for Iref < 0 (1) Ip = for Iref > 0 2Iref + IL0 2Iref − IL0 for Iref < 0 (2) In = for Iref > 0 −IL0 iL IL0

The input power can be calculated as follows: Using C1 = C2 = C with L Z0 = 2C Hence: IL0(min) =

1 Z0

2 2UDC Uout − UDC

(11)

(12)

For Iref and Uout independent operation IL0(min) results to: IL0(min) =

UDC Z0

(13)

Since there are always losses the current, IL0 has to be increased by some percent compared to the calculated value IL0(min) . By further increasing IL0 it is possible to fasten the commutation process significantly.

t

C1 uC1 L

UDC

IV. E XPERIMENTAL R ESULTS

uC UDC

iL

uC2

uC1

A. Setup

Uout

C2 uC2

tm

0

Equivalent resonant circuit Fig. 7.

t

Behavior of inductor current and capacitor voltages

Zero Voltage Switching (ZVS)

Assuming the following initial conditions for the transient depicted in figure 7: At t = 0: At t = tm :

iL1 = IL0(min) , iL1 = 0,

uC1 = 0, uC1 = UDC ,

uC2 = UDC uC2 = 0

During interval 0 < t < tm duC1 duC2 − C2 dt dt If the snubber capacitances are equal (C1 = C2 = C): iL1 = C1

duC1 duC duC2 =− = dt dt dt

(3)

(4)

Hence:

duC dt From energy conservation considerations: iL1 = 2C

(5)

∆Estored = Estored (t = tm ) − Estored (t = 0)

(6)

Ein − Eloss − Edelivered − ∆Estored = 0

(7)

The three-phase inverter prototype as depicted in figure 9 has been built using the components listed in table III. It has a total effective dc-link capacitance of 10 µF. The minimum current IL0 has been adjusted to 1.8 A, which results in a maximum switching frequency of approximately 325 kHz. The vector control in stationary coordinates is performed by an AixControl XCS2000 [6] Digital Signal Processor (DSP)System, while the current control is performed by additional control printed circuit boards. The prototype has been set into operation using a linear current regulator (LCR) and an adjustable three-phase transformer as substitute for a renewable energy source (figure 9). This will be replaced by a fast and high-efficient DC/DC converter in the next stage. The LCR gets a current reference signal from the DSP. The DSP calculates this reference signal according to ∗ and the measured dc-link voltage the desired input power Pin uDC as follows: P∗ (14) i∗DC = in uDC For test purposes the inverter is connected to a three-phase resistor bank. The inductor currents iL1a to iL1c and the output currents are depicted in figure 10 and 11. It can clearly be seen that each half-bridge is just switching one third of the time.

Assuming lossless circuit elements: 1 1 1 2 2 2 LI + C2 UDC = C1 UDC + Edelivered − Ein (8) 2 L0(min) 2 2 tm Edelivered = Uout iL1 dt (9) 0

Substituting iL1 from equation 5 and knowing the boundary conditions of uC1 and uC2 and assuming a constant Uout during commutation: tm UDC duC1 2 dt = CUDC (10) Ein = C1 dt 0

248

Linear Current Regulator Fig. 8.

Inverter Prototype Hardware

Linear current regulator

iDC

S1

Pv(avg,max)=500 W

L1

S3

C1a C1b C1c

S5

uSa

L1a

iSa

iL1b

L1b

iSb

iL1c

L1c

iSc

iL1a 1

L2

UDC

uSb

2

CDC

uSc 3

L3

S2

S4

S6 C1a C1b C1c

Fig. 9.

DSP Unit

IDC*

L1a=L1b=L1c=L1 C1a=C1b=C1c=C1

Experimental setup L1 C1a =C1b CDC S1..6 Gate Resistance CSnubber

120 µH, 3C96 PQ35-Core with 200 x 0.1 mm2 Litz wire 5 x 1 µF, MKS 3 x 680 nF, MKP APT10035B2LFLL with RDSON = 350 mΩ 10 Ω 330 pF TABLE III C OMPONENT DATA

B. Inverter Efficiency

Fig. 10.

Since soft-switching can always be ensured and inductor current ripple is relatively low, a high efficiency η can be expected. Measurements using a Yokogawa PZ4000 power analyzer lead to an efficiency (without LCR and without control) for US = 230 V (rms) of η=98.8 % at 1.5 kW and η=98.6 at 3 kW. An efficiency of η=98.4 % has been achieved for an input power of 4.7 kW. At these low losses pure electric measurements can have large errors. Therefore, the results at 3 kW have been checked using the calorimeter depicted in figure 12, which has been built based on [7]. The calorimetric measurement box is constructed in a way that the air heats up by passing the inverter and is heated again by passing a reference heater with Pref =81.5 W. Heat exchange to the ambient is constricted by good isolation. The inverter losses have been calculated using the following equation: T 1 − T4 T 2 − T1 (15) Pref + E · T2 − T4 Ploss = T3 − T2 T3 − T4

Currents of L1a ..L1c

Fig. 11.

Where T1 is the air temperature before the inverter, T2 is the temperature behind the inverter and before the reference heater, T3 is the temperature behind the reference heater and T4 is the ambient temperature. The error matrix E considers a heat flow through the isolation and has been determined in a calibration process. After 4 hours at 3 kW the temperatures of the inverter and

Output currents

249

C. Temperature Distribution The temperature distribution shown in figure 14 has been determined using a JenOptik thermocamera after 60 min inverter operation at 2 kW and 75 min at 2.8 kW. The temperature of the capacitors C1 (Temperature T1 ) is somewhat higher than the ambient temperature. It can be seen that the temperature of the inductor windings (Temperature T3 ) are higher than the temperature of the cores (Temperature T2 ). This shows that here is some room for improvements. The component inside the white circle is a MOSFET which has not been properly connected to the heatsink. The hottest components of the inverter are some fast optocouplers used for galvanic isolation of the switching signals.

Fig. 12.

Caloriemetric test setup

the calorimetric measurement system reached steady state as depicted in figure 13. The results are depicted in table IV.

Fig. 14. Temperature distribution at 2.76 kW after 135 minutes of operation

Temperatures differences inside the calorimetric measurement box / K 20

V. S UMMARY

18

A new modulation technique for power-source inverters has been proposed. Two different vector control methods have been presented and discussed. Finally, experimental results have been presented, which show the proper operation of an inverter prototype in the kW-range employing a dc-link capacitance of only 10 µF and small filter inductances. A calorimetric measured efficiency of more than 98% shows the suitability of this concept for grid-connection of renewable energy systems. The next steps will be grid-connection and further optimization concerning efficiency.

16 Reference Heater P

ref

T3−T1

= 81.5 W

14

12 T2−T1

10

Inverter

8

6

4

2

0

0

0.5

1

1.5

2

2.5

3

3.5

4

t/h

R EFERENCES Fig. 13.

Temperature differences inside the measurement box

Measured input power Measured total inverter losses including control Measured losses of half-bridge driver and deadtime generators Measured losses of current sensors and control boards Efficiency including control Efficiency excluding control

3040 kW 59 W 4W 10.5 W 98.1 % 98.5 %

TABLE IV R ESULTS FROM THE CALORIMETRIC MEASUREMENT

250

[1] D. M. D IVAN , G. S KIBINSKI: Zero Switching Loss Inverters For High Power Applications, IEEE-IAS Annual Meeting, Conference Records, 1987, pp. 635-640. [2] D. M. D IVAN , G. V ENTAKATARAMANAN , R. W. D E D ONCKER: Design Methologies for Soft Switched Inverters, IEEE-IAS Annual Meeting, Conference Records, 1988, pp. 759-766. [3] R. W. D E D ONCKER , J.P. LYONS: The Auxiliary Resonant Commutated Pole Inverter, IEEE-IAS Annual Conference 1990, pp. 1228-1235. [4] H. VAN DER B ROECK: Use of LC Filters in Hard switching PWM Inverter Drives, Proceedings EPE 1995. [5] M. H. K HERALUWALA: High Power High Frequency DC-DC Converter, PhD-Thesis, University of Wisconsin Madison 1990. [6] A IX C ONTROL: XCS2000, www.aixcontrol.com [7] A. VAN DER B ORSCHE: Flow calorimeter for power electronic converters, Proceedings EPE 2001.