HIGH PERFORMANCE CONTROL OF INTERLEAVED BOOST CONVERTER FOR AC RAILWAY APPLICATION Miroslav Macan1, Nenad Težak2, Vladimir Siladi3 KONČAR – Electrical Engineering Institute Fallerovo šetalište 22, 10002 Zagreb, Croatia e-mail:
[email protected],
[email protected],
[email protected] Abstract. This paper describes the development of four-cell interleaved boost converter as well as the operation of this converter and its control scheme. The algorithm for digital control of singlephase boost-type switching-mode-rectifier is developed and digitally implemented in a digital signal processor based system. A prototype of the boost converter, rated at 120 kW, has been designed and implemented for use as an auxiliary power supply of electrical vehicles. Experimental results in digital control, synchronization operation and current sharing are presented. Keywords. Active filters, Adaptive control, Converter control, Power factor correction (PFC), Traction.
I. INTRODUCTION The boost converters are widely used in single-phase traction converters, because the controlled input current is sinusoidal, in phase with the input voltage and features near unity power factor operation. Basically, a boost converter is a combination of diode bridge rectifier and a boost converter with filtering and energy storage elements. The boost converter is supplied via separated windings of a traction transformer and supplies power to the electrical loads in electrical vehicles. The boost converter, acting as an active rectifier, stabilizes the output DC-link voltage, maintaining the voltage nearly constant regardless of line voltage variations including both fluctuations and distortions. Standard three-phase inverter units are then connected to this constant voltage DC-link to supply power AC induction motors at the desired frequency. The boost converter is required to operate, from no-load to full power, over a wide AC input voltage range, produce a regulated output DC-link voltage, and support full output load rejection. The design of boost converters for such applications is quite challenging, since the traction environment requires high performance systems that can manage a range of harsh environmental and electrical requirements without compromising performance, reliability and robustness. There are many variations of the basic boost scheme depending on the number of switches, the number of storage capacitors, locations of inductors (AC or DC side), hard or soft switching capability, presence of isolation and operating mode [1]. With the increase of power rating, it is often required to connect converters in parallel. For high current applications, interleaved boost converters are preferred, since the currents through the switches are a fraction of the input current. Besides, interleaved PWMs result in higher effective switching frequency of the converter, additionally minimizing the harmonics at the input and the output of the converter. New generation IGBTs will increase the efficiency of boost converters because of the improvement in their switching performance and forward voltage drop.
A further challenge for the system was to achieve good dynamic response under both continuous conduction mode (CCM) and discontinuous conduction mode (DCM) despite the converters high boost ratio and low switching frequency. With the development of digital technology, power electronics converters have regularly digital control system, implemented by the microprocessors or digital signal processors (DSPs) based systems. In this application, a controller was implemented as a fully digital DSP based system with outer Proportional-Integral (PI) voltage regulator, inner PI current regulator, and a modified version of an enhanced phase-locked loop (EPLL) algorithm. This modified implementation of EPLL provides fast response of the phase, frequency and amplitude estimation during sudden changes in input voltage (voltage sags, frequency steps, etc.), retaining robustness with respect to the distorted input signal due to high harmonic content of the supply currents even in very noisy environments polluted with significant amount of low order harmonics. This paper presents the control system design for 120 kW AC-DC auxiliary traction converter that boosts a nominal 340 V AC supply to regulated 670 V DC-link voltage, in order to supply an associated 3-phase 400 VRMS, 50 Hz AC output inverter. The simplified circuit configuration of the auxiliary power supply is presented is Section II. Modelling of four-interlaved boost converter is presented in Section III. The control strategy for digital DSP implementation is presented in Section IV. In Section V severe fluctuations AC supply available are considered as typical operating condition for this type of systems at medium power levels. In such applications, the modified implementation of EPLL provides fast response of the phase, frequency and amplitude, ensuring accurate synchronisation of converter to input voltage even in such polluted network environment. Section VI and VII contain description of the hardware implementation of the converter and some experimental results. Finally, the conclusion is presented in Section VIII.
II. CIRCUIT CONFIGURATION The auxiliary power supply with uni-directional power flow shown in Fig. 1, is realized by cascading single-phase diode bridge rectifier with boost type converter and three-phase inverter. The boost converter stabilizes the output DC-link voltage, maintaining the voltage nearly constant regardless of line voltage variations including both, fluctuations and distortions. Standard three-phase inverter units are then connected to this constant DC-link voltage to supply power to AC induction motors at the desired frequency. The power stage of the boost converter consists of an inductor, an IGBT control switch, a diode, and the output capacitor. The size of inductor determines the amount of high frequency ripple current at the input for continuous conduction mode of operation [2]. Before analyzing the operation of the circuit, several assumptions were employed: - all semiconductor components are ideal, i.e., they represent zero impedances in the “on” state and infinite impedances in the “off” state, - converter is controlled to operate at unity power factor - filter capacitor Cd is large enough so the voltage ripples across them are small compared to their DC-link voltage, filter capacitor Cd is modelled as voltage source Vd. Therefore, the above three assumptions allow setting of the following equations [3], [4]: (1) where Ps(t) and Pd(t) are the instantaneous input power and output power, respectively. Furthermore, when the boost converter is operating in CCM with unity power factor, the input power Ps(t) can be expressed as the product of input voltage sin ω and input current sin ω : sin ω
sin ω
cos 2ω
(2)
where /2 is the average input power. Therefore, from the previous two equations, we can obtain an expression for the output current: cos 2ω
(3)
where the average value of id is: (4) and the current through the filter capacitor is: cos 2ω
cos 2ω
(5)
so that the ripple vd,ac in vd can be estimated from (5) as ,
ω
sin 2ω
(6)
Fig. 1. Auxiliary supply system configuration
The minimum value of the filter capacitor Cd is determined by the basic requirement of filtering the 2nd harmonic current to achieve the design criteria of DC-link voltage peak to peak variation, ∆Vd,ac and can be expressed as follows: ω
∆
,
(7)
III. INTERLEAVED BOOST CONVERTER MODELLING This section presents a design procedure for the proposed interleaved boost converter. The boost converter generates DC-link voltage, which is higher than the input AC voltage. The input current in these converters flows through the inductor and therefore can easily be actively wave-shaped with appropriate current mode control. Boost converters provide controlled output DC-link voltage at near unity input power factor, while reducing total harmonic distortion (THD) of input AC current. These converters have found widespread use in various applications due to the advantages of high efficiency, high power density, and inherent power quality improvement at AC and DC side. Generally, the input current ripple and, consequently, the input EMI-filter can be significantly reduced by interleaving two or more boost converters as shown in Fig. 2, [5], [6]. This application employs four interlaced PWM boost converters. Interlacing is achieved by phase shift of the corresponding PWMs. For N boost converters corresponding PWMs should be shifted by angle π/N. In presented scheme wit N=4, PWMs for interlaced boost converters will be arranged with phase shift of π/2, π, 3π/2 and 2π. The harmonics of input current will be located in bands centered around frequency NxMr (where Mr is modulation ratio) and its multiples of N=4. Fig. 3 shows the main switching waveforms for the interleaved boost converter operating at high load in continuous conduction mode (CCM). This figure shows how switching the four-phase-legs at a π/2 displacement makes the individual boost inductor ripple current sum to produce an input current with significantly reduced ripple. The sum of the inductor currents is ib= ib1+ib2+ib3+ib4, i.e. the unfiltered input current, which has frequency equal to fourfold the switching frequency and has a peak-to-peak current ripple ∆ib significantly smaller than the ripple of the individual inductor currents ∆ib1-4. Generally, input-current ripple ∆ib between four inductor current is minimal when the phase shift is π/2 and maximal (fourfold 4∆ib1-4) when the phase shift is 0.
ib1
L b1
D b1
ib2
L b2
D b2
ib3
L b3
D b3
ib4
L b4
D b4
ib Dr1
is
~
Dr3
id
Cd
vs T b1 Dr2
T b2
T b3
i load
vd
LOAD
T b4
Dr4
Fig. 2. Four-cell interleaved boost converter
1
ib1
0.75
ib3
ib4
ib2
0.5 0.25
ib
0 -0.25 -0.5 -0.75 -1
0
25µs
50µs
75µs
100µs
125µs
150µs
175µs
200µs
225µs
250µs
Fig. 3. Input ripple current for four interleaved boost converter
The significant advantage of this topology is that the input current ripple of interleaved boost converters is of higher frequency than the switching frequency of single boost converter, while the peak to peak input current ripple is substantially reduced. Therefore, required EMI filter will be of reduced power rating. At any time at least one of the converters is supplying the load in addition to the capacitor. The frequency of ripple current in the output capacitor is N times higher, compared to the single stage, and therefore, the value of the required filter capacitor can be reduced. Additionally, the output current ripple can be also significantly reduced, resulting in a reduced equivalentseries-resistance (ESR) loss of the output capacitor, and possibility for capacitor volume reduction. Furthermore, even if the converters reverse to discontinuous conduction mode (DCM), where the input ripple mitigation reduces depending on the duty cycle, there is still a significant input ripple current benefit, compared to a single switch boost topology. The input-current ripple is dependent on the duty cycle, converter tolerances, e.g. tolerances of the boost inductances, as well as important phase shift between converters. In practice, the cancellation of harmonic bands will not be perfect and in particular, low order harmonics will still be present in input current. IV. CONTROL STRUCTURE Since the primary objective of the control system of the boost converter is to stabilize output DC-link voltage, the obvious starting point for feedback controller is a single PI
voltage regulator. The PI controller based on the error signal from the outer voltage loop, together with the output from phase angle estimator, builds the reference current [7], [8]. The inductor currents ib1-ib4 are forced to follow the reference current ib*, which is proportional to the rectified fundamental component of the input voltage, so that near unity power factor is achieved. The bandwidth of voltage control loop should be much lower than the double line frequency (100 Hz). Otherwise, the inductor current waveform would be distorted and the higher harmonic components of the input current would be increased. Simplified control structure of the input four-cell interleaved boost converter, implemented by DSP based module, is shown in Fig. 4. All feedback signals are synchronously sampled, and all corresponding measuring chains feature autocalibration (e.g. zero-offset adjustment) during the startup of the converter. Offsets cancelation is particularly important, in order to minimize odd harmonics in input currents (otherwise injected by the phase estimator and the current controller). Since the input stage of the auxiliary power converter consists of four boost converters connected in parallel, current reference is common to all four of them, while the current feedback is obtained as a total of all four measured currents. A single current controller determines desired duty-cycle for each of the four interleaved boost converters, running at the switching frequency of 4 kHz. Duty-cycles for each of the four phaseshifted PWMs are recalculated and readjusted after each execution of the cyclic program task (T=62.5 µs), resulting in true 16 kHz (4 × 4 kHz) dynamic behavior regarding the responses to step changes of the input voltage and/or the load (attached to the DC link). Additionally, the input active rectifier features hardware netmark, enabling accurate frequency measurement of the input voltage, as well as the true synchronization (within the fraction of the microsecond) through phase control of converter’s PWM to the zero-crossings of the input voltage. In this way, a few auxiliary converters (their input stages, i.e. active rectifiers) can be mutually interleaved with respect to their PWMs, thus resulting in higher effective PWM frequency and lower total harmonic content in power supply currents.
vdc*
|i b*|
ib*
δ
+ -
+ -
PWM + synch.
to the IGBT switches
vdc vs
θ
Phase angle estimation
sin(x)
(modified EPLL)
+
ib1 ib2 ib3 ib4
Fig. 4. Simplified block diagram of the implemented control structure
V. PRINCIPLES OF THE PROPOSED PHASE ANGLE ESTIMATION ALGORITHM PI voltage controller provides amplitude of the current reference, while the phase of its fundamental is defined by the output of the phase estimator [9]-[11]. In this application, a modified version of an EPLL algorithm was employed, Fig. 5. Modifications include input signal preprocessing, amplitude and phase compensated sliding Discrete Fourier Transform (DFT) and its feedback filters (adaptive sliding mean value or adaptive notch filter instead of low-pass filters). Auxiliary converter is supplied from 25 kV catenary line via the step down train transformer. Fluctuations in the catenary line voltage may cause an operating voltage range of + 25 % and - 30 % across terminals of the auxiliary winding to which the boost converter are connected. In addition to
these fluctuations, the supply voltage is highly distorted, containing zero voltage periods owing to the overlap phenomenon, by high-power line commutated traction rectifiers. Severe fluctuations in AC supply are considered as typical in this type of applications, whereas the boost converter offers a viable alternative to the solution of problem with strongly fluctuating supply voltage by preregulation. Therefore, for accurate synchronization of boost converter, operating in polluted power supply environment, advanced estimation algorithms are needed. Employed modified implementation of EPLL provides fast response of the phase, frequency, and amplitude estimation during sudden changes of input voltage (voltage sags, frequency steps etc.). Outputs from the employed phase-angle estimation algorithm (input and estimated voltage, frequency and phase angle), for typical catenary line voltage (at the end of contact feeder), are displayed in Fig 6. ωf f Loop filter
epd* =0
VCO
+ + -
ω
ωFLT
θ
+ Adaptive filter
vs
SDFT
+ -
sin(x)
phase detector
cos(x)
Fig. 5. Schematic block diagram of the implemented phase, frequency and amplitude estimator – modified EPLL
Fig. 6. Result of the proposed estimation scheme with the typical catenary line voltage
VI. HARDWARE IMPLEMENTATION A prototype with four interleaved boost converters connected in parallel has been implemented, Fig. 7. Output DC power for each boost converter is rated at 30 kW. The nominal input voltage is 340 VRMS and the output DC-link voltage is 670 V. The prototype is realized with standard IGBT modules of 1200 V. Each of converters operate with PWM phase shift of π/2. Since there are four converters connected in parallel, due to interlaced PWMs, the effective switching frequency of the converter is 16 kHz (4×4 kHz). Table I list the major parameters of the prototype. TABLE I: Boost converter prototype parameters Circuit parameters Value Nominal Input RMS voltage
Vs
340 V
Maximal input RMS current
Ismax
500 A
Input frequency
fs
50 Hz
Output DC voltage
Vdc
670 V
Output DC power
Pdc
120 kW
Boost inductance
Lb1…Lb4
1,4 mH
Output filter capacitance
Cd
38 mF
Switching frequency of one-cell
fsw
4 kHz
The control structure including modulation and gate signal generation is implemented by DSP module, built around TMS320LF2407 controller (system clock frequency 40 MHz, 10-bit A/D converter). The code to implement the control structure has been written in assembler, using graphical (block oriented) user environment. On the other hand, the integrated protection facilities are hardware based (overvoltage and undervoltage at both sides of boost converter, short-circuit protection within the boost converter – achieved by the peak current limit). The output voltage and the inductor currents are measured and sent to the DSP via A/D converter. The feedback voltage is compared with the reference voltage and the difference between them produces the error signal for the voltage regulator. The outputs from voltage PI controller and phase angle estimator build the current reference. The reference current is common to all four of them, while the current feedback is obtained as a total of all four measured currents. Consequently, the output of current controller defines duty-cycle necessary for gate signal generation. Gate driver circuit is optically isolated from DSP board and the output feedback is taken from an isolated transformer.
Initial settings of voltage and current controller are taken according to the simulations results, while the final values where obtain during the commissioning of the converter. The sampling frequency for both loops is set to 16 kHz in order to be synchronous with the effective switching frequency of the interleaved boost converters. VII. EXPERIMENTAL RESULTS The prototype of the converter is fed from AC lines via an isolation transformer. The transformer connected to the boost converter has been used to change the input voltage. The transformer introduces further distortion to the AC input voltage, especially at the test condition in which the input voltage to the boost converter is lowered. A sample waveform set is given in Fig. 8 and Fig. 9 for minimal input voltage of 255 VRMS and an output power of 100 kW. The inductor current of single boost converter and the input current are shown in Fig 8. The input voltage and current waveforms were recorded at the secondary side of the transformer and are shown in Fig. 9. In this particular application, each of four boost converters carry rectified AC current of 150 A peak with a superimposed 4 kHz component of 30 A. The ripple of line current is only 8 A at the frequency of 16 kHz.
Fig. 8. Input current (200 A/div) and inductor current of single boost converter (250 A/div) – left One half period of inductor current (25 A/div) – right
Fig. 9. Input voltage (100 V/div) and current (200 A/div) waveforms at DC load of 100 kW – left Detail of input voltage (100 V/div) and current (10 A/div) waveforms at zero-crossing of input current – right
Fig. 7. Prototype of 120 kW interleaved boost converter
The results show that the implemented boost converter satisfies the predetermined specifications against the variations in both the input voltage and the load. The boost type converter stabilizes the output DC-link voltage with a ripple of ± 2 % at full load. It maintains the output voltage nearly constant against the line voltage variations. Measured current distribution between parallel boost converters verifies that the current sharing is almost symetrical.
Harmonic spectrum of the input AC current, corresponding to the full load operating at rated input voltage, is obtained experimentally and is given in Table II. The measured THDi of the input current is about 11 %, while THDv of the input voltage is about 3 %. In practice, due to distorted catenary line input voltage, whose THDv sometimes exceeds 20 %, resulting THDi values of the input current are higher than those stated in Table II. Consequently, the input current of the boost converter has a deviation of desired sinusoidal shape. Furthermore, parameters such as EMI filter, tolerance in passive components, limited bandwidth and non-linearity of related sensors have significant influence, and can vary substantially, some of the system’s characteristics in different operating environments. However, according to the experimental data, the proposed estimation algorithm can also operate normally to obtain PFC function, even under distortion of the input voltage. TABLE II: The measured harmonic of input current Input Isx/Is1 Harmonic current [%] Order [ARMS] Is1
417,9
100,0
Is3
38,6
9,2
Is5
20,8
5,0
Is7
15,8
3,8
Is9
10,1
2,4
Is11
5,6
1,3
Is13
3,3
0,8
Is15
3,3
0,8
Is17
3,1
0,7
Is19
1,6
0,4
It was verified that the proposed PFC control strategy works well for wide input range voltage and load current range. The power factor for light load, due to the DCM operation, is a little bit smaller than the one for high load. It can be found that the power factor at high input voltage and low current, is also worse than the one at low input voltage and high current, but still over 0,98. VIII. CONCLUSION This paper discusses operation and digital control method for interleaved boost converter. A modified version of EPLL algorithm has been developed and implemented. The robust estimation algorithm used, enables the PFC function of the system and near unity power factor operation, even in harsh operating environment including highly polluted input voltage and fluctuating load. In other words, the output DC-link voltage is insensitive to the input voltage and load variations. The converter was designed as a four parallel interleaved boost converter, which is suitable topology for higher power applications. The most important feature of the high-power interleaved boost converters is their ability to shape line current in order to follow line voltage waveform. Additionally, interleaved boost converters can also reduce the ripple of the input current, as well as the switching losses, improving the efficiency of the converter. Furthermore, the control algorithm employing interlaced PWMs results with
the effective switching frequency of 16 kHz (4×4 kHz) and improved dynamic behavior regarding the responses to step changes in the input voltage and load. Finally, the four phase leg interleaved boost structure allowed each IGBT module to be mounted on a separate heatsink section, which facilitated the air cooling design. A prototype of four interleaved boost converter, controlled by DSP based module, was constructed and proposed digital control strategy was verified. The experimental results show that the near unity power factor operation can be achieved under wide input voltage and load conditions. A sinusoidal current waveform with low THDi can be achieved, even for severely distorted input voltage. IX. REFERENCES [1] A. Pandey, B. Singh, D. P. Kothari, "Comparative Evaluation of Single-phase Unity Power Factor ac-dc Boost Converter Topologies", IE (I) Journal-EL, vol. 85, September, 2004. [2] I. Cadirci, S. Varma, M. Ermis, T. Gulsoy, "A 20 kW, 20 kHz Unity Power Factor Boost Converter for ThrePhase Motor Drive Applications from an Unregulated Single-Phase Supply", IEEE Trans. on Energy Conversion, vol. 14, no. 3, September 1999. [3] H.-C. Chen, "Duty Phase Control for Single-Phase Boost-Type SMR", IEEE Trans. on Power Electron., vol. 23, no. 4, July, 2008. [4] J. Shen, A. D. Mansell, "The simplified analysis and design of a PWM converter system for a three-phase traction drive", Supplied by the British Library, C478/6/043, 1995. [5] Y. Jang, M. M. Jovanović, "Intereleaved Boost Converter with Intrinsic Voltage-Doubler Characteristic for Universal-Line PFC Front End", IEEE Trans. on Power Electron., vol. 22, no. 4, July, 2007. [6] R. Mirzaei, V. Ramanarayanan, "Polyphase Boost Converter with Digital Control", EPE Journal, vol 16, no. 3, September, 2006. [7] D. G. Holmes, B. P. McGrah, D. Segaran, W. Y. Kong, "Dynamic Control of a 20 kW Interleaved Boost Converter for Traction Applications", Ind. App. Society Annual Meeting IAS08, October, 2008. [8] L. Huber, B. T. Irving, M. M. Jovanovic, "Open-Loop Control Methods for Interleaved DCM/CCM Boundary PFC Converters", IEEE Trans. on Power Electron., vol. 23, no. 4, July, 2008. [9] H.-S. Song, K. Nam, and P. Mutschler: "Very fast phase angle estimation algorithm for a single phase system having sudden phase angle jumps", Ind. App. Conf., vol. 2, pp. 925-931, 2002. [10] H.-S. Song, K. Nam, "Instantaneous phase-angle estimation algorithm under unbalanced voltage-sag conditions", Generation, Transmission and Distribution, IEE Proceedings, vol. 147, issue 6, pp. 409-415, November, 2000. [11] J. C. Ferreira, A. P. Martins, "An Improved Technique for the Estimation of Local Frequency, Fundamental Component Phasor and Instantaneous Symmetrical Components", Internat. conf. on renewable energy and power quality, Palma de Mallorca, April, 2006.
