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IEEE ELECTRON DEVICE LETTERS, VOL. 34, NO. 3, MARCH 2013

High-Quality ICPCVD SiO2 for Normally Off AlGaN/GaN-on-Si Recessed MOSHFETs Bong-Ryeol Park, Jae-Gil Lee, Woojin Choi, Hyungtak Kim, Kwang-Seok Seo, and Ho-Young Cha, Member, IEEE

Abstract—We have developed a high-quality SiO2 deposition process using an inductively coupled plasma chemical vapor deposition system for use as a gate oxide of AlGaN/GaN-on-Si metal–oxide–semiconductor heterostructure field-effect transistor (MOSHFET) for power switching applications. A breakdown field of ∼12 MV/cm was achieved using the optimized deposition conditions that were successfully applied in fabrication of the normally off AlGaN/GaN-on-Si MOSHFETs. The fabricated device exhibited excellent characteristics: a maximum drain current density of 375 mA/mm, a threshold voltage of 3 V, and a breakdown voltage of 820 V.

TABLE I SiO2 P ROPERTIES AS A F UNCTION OF D EPOSITION C ONDITIONS

Index Terms—GaN, inductively coupled plasma chemical vapor deposition (ICPCVD), metal–oxide–semiconductor heterostructure field-effect transistor (MOSHFET), SiO2 .

I. I NTRODUCTION

W

IDE bandgap III-nitride semiconductors are very promising candidates for next-generation high-efficient power devices due to their superior material properties, such as high critical electric field and high electron mobility [1]. Owing to their strong piezoelectric and spontaneous polarization effects, AlGaN/GaN heterostructure field-effect transistors (HFETs) exhibit high current density even without any intentional doping. On the other hand, this polarization-induced high carrier density makes it very difficult to implement normally off operation. Various methods have been reported to make normally off AlGaN/GaN HFETs, e.g., a thin AlGaN barrier layer [2], a recessed gate structure [3], a fluorine-based plasma treatment [4], a gate injection transistor [5], a tunnel junction FET [6], a floating gate [7], etc. In most cases, the turn-on voltages are below 2 V, which are not enough to meet the system requirements. One possible approach to increase the turn-on voltage is to employ a metal–insulator–semiconductor (MIS)-based gate structure where great care should be taken in developing a high-quality insulator. In this letter, we developed a high-quality SiO2 film deposition process using an inductively coupled plasma chem-

ical vapor deposition (ICPCVD) system, which was successfully applied in fabrication of high-breakdown-voltage normally off AlGaN/GaN-on-Si metal–oxide–semiconductor HFETs (MOSHFETs). SiO2 is a very attractive material for a recessed MIS structure due to its large bandgap energy and conduction band offset from AlGaN. There are several reports dealing with a plasma-enhanced chemical vapor deposition (PECVD) SiO2 for AlGaN/GaN MOSHFETs [8], [9]. However, an ICPCVD SiO2 has not been reported yet for AlGaN/GaN MOSHFET application. ICPCVD systems can produce highquality films due to high-density plasma and low deposition pressure and temperature, which result in advantages of minimizing film contamination, improving film stoichiometry, reducing radiation damage by direct ion–surface interaction, and eliminating thermal degradation at high temperatures [10]. II. E XPERIMENTS AND D ISCUSSIONS

Manuscript received September 9, 2012; revised December 13, 2012; accepted December 21, 2012. Date of publication January 18, 2013; date of current version February 20, 2013. This work was supported in part by programs 20120002507 and 2012042153, by the Nano Material Technology Development Program (2012035274) through the National Research Foundation of Korea Grant funded by the Korean Government (Ministry of Education, Science, and Technology), and by the Joint Development Program of Seoul Semiconductor Inc. The review of this letter was arranged by Editor S.-H. Ryu. B.-R. Park, J.-G. Lee, H. Kim, and H.-Y. Cha are with the School of Electronic and Electrical Engineering, Hongik University, Seoul 121-791, Korea (e-mail: [email protected]). W. Choi and K.-S. Seo are with the School of Electrical Engineering, Seoul National University, Seoul 151-744, Korea. Color versions of one or more of the figures in this letter are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/LED.2012.2236678

SiO2 films were deposited by using an ICPCVD system with SiH4 and O2 mixtures as reactant gases and Ar as a carrier gas. The film deposition was carried out at 250◦ C. The reactant gas flow rate was fixed in this study, i.e., SiH4 : O2 = 4 : 7.2 sccm, which had been previously optimized for stable flow and low deposition rate. The Ar flow rate, source RF power, and pressure were varied to optimize the deposition conditions. Films were characterized by deposition rate, breakdown field, etch rate in buffered oxide etchant (BOE), and thickness uniformity. Measured film properties for different deposition conditions are summarized in Table I. The films were deposited on 2 × 2 cm2 pieces for the first and second sets of experiments,

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PARK et al.: HIGH-QUALITY ICPCVD SiO2 FOR NORMALLY OFF AlGaN/GaN-on-Si RECESSED MOSHFETs

Fig. 1. (a) Breakdown field as a function of source RF power. (b) Leakage current behavior for the optimized SiO2 film.

Fig. 2. Cross-sectional schematics of (a) nonrecessed and (b) recessed AlGaN/GaN MOSHFETs. Lext is the gate overhang length.

whereas they were deposited on 6-in wafers for the third set to evaluate the thickness uniformity. The deposition rate decreased with increasing the Ar flow rate and source RF power. It is suggested that the reduction in deposition rate is associated with a sputtering effect due to increased ion bombardment [11]. It should be noted that the films deposited with low source RF powers exhibited faster BOE etch rates as well as lower breakdown fields with large variation [see Fig. 1(a)]. It is speculated that the films deposited with low source RF powers contain more pinholes and weak spots. The optimum source RF power was decided to be 1500 W, which resulted in a breakdown field close to 12 MV/cm. When the pressure was varied with a fixed source RF power (i.e., 1500 W) in the third set of experiments, the thickness uniformity over a 6-in wafer was improved with lowering the pressure. The slightly different film properties between the second and third sets of experiments are probably associated with run-to-run variation. Finally, the optimum deposition conditions were decided as follows: a gas flow rate of SiH4 /O2 /Ar(= 4/7.2/60 sccm), a source RF power of 1500 W, a pressure of 5 mTorr, and a deposition temperature of 250◦ C. The leakage current behavior for the optimized film is shown in Fig. 1(b). Normally off recessed AlGaN/GaN-on-Si MOSHFETs were fabricated using the optimized SiO2 deposition process. Nonrecessed MOSHFETs were also fabricated for comparison. The cross-sectional schematics of nonrecessed and recessed AlGaN/GaN-on-Si MOSHFETs are shown in Fig. 2. The mobility and sheet carrier concentration were ∼1600 cm2 /V · s and ∼1 × 1013 cm−2 , respectively. The device fabrication began with mesa isolation [12], and the gate recess was carried out only for the recessed devices using a low-damage Cl2 /BCl3 based inductively coupled plasma reactive ion etching method whose etch depth variation was < 5%. The final target thick-

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Fig. 3. (a) Transfer characteristics of nonrecessed and recessed MOSHFETs at the drain voltage of 15 V and (b) current–voltage characteristics of a recessed MOSHFET. The channel width was 100 μm.

Fig. 4. (a) Breakdown voltage characteristics of normally off recessed MOSHFETs as a function of gate overhang length (Lext ). The reference mark is for the normally on nonrecessed MOSHFET. The gate biases for normally off and normally on devices were 0 and −13 V, respectively, and the breakdown refers to catastrophic breakdown. (b) Breakdown characteristics for the device with a gate overhang length of 1 μm (measured using Tektronix curve tracer).

ness of the recessed AlGaN barrier was 3–4 nm. A 20-nm SiO2 film was then deposited using the optimized deposition process described earlier. A Si/Ti/Al/Mo/Au metal stack was used for the ohmic metallization, whereas a Ni/Au stack was used for the gate metallization. The transfer contact and sheet resistances were ∼1 Ω · mm and 420 Ω/sq, respectively. The gate overhang length (Lext ) of the recessed MOSHFET was varied from 1 to 5 μm. Transfer and leakage characteristics of nonrecessed and recessed devices are compared in Fig. 3(a), and current–voltage characteristics of a recessed device are shown in Fig. 3(b). The maximum drain current densities of the nonrecessed and recessed devices were 550 and 375 mA/mm, respectively. The threshold voltage of normally off device was Vgs = 3 V when extrapolated from the linear region of the transfer curve and Vgs = 1.8 V when defined at the drain current of 1 mA/mm. The on-resistances for nonrecessed and recessed devices were 1.9 and 4.4 mΩ · cm2 , respectively. It is suggested that the higher on-resistance of the recessed device was attributed to the limited channel opening and more scattering with the recessed surface very near the channel, particularly when a high positive gate bias was applied. The measured breakdown voltages as a function of the gate overhang length are plotted in Fig. 4(a). A breakdown voltage of 820 V was achieved with the gate overhang length of 1 μm, whose characteristics are shown in Fig. 4(b). For comparison, the nonrecessed device exhibited 780 V. It is suggested that the gate overhang in the recessed device acted like a field plate spreading out the electric field distribution. However, the monotonic decrease in breakdown voltage as a function of gate

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IEEE ELECTRON DEVICE LETTERS, VOL. 34, NO. 3, MARCH 2013

ACKNOWLEDGMENT The authors would like to thank Senior Researcher B. O. Lee of the Korea Advanced Nano Fab Center for his technical support and discussion. R EFERENCES

Fig. 5. (a) C–V hysteresis characteristics for nonrecessed and recessed MOSs with a diameter of 200 μm (frequency = 100 kHz) and (b) on-resistance change after step stress test for normally off device. The gate biases for stress and on-current measurements were 0 and 14 V, respectively.

overhang length implies that the breakdown is governed by the distance from the gate overhang edge to the drain [13]. Similar dependence was observed for field-plated devices [13], [14]. It is suggested that the breakdown voltage can be further increased by optimizing the SiO2 thickness under the gate overhang region. The capacitance–voltage (C–V ) characteristics for both types were measured to investigate the interface quality of the gate dielectric layer. As shown in Fig. 5(a), the recessed device exhibited negligible hysteresis. It is speculated that the small hysteresis observed in the nonrecessed device is associated with the formation of a GaN potential well between SiO2 and AlGaN. The interface trap densities extracted by Terman’s method [15] were ∼ 1 × 1012 eV−1 · cm−2 for both nonrecessed and recessed MOSs. The small capacitance value remaining below 0 V for the recessed MOS is associated with the small overhang region outside the recessed region, which is why the complete pinchoff occurs at the same voltage as the nonrecessed MOS. Change in on-resistance after OFF-state drain voltage stress was investigated for a normally off device. The drain stress voltage started from 20 V and was continuously increased by 20 V every 1 min up to 400 V (i.e., 20-min stress), and the stress cycle restarted from 20 V up to 600 V (i.e., 30-min stress). Change in current–voltage characteristics after each stress cycle is shown in Fig. 5(b). After two stress cycles (i.e., 0 → 400 V and 0 → 600 V), the on-resistance was increased by 1.8 times, which is comparable with other reported data [16], [17]. Optimizing the device structure, processing, and wafer quality will certainly improve the device reliability.

III. C ONCLUSION We have developed a high-quality SiO2 film deposition process using an ICPCVD system for use as a gate dielectric material for AlGaN/GaN MOSHFETs. Normally off AlGaN/ GaN-on-Si MOSHFETs were successfully fabricated by using the optimized SiO2 deposition process, and the fabricated devices exhibited excellent characteristics, i.e., a maximum current density of 375 mA/mm, a threshold voltage of 3 V, and a breakdown voltage of 820 V. It is suggested that the ICPCVD SiO2 has great potential as a gate dielectric material for AlGaN/GaN HFETs.

[1] J.-G. Lee, B.-R. Park, H.-J. Lee, M. Lee, K.-S. Seo, and H.-Y. Cha, “Stateof-the-art AlGaN/GaN-on-Si heterojunction field effect transistors with dual field plates,” Appl. Phys. Exp., vol. 5, no. 6, pp. 066502-1–066502-3, May 2012. [2] Y. Ohmaki, M. Tanimoto, S. Akamatsu, and T. Mukai, “Enhancement mode AlGaN/AlN/GaN high electron mobility transistor with low on state resistance and high breakdown voltage,” Jpn. J. Appl. Phys., vol. 45, no. 44, pp. L1168–L1170, Nov. 2006. [3] W. Saito, Y. Takada, M. Kuraguchi, K. Tsuda, and I. Omura, “Recessedgate structure approach toward normally off high-voltage AlGaN/GaN HEMT for power electronics applications,” IEEE Trans. Electron Devices, vol. 53, no. 2, pp. 356–362, Feb. 2006. [4] Y. Cai, Y. Zhou, K. M. Lau, and K. J. Chen, “Control of threshold voltage of AlGaN/GaN HEMTs by fluoride-based plasma treatment: From depletion mode to enhancement mode,” IEEE Trans. Electron Devices, vol. 53, no. 9, pp. 2207–2215, Sep. 2006. [5] Y. Uemoto, M. Hikita, H. Ueno, H. Matsuo, H. Ishida, M. Yanagihara, T. Ueda, T. Tanaka, and D. Ueda, “Gate injection transistor (GIT)—A normally-off AlGaN/GaN power transistor using conductivity modulation,” IEEE Trans. Electron Devices, vol. 54, no. 12, pp. 3393–3399, Dec. 2007. [6] L. Yuan, H. Chen, and K. J. Chen, “Normally off AlGaN/GaN metal– 2DEG tunnel-junction field-effect transistors,” IEEE Electron Device Lett., vol. 32, no. 3, pp. 303–305, Mar. 2011. [7] B. Lee, C. Kirkpatrick, X. Yang, S. Jayanti, R. Suri, J. Roberts, and V. Misra, “Normally-off AlGaN/GaN-on-Si MOSHFETs with TaN floating gates and ALD SiO2 tunnel dielectrics,” in Proc. IEEE IEDM, Dec. 2010, pp. 484–487. [8] H. Kambayashi, T. Nomura, S. Kato, H. Ueda, A. Teramoto, S. Sugawa, and T. Ohmi, “High integrity SiO2 gate insulator formed by microwaveexcited plasma enhanced chemical vapor deposition for AlGaN/GaN hybrid metal–oxide–semiconductor heterojunction field-effect transistor on Si substrate,” Jpn. J. Appl. Phys., vol. 51, no. 4, pp. 04DF03-1–04DF03-4, Apr. 2012. [9] V. Adivarahan, S. Rai, N. Tipirneni, A. Koudymov, J. Yang, G. Simin, and M. A. Khan, “Digital oxide deposition of SiO2 layers for III-nitride metal–oxide–semiconductor heterostructure field-effect transistors,” Appl. Phys. Lett., vol. 88, no. 18, pp. 182507-1–182507-3, May 2006. [10] O. Thomas, “Inductively coupled plasma chemical vapour deposition,” in White Paper. Oxford, U.K.: Oxford Inst. Plasma Technol. Ltd, 2010. [11] K. Mackenzie, J. Lee, and D. Johnson, “Inductively-coupled plasma deposition of low temperature silicon dioxide and silicon nitride films for III–V applications,” in Proc. 30th Symp. State-of-the-Art Progr. Comp. Semicond., May 1999, pp. 1–12. [12] B.-R. Park, J.-G. Lee, J. Lim, K.-S. Seo, and H.-Y. Cha, “Breakdown voltage enhancement in field plated AlGaN/GaN-on-Si HFETs using mesafirst prepassivation process,” Electron. lett., vol. 48, no. 3, pp. 181–182, Feb. 2012. [13] J.-G. Lee, H.-J. Lee, M. Lee, Y. Ryoo, K.-S. Seo, J.-K. Mun, and H.-Y. Cha, “Field-plated AlGaN/GaN-on-Si HEMTs for high voltage switching applications,” J. Korea Phys. Soc., vol. 59, no. 3, pp. 2297– 2300, Sep. 2011. [14] D. Visalli, M. V. Hove, J. Derluyn, P. Srivastava, D. Marcon, J. Das, M. R. Leys, S. Degroote, K. Cheng, E. Vandenplas, M. Germain, and G. Borghs, “Limitations of field plate effect due to the silicon substrate in AlGaN/GaN/AlGaN DHFETs,” IEEE Trans. Electron Devices, vol. 57, no. 12, pp. 3333–3339, Dec. 2010. [15] D. A. Deen and J. G. Champlain, “High frequency capacitance–voltage technique for the extraction of interface trap density of the heterojunction capacitor: Terman’s method revised,” Appl. Phys. Lett., vol. 99, no. 5, pp. 053501-1–053501-3, Aug. 2011. [16] R. Chu, A. Corrion, M. Chen, R. Li, D. Wong, D. Zehnder, B. Hughes, and K. Boutros, “1200-V normally off GaN-on-Si field-effect transistors with low dynamic on-resistance,” IEEE Electron Device Lett., vol. 32, no. 5, pp. 632–634, May 2011. [17] S. Huang, Q. Jiang, S. Yang, C. Zhou, and K. J. Chen, “Effective passivation of AlGaN/GaN HEMTs by ALD-grown AlN thin film,” IEEE Electron Device Lett., vol. 33, no. 4, pp. 516–518, Apr. 2012.