High temperature annealing effects on deep-level

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Today, semi-insulating SiC substrates are normally produced without V doping, and therefore commonly called “high- purity semi-insulating” (HPSI) ones.1 In ...
High temperature annealing effects on deep-level defects in a high purity semiinsulating 4H-SiC substrate Naoya Iwamoto, Alexander Azarov, Takeshi Ohshima, Anne Marie M. Moe, and Bengt G. Svensson Citation: Journal of Applied Physics 118, 045705 (2015); doi: 10.1063/1.4927040 View online: http://dx.doi.org/10.1063/1.4927040 View Table of Contents: http://scitation.aip.org/content/aip/journal/jap/118/4?ver=pdfcov Published by the AIP Publishing Articles you may be interested in Deep levels induced by reactive ion etching in n- and p-type 4H–SiC J. Appl. Phys. 108, 023706 (2010); 10.1063/1.3460636 Compensation mechanism in high purity semi-insulating 4 H - Si C J. Appl. Phys. 101, 053716 (2007); 10.1063/1.2437677 Defect levels and types of point defects in high-purity and vanadium-doped semi-insulating 4H–SiC J. Appl. Phys. 96, 5484 (2004); 10.1063/1.1797547 Stability of deep centers in 4H-SiC epitaxial layers during thermal annealing Appl. Phys. Lett. 85, 1716 (2004); 10.1063/1.1790032 Fermi level control and deep levels in semi-insulating 4H–SiC J. Appl. Phys. 86, 5040 (1999); 10.1063/1.371476

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JOURNAL OF APPLIED PHYSICS 118, 045705 (2015)

High temperature annealing effects on deep-level defects in a high purity semi-insulating 4H-SiC substrate Naoya Iwamoto,1,a) Alexander Azarov,1 Takeshi Ohshima,2 Anne Marie M. Moe,3 and Bengt G. Svensson1

1 Department of Physics, Center for Materials Science and Nanotechnology, University of Oslo, P.O. Box 1048 Blindern, N-0316 Oslo, Norway 2 Japan Atomic Energy Agency, 1233 Watanuki, Takasaki, 370-1292 Gunma, Japan 3 Washington Mills AS, N-7300 Orkanger, Norway

(Received 27 May 2015; accepted 7 July 2015; published online 23 July 2015) Effects of high-temperature annealing on deep-level defects in a high-purity semi-insulating 4H silicon carbide substrate have been studied by employing current-voltage, capacitance-voltage, junction spectroscopy, and chemical impurity analysis measurements. Secondary ion mass spectrometry data reveal that the substrate contains boron with concentration in the mid 1015 cm3 range, while other impurities including nitrogen, aluminum, titanium, vanadium and chromium are below their detection limits (typically 1014 cm3). Schottky barrier diodes fabricated on substrates annealed at 1400–1700  C exhibit metal/p-type semiconductor behavior with a current rectification of up to 8 orders of magnitude at bias voltages of 63 V. With increasing annealing temperature, the series resistance of the Schottky barrier diodes decreases, and the net acceptor concentration in the substrates increases approaching the chemical boron content. Admittance spectroscopy results unveil the presence of shallow boron acceptors and deep-level defects with levels in lower half of the bandgap. After the 1400  C annealing, the boron acceptor still remains strongly compensated at room temperature by deep donor-like levels located close to mid-gap. However, the latter decrease in concentration with increasing annealing temperature and after 1700  C, the boron acceptor is essentially uncompensated. Hence, the deep donors are decisive for the semi-insulating properties of the substrates, and their thermal evolution limits the thermal budget for device processing. The origin of the deep donors is not well-established, but substantial C 2015 AIP Publishing LLC. evidence supporting an assignment to carbon vacancies is presented. V [http://dx.doi.org/10.1063/1.4927040]

I. INTRODUCTION

Semi-insulating silicon carbide (SiC) substrates are a key material for various electronic applications such as highfrequency power devices,1,2 substrates for III–V compounds and graphene growths,3,4 radiation detectors,5,6 and quantum information processing.7,8 In general, semi-insulating semiconductor materials are realized by forming deep levels in the middle of the bandgap so that residual impurities with shallow donor and acceptor levels are compensated, and consequently, the Fermi level position (EF) is pinned close to mid-gap. In the case of SiC, semi-insulating substrates were previously produced by intentional doping of vanadium (V) during growth since V is known to form deep levels giving rise to compensation.9,10 However, this is not an ideal solution for device applications because the V concentration required to achieve a full compensation has to be quite high (1017 cm3).11 Such a high concentration can readily cause charge build-up during transistor operation, resulting in a threshold voltage shift (the so-called backgating effect12). Today, semi-insulating SiC substrates are normally produced without V doping, and therefore commonly called “highpurity semi-insulating” (HPSI) ones.1 In HPSI substrates, a)

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intrinsic defects such as the carbon vacancy (VC) and the divacancy (VCVSi) are believed to play a decisive role. Using electron paramagnetic resonance (EPR) techniques, Son et al.13 reported that high concentrations of VC and VCVSi (1015 cm3) exist in HPSI substrates, exhibiting a high thermal activation energy (EA) of conductivity (1.5 eV). This implies that EF is pinned close to mid-gap where VC/VCVSi-related levels are known/supposed to exist. After high temperature annealing at 1400–1600  C, the concentration of VC and VCVSi decreased and also EA of conductivity decreased to 1.06 eV. Hence, the semi-insulating properties degrade after such high temperature treatment, and in fact, this is critical for devices based on HPSI SiC substrates since their fabrication includes processes like epitaxial layer growth and post-implantation annealing performed well above 1400  C. Accordingly, a better understanding of high temperature annealing effects on deep levels in HPSI SiC is of decisive importance for designing the optimum device fabrication processes. However, unlike that for more conductive materials, deep level analysis in HPSI SiC is not straight forward because of the limitations of the use of deep level transient spectroscopy (DLTS) on high-resistivity materials. Attempts of deep level analysis using optical admittance spectroscopy and thermally stimulated current (TSC) techniques have

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been made,5,14 and the presence of deep levels close to midgap was confirmed but also the existence of levels at intermediate positions. Thus, a full picture of the defect evolution in HPSI substrates after high temperature treatment remains to be established, and the number of reports in the literature on this subject is scarce. In this study, we have undertaken chemical impurity analysis and electrical junction spectroscopy measurements on HPSI 4H-SiC substrates subjected to annealing between 1400 and 1700  C. For the electrical measurements, Schottky barrier diodes (SBDs) were used, and in accordance with previous EPR-results,13 the semi-insulating properties are found to degrade with increasing annealing temperature. The chemical analysis unveils boron as the prevailing residual impurity while admittance spectroscopy (AS) data, taken over a wide temperature range (80–680 K), reveal four distinct levels in the lower part of the bandgap. Indirect evidence for a deep and dominant donor level is found and it is tentatively ascribed to VC. II. EXPERIMENTS

The samples used were cut from a commercially available HPSI 4H-SiC substrate (3 in.-diameter, 360 lm-thick), with the Si-face chemical-mechanical-polished to epi-ready quality and the C-face mechanical-polished. For the chemical analysis, secondary ion mass spectrometry (SIMS) measurements using a CAMECA IMS 7f microanalyzer were performed on the as-received samples. The concentrations of shallow dopants including nitrogen (N), aluminum (Al) and boron (B), and common transition metals including titanium (Ti), vanadium (V), and chromium (Cr) were monitored on the Si-face to a depth of a few lm. Primary ions of cesium (Csþ) were employed for the N analysis, while oxygen ions (O2þ) were used for the other elements. Typical erosion rates during depth profiling were 2 nm/s and 7 nm/s for the Csþ and O2þ ions, respectively. Prior to the SIMS measurements, a 50 nm-thick gold film was deposited via thermal evaporation on the Si-face of the samples in order to minimize the influence of sample charging during the analysis. In order to prepare low resistive Ohmic contact on the C-face, required for the electrical characterization, Al was implanted at 800  C with multiple energies to form a 200 nm-thick box profile with a plateau concentration of 1  1019 Al/cm3. Post-implant annealing was performed at either 1400 or 1500 or 1600 or 1700  C in Ar ambient for 30 min to electrically activate the Al atoms. During the annealing, both the Si- and C-face of the samples were protected by a carbon cap to minimize surface roughening (step bunching).15 After the annealing, the carbon cap was removed in O2 ambient at 800  C for 30 min, and subsequently the oxide layers on the samples were etched away by hydrofluoric acid. Then, a 20 nm-thick Al layer was deposited on the C-face by thermal evaporation and alloyed at 850  C for 5 min in Ar ambient. The alloyed layer was further coated with a 100 nm-thick Al layer. For the Schottky barriers on the Si-face, 150 nm-thick nickel (Ni) contacts with the area of 1 mm2 were thermally deposited

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through a shadow mask. No thermal treatments were performed after the Ni deposition. The fabricated SBDs were characterized by current-voltage (I-V), capacitance-voltage (C-V), and AS measurements using a Keithely 6487 picoammeter and an Agilent 4284A LCR meter. The SBDs were mounted in a custom-made temperature-controllable sample holder (cryostat) with the bias voltage applied to the top Ni contact and the back Ohmic Al contact grounded. All the measurements were performed in vacuum and in darkness. III. RESULTS A. Impurity analysis

Table I summarizes the impurity concentrations in the as-received HPSI substrate, as determined by SIMS, where also the detection limits of each element are included. B occurs with a concentration of 5–6  1015 cm3, while all the other elements are below their detection limit, typically 1014 cm3 except for N. In the latter case, the detection limit was 1017 cm3 for the analysis conditions used, which is a rather typical value for SIMS analysis of N in SiC, and well above the recorded [B] (brackets denote concentration values). However, the actual [N] is regarded to be below that of [B] since all the SBDs exhibit p-type conduction, as will be shown in Section III B. B. Current-voltage and capacitance-voltage characteristics

Figure 1(a) shows I-V characteristics of the SBD on the 1500  C annealed substrate. The I-V curve labeled #1 was recorded just after inserting the sample into the cryostat and concurrently being exposed to room light. The curve displays a typical metal/p-type semiconductor rectification, and the p-type conductivity is attributed to the residual B atoms acting as acceptor dopants. Subsequently, the leakage current at þ5 V reverse bias voltage was measured as a function of temperature from RT to 680 K with a ramp rate of 2 K/min (I-T #2, Fig. 1(b)); the leakage current increases with temperature, but with a clear peak at 477 K. The sample was then cooled down to RT at zero bias voltage and I-V curve #3 was recorded (Fig. 1(a)), exhibiting a lower reverse as well as forward current than curve #1. In the following I-T scan (#4, Fig. 1(b)), the peak at 477 K does not occur and the curves #2 and #4 are identical above 520 K. After exposure of the sample to room light again, the same SBD TABLE I. Impurity concentrations in the as-received HPSI substrate determined by SIMS. The detection limits of each element during the measurement conditions used are also listed. Element B N Al Ti V Cr

Concentration (cm3)

Detection limit (cm3)

5–61015 Detection limit Detection limit Detection limit Detection limit Detection limit

8  1014 1  1017 3  1014 2  1014 6  1013 1  1014

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FIG. 1. (a) Current-voltage (I-V) characteristics of the SBD on the 1500  C annealed substrate, measured at RT. (b) Temperature dependence of the leakage current (I-T) of the SBD on the 1500  C annealed substrate measured at a reverse bias voltage of 5 V. The measurements were performed sequentially with the order of I-V #1, I-T #2, I-V #3, and I-T #4 in vacuum and darkness. Before recording I-V #1, the sample was exposed to room light.

FIG. 2. (a) I-V characteristics of the SBDs on the 1400, 1500, 1600, and 1700  C annealed substrates. The measurements were performed at RT after cooling the samples down from 600 K or higher in vacuum and darkness. (b) Schottky barrier heights (uB) of the SBDs deduced from the temperature dependence of saturation current (ln(I0/T2) versus 1/T plot) and from I0 at RT assuming the effective Richardson constant A* ¼ 210 A/cm2K2. (c) Series resistance (RS) of the SBDs deduced from the forward I-V characteristics shown in (a).

characteristics as given by curves #1–4 can be repeated, i.e., the optically induced and thermally induced processes causing the conductivity modulation in the HPSI substrate are reversible. Further, the same behavior is observed for all the SBDs, irrespective of the substrate annealing temperature (1400–1700  C), and Mandal et al.5 have also reported a similar peak in I-T curves of HPSI 4H-SiC substrates. In Ref. 5, the TSC measurements were undertaken with different ramp rates and combined with UV light illumination (302 nm, 1.5 mW/cm2) at 85 K; an activation energy of 1.1–1.2 eV was associated with the “477 K peak” and comparison with simulations of the peak shape indicated two distinct contributions. However, no information on the microstructure of the deep level defects involved and their charge states (acceptor-like or donor-like) was obtained. The “477 K peak” is of vital importance for electrooptical devices fabricated on HPSI 4H-SiC substrates, e.g., III–V light emitting diodes and lasers, and deserves indeed further attention. However, it is beyond the scope of the present study and in the following, all the electrical data were acquired after cooling down of the samples from 600 K (or higher) to RT in darkness, unless specified otherwise, in order to eliminate illumination effects. Figure 2(a) compares the I-V characteristics of the SBDs on the 1400, 1500, 1600, and 1700  C annealed substrates. Before the measurements, the samples were heated up to 600 K and then cooled down to RT. The forward current increases with the substrate annealing temperature, while the reverse leakage current remains approximately constant. The Schottky barrier height (uB) and the series resistance (RS) of the SBDs deduced from their forward characteristics are depicted in Figs. 2(b) and 2(c), respectively. The uB were deduced by two different methods; from the temperature dependence of saturation current (ln(I0/T2) versus 1/T plot) at temperatures from RT to 680 K and from I0 at RT assuming the effective Richardson constant

A* ¼ 120(m*/m0) A/cm2K2, where m* and m0 are the hole effective mass and the electron rest mass, respectively. For the direction parallel to c-axis in 4H-SiC, m*/m0 ¼ 1.75,16 thus A* ¼ 210 A/cm2K2. We note that a reliable uB cannot be deduced from the ln(I0/T2) versus 1/T plot for the 1400  C annealed sample since the linear part of the forward I-V curve in the semi-log plot is too small especially at the elevated temperatures, which makes difficult to extract I0 accurately. For the other samples, the uB deduced from the two different methods agree closely. The uB shows only a small variation (1.2–1.4 eV) among the samples, while the RS decreases by more than 5 orders of magnitude from 1010 X for the 1400  C annealed substrate to less than 105 X for the 1700  C one. This implies that the compensation of the shallow B acceptor, with a level position 0.3 eV above the valence band edge (EV), decreases gradually with increasing substrate annealing temperature and the net acceptor concentration (NA-ND) as well as the hole concentration increase. Further, this trend corroborates the conclusion that [N] < [B] in the substrates since the activation of shallow N donors is not anticipated to decrease during annealing in the temperature range of 1400–1700  C but rather remain constant or possibly even increase, depending on the substrate growth temperature used.17,18 In order to quantify the NA-ND in the substrates, C-V measurements were undertaken at RT employing a probe frequency of 100 Hz (Fig. 3(a)). The response rate of holes from the B acceptors is relatively low at RT, on the order of 104–105 s1, because of its rather deep level in the bandgap (EV þ 0.3 eV), and hence, a sufficiently low probe frequency was selected (100 Hz) to account for the full response from the B acceptors. For the 1400 and 1500  C annealed substrates, the concentration of responding holes is negligible and the capacitance values stay at almost 0 pF in the studied reverse bias voltage range (0–10 V). However, for the 1600 and 1700  C annealed substrates, capacitance

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FIG. 3. (a) Capacitance-voltage (C-V) characteristics of the SBDs on the 1400, 1500, 1600, and 1700  C annealed substrates. The measurements were performed at RT after cooling down from 600 K. (b) Net acceptor concentration (NA-ND) versus depth deduced from the C-V curve of the 1700  C annealed substrate and total boron concentration ([B]) versus depth in the as-received HPSI substrate measured by SIMS.

increases and starts to respond on the applied voltage, and Fig. 3(b) displays the NA-ND profile deduced after 1700  C annealing together with the total [B] profile measured by SIMS. The NA-ND is 14  1015 cm3, with a decrease toward the substrate bulk, which is rather close to the [B] (56  1015 cm3). The difference between NA-ND and [B] is primarily attributed to compensation of the B acceptors by donors, especially intrinsic deep-level ones. Extrinsic shallow ones, like substitutional N, are not anticipated to decrease in concentration with annealing temperature. The increase in NA-ND between 1600 and 1700  C annealing is almost 2 orders of magnitude (0.5–1.0  1014 cm3 versus 1–4  1015 cm3) and agrees well with the decrease of RS shown in Fig. 2(c). C. Admittance spectroscopy

The AS measurements were undertaken employing two different cryostats covering the temperature range of 80–330 K and 290–680 K, respectively, and using a reverse bias voltage of þ5 V and probe frequencies between 100 Hz and 1 MHz. Prior to the measurements in the low temperature cryostat, the samples were kept at 330 K in darkness for 3 h with a reverse bias voltage of þ10 V to empty deep levels populated optically during sample mounting. Then the samples were cooled down to 80 K at zero bias voltage and AS data were recorded during heating up to 330 K. Figures 4(a) and 4(b) show the normalized conductance and the capacitance as a function of temperature (G/x-T and C-T, where x is the angular frequency), respectively, acquired with a probe frequency of 300 Hz. Fig. 4(a) reveals five distinct peaks labeled as X1 to X5 and each peak is associated with a step increase in the C-T curves, Fig. 4(b), showing that they all are hole traps (either acceptor-like or donor-like). The energy positions (ET  EV) of X1–X5 were extracted from Arrhenius plots of their peak temperatures (ln(TP2/x) versus 1/T, shown in Fig. 5) assuming

FIG. 4. (a) Normalized conductance and (b) capacitance of the SBDs as a function of temperature (G/x-T and C-T). The bias voltage and the probe frequency used are 5 V and 300 Hz, respectively. In the G/x-T curves, 5 peaks (labeled as X1 to X5) are unveiled. In the inset of (a), comparison is made between the experimental and ideal G/x-T curves around the X4 and X5 peaks. The ideal curves assume a single level contribution only to each peak.

temperature independent capture cross sections. The values obtained are summarized in Table II together with the peak temperature measured at 300 Hz probe frequency (TP,300 Hz). For the 1700  C annealed substrate, X1 dominates and is responsible for the hole freeze-out/recovery at 200 K in the C-T curve; accordingly and as also supported by its identical energy position relative to literature data,19,20 X1 is ascribed to the shallow B acceptor (BAcceptor). In the 1600  C annealed sample, X2, X3, and X4 are clearly resolved, where the former is most likely identical with X1 because of similar ET and responsibility for hole freeze-out/recovery. The

FIG. 5. Arrhenius plots of the peak temperatures of X1 to X5 unveiled in the G/x-T curves. Symbols and lines are the experimental data and the best fit lines, respectively. The energy positions (ET  EV) of X1-X5 levels are also shown.

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TABLE II. Parameters of the peaks detected in the normalized conductance spectra (G/x-T) of the HPSI SBDs. Energy positions (ET  EV) and their errors were deduced from the Arrhenius plots (ln(TP2/x) versus 1/T) fitted with 95% confidence level.

Peak label

Energy position, ET  EV

Peak temp. at 300 Hz, TP,300Hz (K)

Substrate anneal temp., TAnneal (  C)

Comment

X1 X2 X3 X4 X5

0.28 6 0.01 eV 0.27 6 0.05 eV 0.50 6 0.31 eV 1.00 6 0.12 eV 1.06 6 0.20 eV

204 225 314 495 553

1700 1600 1600 1600 1500

B acceptor B acceptor D-center? Multiple levels Part of X4

difference in TP,300Hz between X1 and X2 (20 K) is due to a lower NA-ND in the 1600  C annealed sample yielding carrier freeze-out/recovery at a higher temperature than in the 1700  C annealed sample. The X3 peak exhibits a small amplitude and appears at 0.5 eV above EV, which is similar to that of the so-called D-center.20,21 The accuracy of extracted level position is poor (60.3 eV), primarily because of the small peak amplitude, and an attribution to the D-center is speculative. On the other hand, if the D-center arises from a BSi-VC complex as suggested in the literature,21 it is likely to occur in our samples. The X4 peak displays a higher amplitude than X3 and occurs at EV þ 1.0 eV as a rather broad signature. The inset in Fig. 4(a) shows a comparison between experimental data around X4 and a simulated peak from an ideal single level using the model by Vincent et al.;22 X4 is substantially broader than the simulated peak suggesting contributions from multiple deep levels with closely spaced energy positions. One such contribution is X5 resolved just above the freeze-out/recovery temperature of 500 K for the sample annealed at 1500  C and displaying a peak width rather close to that expected ideally for a single level (see the inset of Fig. 4(a)). Above 550–600 K, all the G/x-T curves show a strong increase with temperature which can be attributed to the increase of the SBD leakage current (d-c component), especially in the case of low probe-frequency measurements. Indeed, the activation energies extracted from the G/x-T (Fig. 4(a)) and I-T curves (will be shown in Sec. IV) are identical for each sample with values of 1.5 eV for the 1400 and 1500  C annealed substrates and 1.2–1.3 eV for the 1600 and 1700  C annealed ones. The temperature dependent increase of leakage current may be attributed to at least two different mechanisms. One is the thermionic emission of holes from the Ni Schottky contact to the SiC substrate. The thermionic emission current (ITH) in the reverse biased condition is determined by ITH  A T2 expðuB =kTÞ  S;

about deep levels. Besides these two leakage mechanisms, in the case of high resistive substrates, the RS arising from the substrate resistance may also affect the leakage current. The difference in the activation energy implies that the primary factor for the leakage current is changed by the 1600  C annealing, as will be discussed in Sec. IV. IV. DISCUSSION

Figure 6 illustrates energy band diagrams of the HPSI 4H-SiC substrates annealed at 1400–1700  C with the recorded energy levels included. Prior to our post-growth annealing, the substrates most probably have been subjected to temperatures of 2000  C (or higher) during the preparation process23 and full activation of the B atoms detected by SIMS (5–6  1015 cm3) as shallow acceptors (EV þ 0.28 eV level) is anticipated for all the different substrates. In the 1400  C annealed substrate, the NA-ND is essentially zero over the whole temperature range scanned (80–680 K) and probe frequencies used (102106 Hz), and the BAcceptor is completely compensated. Hence, at least one deep donor level must exist (denoted as XMID in Fig. 6) compensating the BAcceptor and [BAcceptor] < [XMID]. This does not exclude the existence of other deep levels in the 1400  C annealed substrate, but EF remains pinned close to mid-gap during the AS measurements preventing any detection. The strong rise in conductance and leakage current above 620 K may be attributed to the decrease of RS. Figure 7 compares the measured leakage current and the calculated ITH by Eq. (1) with uB ¼ 1.21.4 eV as a function of temperature. Above 450 K, the ITH is much larger than the leakage current of the 1400  C annealed sample, and the difference is more than 3 orders of magnitude at 680 K. Thus, the measured leakage current must have been limited by the RS. Indeed, the current rectification ratio at bias voltages of 63 V decreases significantly with increasing sample temperature; it is only a factor of 3 (0.5 order of magnitude) at 680 K, while it is 4 orders of magnitude at RT. The Ohmiclike I-V characteristics indicates that the current is primary limited by RS in the 1400  C annealed sample. Charge carrier generation from the XMID level positioned in the middle of the bandgap may lower the substrate RS at the elevated temperature, resulting in an activation energy of 1.5 eV.

(1)

where k is Boltzmann’s constant and S is the contact area (1 mm2). The other leakage mechanism is the charge carrier generation in the depletion region via deep levels. However, unlike ITH, it is not straightforward to quantify the charge carrier generation current because of lack of information

FIG. 6. Energy band diagrams of the HPSI 4H-SiC annealed at 1400–1700  C. The energy levels are illustrated based on the experimental observations.

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FIG. 7. Temperature dependence of leakage current of the SBDs at a reverse bias voltage of 5 V. Thermionic emission currents (ITH) calculated by Eq. (1) with Schottky barrier height (uB) of 1.2–1.4 eV are also shown.

In the 1500  C annealed substrate, EF is no longer pinned to XMID and X5 can respond to low probe frequencies at high sample temperatures (cf. Fig. 4). The contribution of X5 to the semi-insulating property of the substrate depends on if it is donor- or acceptor-like, which is not clarified yet. In the former case, it will promote insulation together with XMID and [BAcceptor] < [X5] þ [XMID], while in the latter case, it will promote conduction together with BAcceptor and [BAcceptor] < [XMID] < [BAcceptor] þ [X5]. Similarly to the 1400  C annealed substrate, the leakage current is well below the ITH at above 450 K, and the current rectification ratio at 63 V is only one order of magnitude at 680 K; thus, the activation energy of 1.5 eV can also be attributed to the decrease of RS due to the charge carrier generation via XMID level. After the 1600  C annealing, holes start to respond to the C-V probe voltage at temperatures above 200 K (Fig. 4), since the BAcceptor is no longer fully compensated. In addition, also the X3 and X4 levels become filled with electrons as the temperature increases and EF rises towards mid-gap. As for X5, the contributions of X3 and X4 to the semi-insulation depend on their type of charge state transitions, which are currently not known. As EF is no longer pinned to mid-gap and the BAcceptor provides free holes to the valence band, it implies that the concentration of compensating deep donors, especially XMID, has decreased substantially by the 1600  C annealing. The leakage current at above 550 K is only slightly smaller than the ITH, and the activation energy of 1.2–1.3 eV is almost identical to the uB (Fig. 2(b)). Therefore, the primary factor of the leakage current might be the thermionic emission of holes rather than the decrease of RS. Indeed, the RS has been decreased significantly by 1600  C annealing compared with 1400  C annealing (Fig. 2(c)), and the current rectification ratio at 63 V remains as high as 3 orders of magnitude even at 650 K, thus probably RS is no longer the primary factor of current limitation in the sample. After 1700  C annealing, only the BAcceptor level is detected (Fig. 4) and it occurs with a large amplitude (or step), suggesting that the concentration of deep donors has been further reduced. In fact, the data indicate that the

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BAcceptor is now essentially uncompensated, and EF remains relatively close to EV even at 600 K (EV þ 0.5 eV); i.e., no EF crossing of the X4/X5 levels occurs and they are not possible to be detected by the G/x-T and C-T scans in Fig. 4 even if still present. It should be possible to detect X3 but no significant peak is found and also in the 1600  C annealed sample its amplitude is very small. The leakage current of the 1700  C annealed sample agrees reasonably well with the calculated ITH thus the activation energy of 1.2–1.3 eV might be attributed to the uB. It is apparent that the deep XMID donor plays a decisive role for the semi-insulating properties of the studied HPSI substrates. In the as-received substrate, [XMID] > [BAcceptor] such that free carrier concentration is extremely low but with increasing of annealing temperature [XMID] decreases leading to degraded semi-insulation. After 1700  C, [XMID]

[BAcceptor] and the substrates become eventually rather conductive with NA-ND in the 1015 cm3 range. The identity of XMID is not known but a likely candidate is the carbon vacancy (VC). In a combined EPR and DLTS study, which was recently shown by Son et al.,24 VC in 4H-SiC is a negative-U defect with reverse order of its single and double acceptor levels in the upper part of the bandgap (the socalled Z1/2 levels) and a single donor level at EC–1.5 eV (the so-called EH7 level), where EC is the conduction band edge. Theoretically, also a double donor level of VC has been predicted,25 located 0.2 eV below that of the single one, but experimental confirmation is still lacking. VC is the most prominent and abundant electrically active defect observed in as-grown n-type 4H-SiC samples, primarily via detection of its Z1/2 and EH7 levels by DLTS,26,27 but very recently, Alfieri and Kimoto28 have also confirmed its existence in p-type samples through observation of the EH7 level as a minority carrier trap. Further, Zippelius et al.29 and Ayedh et al.30,31 have studied the evolution of [VC] (via Z1/2 and EH7) in as-grown samples during high temperature post-growth processing up to 2000  C and depending on the initial concentration, [VC] can both increase and decrease. In Ref. 30, the thermal equilibrium concentration of VC ([VC]Equilibrium) was determined in the temperature range 1600–1950  C and is given by the following Arrhenius relation: ½VC Equilibrium  3  1025 exp ð4:95ðeVÞ=kTÞ cm3 ; (2) where the pre-exponential factor accounts for the concentration of available C-sites and the increase in crystal entropy during VC formation, 4.95 eV represents the formation enthalpy. Equation (2) is displayed in Fig. 8, and for temperatures above 2100  C, [VC]Equilibrium exceeds 1015 cm3 and then reaches 1016 cm3 at 2350  C. The concentration of VC, and especially that of its single donor level (EH7 level), cannot be detected in HPSI substrates by DLTS because of the extremely low free carrier concentration. However, VC is commonly detected in HPSI samples using EPR measurements, and [VC] is reported to decrease with increasing annealing temperature from 1400 to 1600  C.13 Hence, this evidences that the initial content of VC in the as-received samples is higher than the equilibrium [VC] at the annealing temperatures employed, and as shown

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identities of HK2, HK3, and HK4 are not known, but it is tempting to speculate that HK4 may arise from the theoretically predicted double donor level of VC and hence contributing efficiently to the compensation of BAcceptor in the investigated HPSI substrates. This speculation is also corroborated by the fact that HK4 is radically reduced in intensity by injection of carbon interstitials during thermal oxidation of the epi-layer surface, analogous to that for the VC-levels in the upper part of bandgap.36 V. SUMMARY

FIG. 8. Thermal equilibrium carbon vacancy concentration ([VC]Equilibrium) in 4H-SiC as a function of temperature, as calculated by Eq. (2).

in Fig. 8, [VC] above 1016 cm3 can be expected in substrates heated up to 2400  C during the preparation procedure and then cooled down with a fast rate.23 Accordingly, full compensation of the BAcceptor in our as-received samples (5–6  1015 cm3) by VC appears to be plausible, especially if also a deep double donor level of VC exists in addition to the single one. Then, with increasing annealing temperature and a fixed duration (30 min) equilibrium conditions are gradually reached and at 1700  C, [VC]Equilibrium is less than 1013 cm3, i.e., more than 2 orders of magnitude below [BAcceptor]. In addition to VC, also the divacancy (VCVSi) is shown to be a common and stable defect in HPSI 4H-SiC substrates.13 From EPR studies and supercell calculations, VCVSi is considered to form a single acceptor level with an energy position slightly below that of the EH7 level.13,32 The HPSI substrates studied in Ref. 13 exhibited weak n-type conductivity, and in this case, a deep acceptor-like level arising from VCVSi is indeed beneficial for semi-insulation. However, the samples studied in the present work exhibit weak p-type conductivity and deep acceptor-like levels will not promote semi-insulation. Thus, VCVSi is ruled out as a critical defect in the present HPSI samples. As mentioned previously, DLTS is not applicable for analysis of SI-substrates but a correlation of our AS results with DLTS data reported in the literature for more conductive p-type 4H-SiC samples might be helpful. Unfortunately and unlike that for n-type samples, only a very limited number of DLTS studies on p-type 4H-SiC samples exist; however, three deep levels of possible relevance for semiinsulation have been found in high-purity epitaxial layers after growth, electron irradiation, or ion implantation, and they are labelled HK2 (position at; EV þ 0.84 eV), HK3 (EV þ 1.27 eV), and HK4 (EV þ 1.44 eV).33–35 HK2 and HK3 may belong to the same group of multiple levels as X4 and X5 while HK4 may contribute to XMID. The rates of hole emission from HK2, HK3, and HK4 do not depend on the electric field,33 which indicate that they are of donor-like although no definite conclusion can be made. Further, they appear to be quite stable and persist up to annealing temperatures of almost 1600  C of the epi-layers.33,35 The defect

Effects of high-temperature annealing on HPSI 4H-SiC substrates have been studied by SIMS, I-V, C-V, and AS measurements. The SIMS data revealed that B is the prevailing residual impurity in the substrates with a concentration in the mid 1015 cm3 range, while other dopant elements (N and Al) and transition metals (Ti, V, Cr) are below the detection limit. For the electrical measurements, SBDs were fabricated on substrates annealed at 1400, 1500, 1600, and 1700  C, and regardless of the annealing temperature used, the SBDs exhibit metal/p-type semiconductor behavior with current rectification up to 8 orders of magnitude at bias voltages of 63 V at RT and a leakage current that can be modified in a reversible manner via optical charge carrier excitation and thermal processes. The semi-insulation is attributed to deep donor-like levels, XMID; as the annealing temperature increases, RS of the SBDs decreases and the NA-ND in the substrate increases because of gradually decreasing compensation of BAcceptor by the critical XMID level, as unveiled by G/x-T and C-T spectra. After 1700  C, the NA-ND is close to the chemical [B] and [XMID] has decreased to values well below 1015 cm3 with ceasing semiinsulating properties of the substrates. The identity of XMID is not known, but arguments based on energy level positions, donor-like level, and quantitative estimates of the concentration in as-received substrates and after the annealing treatments provide evidence for an assignment to VC. ACKNOWLEDGMENTS

This study was financially supported in part by the Norwegian Research Council through the ICE 2016 Project (BIA Program). 1

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