Highly reproducible ideal SiC Schottky rectifiers: effects of ... - CiteSeerX

Appl. Phys. A (2002)

Applied Physics A

DOI: 10.1007/s00339-002-1981-8

Materials Science & Processing

f. roccaforte1,✉ f. la via1 v. raineri1 p. musumeci2 l. calcagno2 g.g. condorelli3

Highly reproducible ideal SiC Schottky rectifiers: effects of surface preparation and thermal annealing on the Ni/6H-SiC barrier height 1 CNR–IMM,

Sezione di Catania, Stradale Primosole 50, 95121 Catania, Italy and Dipartimento di Fisica e Astronomia, via Santa Sofia 64, 95125 Catania, Italy 3 Dipartimento di Chimica, viale A. Doria 6, 95125 Catania, Italy 2 INFM

Received: 3 July 2002/Accepted: 2 September 2002 Published online: 17 December 2002 • © Springer-Verlag 2002 ABSTRACT In this work, the effects of surface preparation and thermal annealing on the Ni/6H-SiC Schottky barrier height were studied by monitoring the forward I–V characteristics of Schottky diodes. The ideality factor n and the barrier height ΦB were found to be strongly dependent on the impurity species present at the metal/SiC interface. The physical mechanism which rules the Schottky barrier formation is discussed by considering the nature of the impurities left from the different surface preparation methods prior to metal deposition. In contrast, nickel silicide/SiC rectifiers (Ni2 Si/6H-SiC), formed by thermal reaction of Ni/6H-SiC above 600 ◦ C, have an almost ideal I–V curve, independent of the surface preparation. Further improvement in the barrier height distribution can be obtained by increasing the annealing temperature to 950 ◦ C. This behaviour is discussed in terms of the silicide phases and the consumption of a SiC layer during the thermal reaction. PACS 73.30.+y;

1

81.65.Cf; 81.05.Je

Introduction

The scientific interest in large-bandgap semiconductors has sensibly increased in the last years because of their potential applications in optoelectronics and high-power electronic devices. Among them, silicon carbide (SiC) exhibits a set of unique physical parameters, which makes it a promising candidate for the fabrication of high-power and high-temperature electronic devices [1–3]. For power-device applications, the large bandgap of SiC (3.0 eV for 6H-SiC and 3.2 eV for 4H-SiC) results in a high critical field, which is about eight-times higher than that in silicon. The high bandgap, along with the high thermal and chemical stabilities of the material, is also suitable for high-temperature and harsh-environment applications. Moreover, the high thermal conductivity (4.9 W/cm K) and saturation electron drift velocity (2 × 107 cm/s) are fundamental in terms of power dissipation and high-frequency operation of the devices, respectively [4, 5]. The greatest progress concerning SiC power devices has mainly taken place in the area of Schottky rectifiers, because ✉ Fax: +39-095/713-9154, E-mail: [email protected]

of their capability of reaching very high switching frequencies under high-voltage operation when compared to silicon devices [6]. Some concerns deal with the device reliability and, in this context, several studies on high-voltage 4H and 6H-SiC Schottky diodes have been reported, in which nickel and titanium were the mostly used metals for fabricating the rectifying barrier [7–12]. One of the common outstanding problems related to SiC device fabrication is the control of the surface preparation for metal deposition. Indeed, the electrical performance of a Schottky diode is strongly dependent on the quality of the metal–semiconductor interface. The properties of the interface, in turn, are essentially determined by the surface preparation prior to metallisation. For example, the surface roughness and/or the presence of contaminants or residual thin interfacial oxide layers can give rise to non-ideal I –V characteristics or high values of device on-resistance. As a matter of fact, in many works on 4H-SiC, the surface preparation for Schottky rectifiers has been proved to be a non-trivial issue and only a poor reliability in the device performance could be achieved [13–16]. Although in some of these works sacrificial oxidation has been proposed as one of the possible solutions to achieve a clean surface before deposition [14, 16], the role of the impurities present at the interface during the barrier formation is often not discussed in detail. In this paper, several surface preparation methods were used before the metal deposition and the Schottky barrier height was determined by means of current–voltage ( I –V ) measurements, trying to correlate the interfacial properties and the presence of impurity species with the possible mechanisms of the barrier formation. It will also be pointed out that, in spite of the strong dependence of the electrical performance on the surface pre-metallisation treatments, the thermal reaction leading to nickel silicide (Ni2 Si) formation may be the key for reproducibly achieving nearly ideal diodes on silicon carbide. 2

Experimental

2.1

Sample preparation

The Schottky rectifiers were fabricated on Si faceterminated epitaxial 6H-SiC wafers, purchased from CREE Research, Inc. The thickness of the n -type-doped active epi-

Applied Physics A – Materials Science & Processing Surface preparation

Process sequence

(a) HF

HF : H2 O = 1 : 5 4.5 min H2 SO4 : H2 O2 = 3 : 1 Annealing in O2 at 1050 ◦ C 30 min RTA at 950 ◦ C in N2 60 s Dip in HF 1% NH4 F : HF = 7 : 1 8 min H2 SO4 : H2 O2 = 3 : 1 Annealing in O2 at 1050 ◦ C 30 min RTA at 950 ◦ C in N2 60 s Dip in HF 1% Annealing in O2 at 1050 ◦ C 30 min H2 SO4 : H2 O2 = 3 : 1 RTA at 950 ◦ C in N2 60 s RIE in CF4 Dip in HF 1% NH4 F : HF = 7 : 1 8 min + RIE CF4 H2 SO4 : H2 O2 = 3 : 1 Annealing in O2 at 1050 ◦ C 30 min RTA at 950 ◦ C in N2 60 s Dip in HF 1%

(b) NH4 F : HF

(c) RIE CF4

(d) wet and dry

TABLE 1

Summary of the surface pre-metallisation treatments

taxial layer was 4 µm, with a carrier concentration of approximately 3 × 1015 cm−3 . The carrier concentration in the heavily doped substrate was approximately 7 × 1018 cm−3 . After growing a thermal oxide layer by dry oxidation at 1150 ◦ C, oxide approximately 1-µm thick was deposited by atmospheric pressure chemical vapour deposition. In order to define the active area of the device, circular windows, whose diameter ranged between 100 and 240 µm, were opened on the oxide by standard photolithography combined with wet or dry etching. Four different etching processes were used in order to monitor the electrical performance of the devices as a function of the surface premetallisation treatment and to find the optimal conditions for device fabrication: (a) wet etch in HF : H2 O = 1 : 5 solution; (b) wet etch in NH4 F : HF = 7 : 1; (c) reactive ion etching (RIE) by a CF4 gas source; and (d) combined wet and dry etch (NH4 F : HF = 7 : 1 + RIE by CF4 ). Details about the complete sample surface preparation sequence are reported in Table 1. The sequences included both the etching processes to remove the oxide and the thermal treatments for back-side ohmic contact formation of the diodes. The formation of a large-area back-side ohmic contact was achieved by deposition of a 100-nm-thick Ni film, followed by rapid thermal annealing (RTA) in N2 at 950 ◦ C for 60 s. As a Schottky contact, a 200-nm-thick Ni film was deposited on the wafer front side and a second photolithographic process was used to define a metal field plate over the oxide. 2.2

X-ray photoelectron spectroscopy (XPS) was used to monitor the presence of processing-induced surface contamination on the samples. Atomic force microscopy (AFM) allowed us to determined the surface roughness. Measurements were carried out by a Digital Instruments Dimension 3100 in tapping mode. The saturation root-mean-square (RMS) value versus the scanned area was considered as the roughness parameter. Transmission electron microscopy (TEM) was performed by using a JEM 2010 JEOL microscope, operating at an acceleration voltage of 200 kV, in order to monitor the metal/SiC interface. The structural characterisation of the Schottky metal after thermal annealing of the Ni/6H-SiC unpatterned samples was done by means of X-ray diffraction (XRD) analysis and by Raman spectroscopy, in order to identify the phase formation and to monitor the formation of carbon precipitates, respectively. 3 3.1

Effects of surface preparation on the Ni/6H/SiC Schottky barrier height Electrical characterisation

The method investigated first was a surface preparation based on a sacrificial oxide etch by means of a dip in diluted HF. The forward I –V characteristic of the Ni/6H-SiC Schottky diodes was investigated in the range 0 – 2 V. The measured I –V curves are shown in Fig. 1 for the different surface pre-metallisation treatments. The ideality factor n and the Schottky barrier height ΦB were determined by fitting the forward I –V curves according to the relation I = A∗∗ ST2 exp(−qΦB /kT )[exp(qV /nkT ) − 1], where A∗∗ is the effective Richardson constant, S is the diode area, k is the Boltzmann constant, q is the electron charge and T is the absolute temperature [17]. Nearly ideal Schottky diodes with an ideality factor n = 1.07 and a barrier height ΦB = 1.25 eV were achieved after etching of the surface in HF : H2 O = 1 : 5 solution. The devices had a value of specific series resistance Ron =

Structural and electrical characterisation

The electrical forward current–voltage ( I –V) characterisation of the diodes was performed on a Wenworth probe station equipped with a Keithley 236. The top of the diodes was contacted with the probe arm, whilst the back-side ohmic contact was directly standing on the vacuum chuck. The I –V measurements were carried out both before (as deposited) and after a rapid thermal annealing of the devices in N2 in temperature range 600 – 950 ◦ C.

Forward I–V characteristics of Ni/6H-SiC Schottky diodes fabricated with different surface pre-metallisation treatments (see Table 1 for details)

FIGURE 1

ROCCAFORTE et al.

Effects of surface preparation and thermal annealing on the Ni/6H-SiC Schottky barrier

36 mΩ cm2. The value of the barrier height was in agreement with the barrier of Ni on Si face-terminated 6H-SiC reported by Waldrop et al. [18, 19]. The theoretical value of the Schottky barrier height predicted by the Schottky–Mott model [20] is given by the difference between the metal work function and the semiconductor electron affinity (ΦB = ΦNi − X SiC ). Using the work function of nickel ΦNi = 5.15 eV [21] and a value of the 6H-SiC electron affinity in the range X SiC = 3.3 – 3.7 eV [22, 23], a barrier height ΦB in the range 1.45– 1.85 eV is expected. From the comparison between the theoretical and the experimental values of ΦB it was possible to estimate an index of interface in the range S = 0.67 – 0.86, which gives an indication of the good quality of our metal/SiC interface. Another common etch process, more convenient in terms of etch-rate control, is the use of buffered HF (i.e. a NH4 F : HF solution). However, as can be seen from Fig. 1, a NH4 F : HF etch only led to a non-ideal behaviour, i.e. n = 1.77. The barrier height ΦB value was lowered to about 1 eV. Moreover, some of the diodes showed an anomalous forward I –V characteristic, i.e. with the low forward-voltage region exhibiting a higher current than expected from the thermionic-emission model. This extreme behaviour indicates parallel conduction through a lower barrier region [24, 25]. For several applications, such as in MESFETs (metal semiconductor field-effect transistors) and SITs (staticinduction transistors) fabrication, reactive ion etching (RIE) is suitable for preparing the surface before the Schottky gate deposition. However, when using plasma etching, a non-optimal choice of rf power and gas pressure can often be detrimental for the device performance. Therefore, as an alternative to the wet etch, RIE in CF4 was used to prepare the sample surface before depositing the Ni Schottky metal. A rf power of 300 W and a gas pressure of 700 mtorr were typical for removing a thick densified oxide layer. As can be observed in Fig. 1, also in this case, the forward I –V characteristics of the diodes showed a non-ideal behaviour with a very strong curvature, which indicates a wide distribution of barrier-height values. The higher value of the forward current measured in the low-voltage region (< 0.5 V) results in an average barrier height of 0.87 eV. Moreover, the calculated specific series resistance Ron of this device was 205 mΩ cm2, about one order of magnitude higher than the typical Ron values found when the Schottky interface was prepared with a wet etch. Another approach was used in an attempt to improve the forward I –V performance of the rectifiers. A two-step preparation was developed, by combining a 8-min wet etch in NH4 F : HF with a soft reactive ion etch (2 min). The values of the ideality factor (n = 1.38) and of the Schottky barrier height (ΦB = 1.10 eV) demonstrate an improvement in the electric behaviour of the devices, even though the characteristics are still far from those obtained after HF surface preparation. 3.2

ence of contaminant species, both transmission electron microscopy (TEM) of the Ni/SiC interface and chemical and morphological analyses of the surface (carried out using XPS and AFM) were performed. In spite of the differences shown in the I –V characteristics, both in the case of HF and NH4 F : HF etching, AFM analysis showed very flat etched surfaces with the same value of roughness (RMS = 0.3 nm). Also, XPS analysis was not able to show significant differences between these samples. However, the discrepancy from the ideal behaviour (n = 1.77) and the observed lowering of the average Schottky barrier height (ΦB = 1 eV), monitored after the NH4 F : HF etch, could be explained by the presence of patchy contamination, i.e. a thin residual oxide layer which could not be completely removed by this surface treatment. The latter was corroborated by the cross-sectional TEM image of the metal–semiconductor interface prepared with this treatment, reported in Fig. 2, in which a discontinuous thin oxide layer could be detected. The presence of this interfacial layer explains the lowering of the barrier. In fact, according to Tung [26], if a metal and semiconductor are separated by an interfacial oxide layer of thickness δ and dielectric constant εi , a voltage drop ∆ = Q M δ/εi occurs in the dielectric layer, where Q M is the charge which appears on the metal to compensate that on the semiconductor [26]. Hence, because the voltage drop across the barrier partly occurs in the dielectric interfacial layer, the effective Schottky barrier height is reduced. In contrast, when the sample surface was prepared by RIE, XPS analysis showed an intense peak, located at a binding energy of 687.2 eV, which can be attributed to the presence of fluorine [14]. The wide signal which appears in the range 283.2– 290 eV cannot be ascribed without ambiguity to a single species, but it may be related to SiC covered by a carbonaceous surface layer. The amount of fluorine present on the surface, estimated from this analysis, was 25%. All these observations are consistent with the formation of fluorocarbon contamination on the sample surface. Moreover, the sample surface has a high value of surface roughness, with a RMS > 10 nm, as determined from the AFM analysis. Since almost no oxygen (i.e. residual oxide) could be monitored by XPS on the plasma-etched surface, fluorocarbon contamination, as well as the high interface roughness caused by RIE, must be responsible for the non-ideal behaviour of the diodes and for the high device on-resistance. In particular, the processing may induce interfacial states (originating from dry-etching-induced damage at the SiC surface), which determine the strong lowering of the barrier (0.87 eV). However, since a strong fluorine amount is detected on the sample surface by XPS, the barrier lowering can also be ex-

Ni/SiC interface analysis and discussion

In order to explain the experimentally observed strong dependence of the Schottky barrier height on the surface preparation method, and to correlate this with the pres-

FIGURE 2 Cross-sectional TEM image of the Ni/6H-SiC interface of a sample whose surface was prepared with a NH4 F : HF etch before deposition of nickel. The arrow indicates the residual interfacial layer

Applied Physics A – Materials Science & Processing

plained with the argument proposed by Bozack [27], based on the chemistry of the impurities. Accordingly, high-electronaffinity impurity species at the interface (e.g. fluorine, in our case) may enhance a charge transfer from the semiconductor to the interface, thus increasing the semiconductor work function and reducing the average value of ΦB [27]. In this way, the combined effect of damage and contaminants explains the strong reduction of the barrier height in the RIE-etched samples. Finally, the surface prepared with the combined procedure (wet and dry etches) does not show the presence of fluorocarbon contamination, having a similar chemical composition and surface roughness as the NH4 F : HF wet-etched surfaces. Therefore, a soft CF4 plasma etch step following the wet etch is more suitable for removing the oxide than a simple NH4 F : HF etch alone. 4 4.1

Effects of thermal annealing on the Ni/6H/SiC Schottky barrier height Structural characterisation of nickel silicide

A significant modification of the metal/SiC interface, and then of the Schottky barrier height, can be induced by post-deposition thermal treatments, which in turn can also lead to phase transformations. This possibility was investigated by annealing the samples in N2 for 60 s in the temperature range 600– 950 ◦ C. In order to monitor the phase formation subsequent to thermal treatment, a set of unpatterned samples, prepared using the same surface and annealing treatments as those used for the diodes (see Table 1), were analysed by means of X-ray diffraction. The XRD spectra of the samples are depicted in Fig. 3. Thermal annealing at 600 ◦ C already results in the formation of polycrystalline nickel silicide (Ni2 Si), as can be deduced from the main peaks observed in the spectra, which are associated with diffraction from the planes (240), (203) and (133) of the phase Ni2Si. The presence of the Ni31 Si12 phase was also detected at 600 ◦ C, but after high-temperature annealing to 900 ◦ C, only the Ni2 Si phase was present. No difference was observed when operating in the glancing-incidence or in the Bragg–Brentano configurations, thus indicating that texturing of the polycrystalline silicide film on SiC did not occur, i.e. the silicide grains were randomly oriented on the substrate. Since a polycrystalline silicide is formed, i.e. no epitaxy with the SiC substrate occurs, there is no control over the interfacial structure, which varies from one region to another. The latter suggests that only average silicide/SiC electronic properties can be measured. Therefore, it is extremely difficult to correlate the interfacial structure (silicide phase, chemical bonds, orientation) with the experimentally determined value of the Schottky barrier height. In terms of electrical and thermal stability of the silicide phase, the redistribution of carbon inside the reacted layer represents one of the controversial arguments in the studies on the Ni/SiC solid-state reaction [28, 29]. In fact, according to the ternary phase diagram of the system Ni-Si-C [30], the only stable silicide phase is Ni2 Si and no ternary phase can be formed. Hence, the carbon present in the SiC layer consumed during reaction should precipitate. In our previ-

ous work [31, 32], the carbon was shown to be almost uniformly distributed inside the Ni2 Si layer, as monitored by means of energy-dispersive X-ray analysis (EDX). However, from these investigations, no information on the position and structure of carbon could be obtained. Further information about the morphology of carbon present in the Ni2 Si/SiC samples could be obtained by Raman spectroscopy. In fact, since graphitic carbon and other sp2 -bonded amorphous carbons exhibit a strong Raman scattering, this technique may provide interesting information both about the structure and the ordering degree of carbon [33]. The Raman spectrum of a large graphitic single-crystalline domain shows a sharp band at 1580 cm−1 (called the G peak), while in polycrystalline graphite, a second peak appears at about 1355 cm−1 (called the disorder or D peak). From the analysis of the intensities of both bands, information on the degree of crystallinity and cluster size can be obtained [33]. Figure 4 shows the Raman spectra of the silicide/SiC samples formed by annealing at 600 and 950 ◦ C in the wavenumber region 1000– 2000 cm−1 . The occurrence of the two peaks I D and IG , located at 1350 cm−1 and 1580 cm−1 , respectively, indicates the formation of graphitic precipitates.

FIGURE 3

XRD spectra of Ni/SiC samples after annealing at 600 ◦ C and

FIGURE 4

Raman spectra of the Ni2 Si/SiC samples formed at 600 ◦ C and

950 ◦ C

950 ◦ C

ROCCAFORTE et al.


In the literature, it has already been shown that the relative intensity of the disorder-induced line ( D line) and the Ramanactive line (G line) varies inversely with the size of the precipitates d , according to the relation d(nm) = 4.4(I D /IG )−1 [34]. In our case, from the intensity ratio between the I D and IG peaks, an average cluster size of 5 nm was estimated. The cluster size did not change with increasing annealing temperature from 600 to 950 ◦ C. However, it must be remembered that because of the high optical absorption of the metal, this investigation is not able to give information on the presence and the size of carbon clusters at the silicide/SiC interface depth region. It can be concluded that nickel silicide, even in the presence of graphitic carbon precipitates, remains structurally stable in the temperature range 600 – 950 ◦ C. 4.2

Electrical characterisation and discussion

The forward I –V characteristics of the Schottky diodes after rapid thermal annealing in N2 at 600 ◦ C are depicted in Fig. 5. As pointed out in the previous section, the thermal process leads to nickel silicide formation. Independent of the surface preparation, the ideality factor n decreases, tending to the ideal behaviour predicted by the thermionicemission theory [17]. However, the barrier height of the nickel silicide phase Ni2 Si has the value of approximately 1.3– 1.4 eV. In particular, Fig. 5 reports the curves relative to the dryetched diodes with n = 1.08 and ΦB = 1.37 eV, the NH4 F : HF with n = 1.16, ΦB = 1.31 eV and the combined wet and dry etch with n = 1.06 and ΦB = 1.39 eV. The increase of 0.1 – 0.15 eV of the Schottky barrier of the silicide with respect to the un-reacted nickel is lower than that found after annealing at 800 ◦ C by Han et al. [35]. The latter may be attributed to the different surface preparation methods used.

Forward I–V characteristics of the Ni2 Si/6H-SiC Schottky rectifiers formed after annealing at 600 ◦ C FIGURE 5

Obviously, the barrier heights measured from the I –V characteristics are very sensitive to eventual surface inhomogeneities [17]. Therefore, the above-reported I –V characteristics were chosen to be representative of the trend shown both from the as-deposited and the annealed diodes, although a few devices showed considerable variations from the average I –V behaviour. The barrier height of nickel silicide is somewhat higher than that found for pure nickel (1.25 eV). The latter indicates Ni2 Si is a good alternative to Ni as a barrier metal for fabricating low-leakage SiC Schottky rectifiers. A further optimisation in the forward I –V characteristics of the devices after thermal reaction could be observed after annealing at higher temperatures. This effect can be well visualised by the statistical distribution of the values of n and ΦB extracted from the I –V characteristics of a set of 40 devices. Figure 6 shows this distribution in the case of the devices

FIGURE 6 Distributions of the ideality factor n (left) and of the Schottky barrier height ΦB (right) as a function of the annealing temperature up to 800 ◦ C for the sample prepared with the combined wet and dry etch

Applied Physics A – Materials Science & Processing

formed with the combined wet and dry etch. The as-deposited diodes have an average barrier height of 1.09 eV and an ideality factor of 1.43. As can be seen, thermal annealing at increasing temperature results in a decrease of the ideality factor, accompanied by an increase in the barrier height. It is interesting to notice that the distributions of both barrier height and ideality factor become narrower at higher annealing temperatures up to 800 ◦ C. At this temperatures, the average values of n and ΦB were 1.10 and 1.35 eV, respectively. The decrease in the distribution width is an indication of the improvement in the Schottky barrier homogeneity. However, the devices with strong non-ideal behaviour (tails of the distributions), did not always improve even after these thermal treatments. The same effect was revealed independently of the surface preparation method, although slight differences in the optimisation temperature were observed. For example, even in the case of plasma-etched samples, which among all the surface preparation methods exhibited the worst I –V characteristics after Schottky metal deposition, thermal annealing up to 950 ◦ C led to an ideality factor n < 1.1 and an average barrier height of ΦB = 1.42 eV. The improvement in the barrier homogeneity can be explained by the formation of nickel silicide. As shown from the XRD analysis, nickel already reacts with silicon carbide at 600 ◦ C by forming Ni2 Si. At this temperature and for a short annealing time, however, this phase still coexists with the Ni31 Si12 , which is the first phase formed in the reaction because of its more negative enthalpy [36]. As a consequence of the presence of both Ni31 Si12 and Ni2 Si at 600 ◦ C, a wide distribution in the Schottky barrier heights is observed. By increasing the temperature, all the silicide transforms into the most stable Ni2 Si phase and this leads to a more uniform barrier, as can be observed from the narrowing of the distribution of ΦB . Moreover, when the silicide forms, a silicon carbide layer is consumed by the solid-state reaction, thus giving rise to a new interface at a larger depth inside the material. The consumption of the SiC layer leads to the removal of surface damage while residual oxide patches or plasma-etch-induced fluorocarbon contaminations are embedded in the silicide. Then, almost ideal I –V characteristics can be observed after annealing at 600 ◦ C, the onset temperature for silicide formation. However, a further increase in the annealing temperature may be required to optimise the uniformity of the Schottky barrier and ideality factor, depending on the chemical composition and roughness of the initial Ni/SiC interface. This occurred in the case of the sample prepared by RIE in CF4 , where a higher temperature (950 ◦ C) was necessary to optimise the Schottky barrier. 5

Conclusions

In this paper, the dependence of the forward I –V characteristics of Ni/6H-SiC Schottky rectifiers on some surface-preparation methods has been presented. The results have allowed a correlation to be made between the electrical characteristics and the physical properties of the interface. The as-deposited devices showed a nearly ideal behaviour only when a wet etch of the oxide in HF : H2 O was carried out. The measured Schottky barrier height of Ni was 1.25 eV.

Other surface pre-metallisation treatments led only to nonideal behaviour and to a lowering of the barrier height. The latter was explained by the presence of a residual thin interfacial oxide layer or plasma-induced fluorocarbon contamination. The contaminants left by the plasma etch and the high surface roughness also determined the strong increase in the device on-resistance. A significant improvement in the forward I –V characteristic could be achieved by annealing the devices at 600 ◦ C in N2 . With this treatment, which lead to the formation of Ni2 Si, nearly ideal behaviour was achieved, with a barrier height approaching the value of 1.4 eV. Higher annealing temperatures led to a further improvement in the barrier homogeneity, demonstrated by a narrower distribution of the measured values of n and ΦB . On the basis of these results, the formation of nickel silicide (Ni2 Si) under appropriate annealing conditions may represent the key to overcoming the strong dependence of device electric behaviour on the surface preparation and to achieving nearly ideal diodes on SiC in a reproducible manner. ACKNOWLEDGEMENTS This work was partially supported by Agenzia Spaziale Italiana (Project ASI Space Technology and Telecommunication No. 396). The authors are grateful to C. Bongiorno for his help in the TEM analysis, to A. La Mantia for assistance during plasma etching of the samples and to S. Ferrero for carrying out Raman measurements.

REFERENCES 1 Y.S. Park: SiC Materials and Devices, Semiconductors and Semimetals, Vol. 52, ed. by R.K. Willardson, E.R. Weber (Academic Press, San Diego, CA 1998) 2 C.E. Weitzel, J.W. Palmour, C.H. Carter, K. Moore, K.N. Nordquist, S. llen, C. Thero, M. Bhatnagar: IEEE Trans. Elect. Dev. 43, 1732 (1996) 3 J.A. Cooper, M.R. Melloch, J.M. Woodall, J. Spitz, K.J. Schoen, J.P. Henning: Mat. Sci. Forum 264–268, 895 (1998) 4 W. Wesch: Nucl. Instr. Meth. B 116, 305 (1996) 5 H. Morkoç, S. Sitte, G.B. Gao, M.E. Lin, B. Sverdlov, M. Burns: J. Appl. Phys. 76, 1363 (1994) 6 K. Rottner, M. Frischolz, T. Myrtveit, D. Mou, K. Nordgren, A. Henry, C. Hallin, U. Gustafsson, A. Schöner: Mat. Sci. Eng. B 61–62, 330 (1999) 7 K.J. Schoen, J.M. Woodall, J.A. Cooper, M.R. Melloch: IEEE Trans. Elect. Dev. 45, 1595 (1998) 8 Q. Wahab, T. Kimoto, A. Ellison, C. Hallin, M. Tuominen, R. Yakimova, A. Henry, J.P. Bergman, E. Janzen: Appl. Phys. Lett. 72, 445 (1998) 9 D. Alok, B.J. Baliga: IEEE Trans. Elect. Dev. 44, 1013 (1997) 10 A. Itho, T. Kimoto, H. Matsunami: IEEE Elect. Dev. Lett. 17, 139 (1996) 11 G. Brezeanu, M. Badila, J. Millan, P. Godignon, M.L. Locatelli, J.P. Chante, A.A. Lebedev, V. Banu: Mat. Sci. Forum 338–342, 1219 (2000) 12 M. Treu, R. Rupp, H. Kapels, W. Bartsch: Mat. Sci. Forum 353–356, 679 (2001) 13 H. Cho, P. Leerungnawarat, D.C. Hays, S.J. Pearton, S.N.G. Chu, R.M. Strong, C.M. Zetterling, M. Östling, F. Ren: Appl. Phys. Lett. 76, 739 (2000) 14 D.J. Morrison, A.J. Pidduck, V. Moore, P.J. Wilding, K.P. Hilton, M.J. Uren, C.M. Johnson, N.G. Wright, A.G. O’Neill: Semicond. Sci. Technol. 15, 1107 (2000) 15 V. Khema, T.P. Chow, R.J. Gutman: J. Electr. Mater. 27, 1128 (1998) 16 D.J. Morrison, A.J. Pidduck, V. Moore, P.J. Wilding, K.P. Hilton, M.J. Uren, C.M. Johnson: Mat. Sci. Forum 338–342, 1199 (2000) 17 E.H. Rhoderick, R.H. Williams: Metal–Semiconductor Contacts (Oxford Science Publications, Oxford 1988) 18 J.R. Waldrop, R.W. Grant: Appl. Phys. Lett. 62, 2685 (1993) 19 J.R. Waldrop: J. Appl. Phys. 75, 4548 (1994)

ROCCAFORTE et al.


20 W. Schottky: Naturwiss. 26, 843 (1938) 21 D.R. Lide: Handbook of Chemistry and Physics, 72nd edn. (CRC Press, Boston 1991–1992) 22 L. Porter, R.F. Davis: Mat. Sci. Eng. B 34, 83 (1995) 23 J. Peletier, D. Gervais, C. Pomot: J. Appl. Phys. 55, 994 (1984) 24 D.J. Morrison, K.P. Hilton, M.J. Uren, N.G. Wright, C.M. Johnson, A.G. O’Neill: Mat. Sci. Eng. B 61–62, 345 (1999) 25 D. Defives, O. Noblanc, C. Dua, C. Brylinski, M. Barthula, F. Meyer: Mat. Sci. Eng. B 61–62, 395 (1999) 26 R.T. Tung: In: Silicides, Fundamentals and Applications, ed. by L. Miglio, F. d’Heurle (World Scientific, Singapore 1999) pp. 315–329 27 M.J. Bozack: Phys. Stat. Sol. B 202, 549 (1997) 28 W.F. Slijkerman, A.E.M.J. Fischer, J.F. van der Veen, I. Ohdomari, S. Yoshida, S. Misawa: J. Appl. Phys. 66, 666 (1989)

29 I. Odomari, S. Sha, H. Aochi, T. Chikyow, S. Suzuky: J. Appl. Phys. 62, 3747 (1987) 30 A.A. Kodentsov, M.J.H. Van Dal, C. Cserhati, F.J.J. Van Loo: In: Silicides, Fundamentals and Applications, ed. by L. Miglio, F. d’Heurle (World Scientific, Singapore 1999) pp. 187–218 31 F. La Via, F. Roccaforte, A. Makhtari, V. Raineri, P. Musumeci, L. Calcagno: Microelectronic Eng. 60, 269 (2002) 32 F. Roccaforte, F. La Via, V. Raineri, L. Calcagno, P. Musumeci: Appl. Surf. Sci. 184, 295 (2001) 33 J. Robertson, E.P. O’Reilly: Phys. Rev. B 35, 2946 (1987) 34 P. Lespade, R. Al-Jishi: Carbon 20, 427 (1982) 35 S.Y. Han, K.H. Kim, J.K. Kim, H.W. Jang, K.H. Lee, N.K. Kim, E.D. Kim, J.L. Lee: Appl. Phys. Lett. 79, 1816 (2001) 36 M. Levit, I. Grimberg, B.Z. Weiss: J. Appl. Phys. 80, 167 (1996)