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IEEE ELECTRON DEVICE LETTERS, VOL. 35, NO. 1, JANUARY 2014
Improvement of Vth Instability in Normally-Off GaN MIS-HEMTs Employing PEALD-SiNx as an Interfacial Layer Woojin Choi, Hojin Ryu, Namcheol Jeon, Minseong Lee, Ho-Young Cha, and Kwang-Seok Seo
Abstract— In this letter, reduction of threshold voltage instability in gate recessed normally-off GaN metal insulator semiconductor high electron mobility transistors with SiNx gate insulator was investigated. A plasma enhanced atomic layer deposition technique was successfully employed for very thin SiNx (5 nm) as an interfacial layer. The hysteresis and drift of threshold voltage in transfer curve and the forward biased gate leakage current were effectively reduced.
TABLE I D EPOSITION C ONDITIONS OF PEALD AND ICP-CVD SiN x T HIN F ILMS
Index Terms— GaN, gate leakage current, metal insulator semiconductor high electron mobility transistors (MIS-HEMTs), normally-off, plasma enhanced atomic layer deposition (PEALD), silicon nitride, threshold voltage instability.
I. I NTRODUCTION ATE recessed normally-off GaN-based MIS-HEMTs have been studied as very attractive devices enabling next generation high-power, and high-voltage applications [1]. Recently, intensive studies have been performed on the gate dielectric layer processing and the interface analysis since they strongly influence the characteristics of MIS-HEMTs. In particular, threshold voltage (Vth ) hysteresis and drift under forward gate bias are often observed and usually related to trapping at the dielectric/GaN interface [2], [3]. On the other hand, silicon nitride has been a commonly used passivation film for suppressing the current collapse phenomena in GaN HEMTs due to its good interface properties. In-situ metal organic chemical vapor deposition (MOCVD)-grown silicon nitride was applied as an interfacial insulator layer for GaN MIS-HEMTs [4]. This indicates that such a high quality silicon nitride could be employed as an interfacial layer underneath the gate insulator. However, in-situ MOCVD silicon nitride has a great difficulty to be used in gate recessed normally-off MIS-HEMT structure. Therefore, other technique for high quality silicon nitride needs to be studied. PEALD depositions for various dielectrics have been actively pursued recently. Silicon nitride deposition using conventional plasma enhanced chemical vapor deposition
G
Manuscript received November 3, 2013; revised November 12, 2013; accepted November 14, 2013. Date of current version December 20, 2013. This work was supported by the IT R&D program of MSIP/KEIT. [10035173, Research on the Class-S base-station power amplifier technology for future mobile communications]. The review of this letter was arranged by Editor T. Egawa. W. Choi, H. Ryu, N. Jeon, M. Lee, and K.-S. Seo are with the Department of Electrical Engineering and Computer Science, Interuniversity Semiconductor Research Center, Seoul National University, Seoul 151-744, Korea (e-mail:
[email protected]). H.-Y. Cha is with the School of Electronic and Electrical Engineering, Hongik University, Seoul 121-791, Korea. Color versions of one or more of the figures in this letter are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/LED.2013.2291551
(PECVD) system was investigated by S. W. King in [5]. However, there are very few studies on the electrical characteristics of high quality PEALD-deposited silicon nitride and its effects on GaN. In this letter, we have effectively improved threshold voltage instability and forward biased gate leakage current of normally-off GaN MIS-HEMTs by employing high quality PEALD SiNx as an interfacial layer. II. H IGH Q UALITY S I Nx T HIN F ILM D EPOSITED BY PEALD To investigate dielectric properties simply, SiNx films were deposited on n-type silicon substrate. PEALD SiNx was grown using conventional inductively-coupled plasma chemical vapor deposition (ICP-CVD) system with SiH4 and N2 as precursors for Si and N, respectively, where the first step was N2 plasma treatment. Deposition conditions and resulting SiNx film characteristics are summarized in Table I. The chuck temperature during deposition process for both PEALD and ICP-CVD was maintained at 350 °C. Detailed PEALD process for SiNx was well described in [5]. The deposition rate achieved using our system was lower than that reported in ref [5] mainly due to the different pressure and gas flow capability. Our deposition rate was rather slow (∼0.5 Å/cycle), making PEALD not an effective way of growing gate insulator whose thickness is normally a few tens of nm. So we employed PEALD only for a thin interfacial SiNx film. First we deposited 5 nm thick SiNx films using PEALD and conventional ICP-CVD and compared their characteristics. The diameter of fabricated MIS structures was 50 μm. As shown in Fig. 1, the electrical characteristics of the PEALD SiNx such as breakdown field and leakage current were notably
0741-3106 © 2013 IEEE
CHOI et al.: IMPROVEMENT OF Vth INSTABILITY IN NORMALLY-OFF GaN MIS-HEMTs
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Fig. 3. (a) HRTEM image of recessed gate region and a 5 nm PEALD SiNx is distinguishable (b) AlGaN barrier was fully etched and sloped. Fig. 1. Leakage current and C-V characteristics of very thin (5 nm) SiNx films on n-Si with PEALD and ICP-CVD deposition technique are compared.
Fig. 2. Cross-sectional schematic of gate recessed GaN MIS-HEMT with 5 nm PEALD SiNx /25 nm ICP-CVD SiNx as gate insulator.
Fig. 4. Transfer curve hysteresis characteristics of the recessed gate MIS-HEMTs with the (red line) drain current (ID ) and (blue line) the transconductance (gm ).
improved. In addition, negligible capacitance-voltage (C-V) hysteresis was observed for the PEALD SiNx film, which might be attributed to reduced N-H bonding density in PEALD SiNx [6] and the resulting decrease of the K-centers and the interface charges [7]. In summary, these results demonstrate that the very thin PEALD SiNx is indeed a high quality dielectric material. III. GaN MIS-HEMT FABRICATION AND R ESULTS The epitaxial structures used for the fabrication of GaN MIS-HEMTs consisted of a 4 nm undoped GaN cap, a 24 nm undoped Al0.23 Ga0.77 N barrier, a 1 nm AlN spacer, and a 5 μm undoped GaN buffer on a p-type Si (111) substrate. The cross-sectional schematic of the device is shown in Fig. 2. The device fabrication began with mesa isolation followed by low damage gate recess using BCl3 /Cl2 gas mixture. It should be noted that the AlGaN barrier was completely etched as shown in Fig. 3. After the sample was cleaned by sulfuric peroxide mixture (SPM) and diluted HF (1:10), a 10 nm SiNx film was deposited using ICP-CVD to protect the surface during ohmic annealing. A Si/Ti/Al/Mo/Au (= 5/20/80/35/50 nm) metal stack was used for ohmic contacts, which was annealed at 780 °C for 1 minute in nitrogen ambient. The SiNx film was then removed by buffered oxide etchant (BOE) (1:7), and subsequently a 5 nm PEALD SiNx interfacial layer was deposited, followed by an in-situ 25 nm ICP-CVD SiNx deposition. A sample with a 30 nm ICP-CVD SiNx was used as reference. A post-deposition annealing was performed at 500 °C for 10 min. Finally, the gate electrode was formed by Ni/Au (= 40/360 nm) evaporation. Fig. 3(a) shows a high-resolution transmission electron microscopy (HRTEM) image of the recessed gate region where the 5 nm PEALD SiNx interfacial layer is identified. As shown in Fig. 3(b), the AlGaN barrier was fully etched with a sloped profile. Transfer characteristics of the fabricated devices were measured with the gate voltage sweep in both directions; from −2 to 10 V and from 10 to −2 V and it should be noted that the
Fig. 5. Consecutive transfer characteristics of the devices with varying maximum gate voltage (VG,max ). (inset) Observed Vth hysteresis were plotted to the values of VG,max .
applied bias stress conditions were higher compared with other studies reported for normally-off GaN MIS devices [8] [9]. As shown in Fig. 4, much smaller Vth hysteresis with much lower subthreshold slope was achieved by employing the PEALD interfacial layer. In addition, the device with the interfacial layer also exhibited a much higher maximum transconductance (gm,max ). The higher transconductance might be associated with N2 plasma treatment on GaN surface that was a part of the PEALD process, which could influence both surface potential and SiN/GaN interface quality [10]. To observe the threshold voltage hysteresis in more detail, bi-directional transfer curves were consecutively measured with varying maximum gate voltage (VG,max ). As shown in Fig. 5, Vth hysteresis was negligible when VG,max was below +3 V, but it was gradually widened and Vth was steadily drifted to positive direction with increasing VG,max for both samples. The effects of VG,max on Vth instability were also observed in other reports on GaN MIS-HEMTs [2], [3]. However, the amount of increase in Vth hysteresis was much less and the drift of Vth was negligible in the sample with PEALD SiNx interfacial layer compared to the sample without PEALD interfacial layer. In order to further investigate the Vth drift phenomenon, the Vth was monitored under the positive gate bias with increasing
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IEEE ELECTRON DEVICE LETTERS, VOL. 35, NO. 1, JANUARY 2014
for GaN MIS-HEMTs. Recent studies revealed that the band offsets might be affected by various factors such as interface dipole [15], fixed charge [15], and the phase of dielectric structure [16]. The suppression of forward biased gate leakage current might be the main reason for the improvement of the Vth instability in the sample with PEALD SiNx interfacial layer, because fewer electrons flow into the gate insulator to be trapped in empty trap states.
Fig. 6. Vth drift after applying voltage stress over different positive gate bias and increasing stress time (tstress ) was measured for the device stability.
IV. C ONCLUSION We have improved instability in transfer characteristics of gate recessed normally-off GaN MIS-HEMTs. Employing a PEALD SiNx as an interfacial layer, the hysteresis and drift of Vth and the forward biased gate leakage current were effectively reduced. This letter suggests that the PEALD SiNx would be a very promising interfacial insulator for GaN MIS-HEMT. R EFERENCES
Fig. 7. (a) Forward biased gate leakage current density and (b) FowlerNordheim plot of the different samples with the (blue circle) without (ID ) and (red circle) with the PEALD SiNx interfacial layer.
stress time, following the methodology presented in [3]. As shown in Fig. 6, the Vth was positively drifted by 780 mV after VG,stress of 7 V for 1000 s for the sample with PEALD SiNx , but it was as large as 1430 mV under the same stress condition for the sample without PEALD SiNx interfacial layer. To investigate the different characteristics between the samples when the gate voltage was positively biased, forward gate leakage currents were measured. The device without a PEALD interfacial layer exhibited an exponential increase in gate current with increasing the forward gate bias, whereas that with the PEALD interfacial layer did not show such dependency (see Fig. 7(a)). A Fowler-Nordheim plot is shown in Fig. 7(b) where the high and the medium electrical field regime exist. The linear slope of the high field region was used to estimate the conduction band offset (EC ) between SiNx and GaN. The calculated values of EC were 0.51 and 2.44 eV for without and with PEALD SiNx interfacial layer, respectively. This big discrepancy could be explained as follows. There are only limited numbers of reports on EC between SiNx and GaN. Whereas the theoretical calculations predicted EC of 1.3 eV with the method of charge neutrality levels [11], smaller EC of 0.5 eV was reported in [12]. However, recent studies reported much larger EC of about 2.4 eV with high quality SiNx formed by MBE-grown silicon with N2 plasma nitridation [13] or plasma-assisted MBE [14]. GaN MIS with ALD grown Al2 O3 , which has a large EC of 2.16 eV [11], showed reduced forward gate currents with increasing thickness of interfacial SiNx grown by in-situ MOCVD [4], which could provide another evidence for large conduction band offset of high quality SiNx . The extracted value of EC for the sample with PEALD SiNx is close to the reported data for other high quality SiNx [13], [14], demonstrating that PEALD is well suited for high quality SiNx
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