gallium zinc oxide (IGZO) transparent thin film transistors of the IGZO channel can be controlled to optimize the. (TTFT) and their bias stress stability is presented.
High performance transparent thin film transistors based on indium gallium zinc oxide as the channel material Arun Suresh, Patrick Wellenius and John F. Muth Department of Electrical and Computer Engineering North Carolina State University, Raleigh, NC, 27695 USA Tel (919) 513-2982, Fax (919) 515-3027, Email: muthkqcsu.edu Abstract
The fabrication of high performance amorphous indium gallium zinc oxide (IGZO) transparent thin film transistors (TTFT) and their bias stress stability is presented. N-channel enhancement mode devices were fabricated with an extracted field effect mobility of 11-15 cm2V'Is'1, on/off current ratios > 107, subthreshold gate voltage swing of 0.20-0.25 V/decade, low off-state currents and good saturation. Low and tunable threshold voltages of 1-2 V were achieved. We conclude that a charge trapping mechanism at the semiconductor/dielectric interface is responsible for the threshold voltage shift after a gate bias stress. The threshold voltage is recovered when the bias is removed. Introduction
There is substantial interest in the use of amorphous transparent conducting oxides for the channel of thin film transistors [1]. In addition to their transparency at visible wavelengths they have also been shown to possess surprisingly high electron mobilities compared to more traditional amorphous semiconductors such as a-Si:H, and organic semiconductors. Amorphous silicon, has low mobility of- 1 cm2V'Is'1, is sensitive to visible light, and has required extensive development to overcome dangling bond passivation and stability issues that can lead to troublesome threshold voltage shifts. In this work, we investigate Indium Gallium Zinc Oxide (IGZO) thin film transistors (TFT) that have high field effect mobilities of 11-15 cm2V 1s' , are optically transparent to visible light, and do not require dangling bond passivation strategies. The devices are deposited and fabricated at room temperature with the highest temperature process being a photoresist bake step. While the devices discussed in this paper are fabricated on glass substrates, the amorphous nature of the material also makes it compatible with flexible substrates. The transparency of these devices potentially allows significantly higher pixel fill factors. Another potential advantage of larger transistor areas is that lower current densities at lower operational voltages can be used, reducing the overall power consumption of displays. Transparent display elements with transparent driving circuits are also expected to open up numerous applications [2]. We demonstrate the important factors that make IGZO a viable candidate for display applications such
1-4244-0439-X/07/$25.00 © 2007 IEEE
as low temperature processing, high mobility, and optical transparency. Special emphasis is placed on gate bias stress measurements and on showing how the material parameters of the IGZO channel can be controlled to optimize the threshold voltage and other TFT characteristics.
Experimental Details IGZO films were deposited at room temperature (RT) using pulsed laser deposition (PLD) in an oxygen ambient. Xray diffraction, TEM, Hall mobility, conductivity, and optical transmission measurements were made to characterize the films. TFTs were fabricated using the bottom gate configuration on commercially available glass substrates with ITO/ATO (aluminum titanium oxide) coatings and on inhouse processed glass/ITO/PECVD SiNx substrates for comparison. The channel (IGZO) and the source/drain electrode layers (ITO) were deposited at RT and were patterned using standard photolithography and liftoff techniques. The growth conditions especially the oxygen partial pressure during deposition and the number of pulses were varied and optimized to give the required carrier concentration and thickness of the film. Fig. 1 shows the schematic cross-section ofthe TFT device. TFTs with various channel lengths and widths were fabricated. The TFT dimensions in this study are 100x400 [im2 (LxW). The gate bias stress measurements were carried out in air and in the dark and a virgin device was used for each stressing condition. DC gate voltages, in the range 10-30 V, were applied for a predetermined time in the linear operation regime using a VDS of 0.1 V. The threshold voltage shift was retrieved from the transfer characteristics, which were measured before and after applying the stress. The TFT characteristics along with the gate bias stress measurements were made using a Keithley 4200 semiconductor parameter analyzer and a 4284A LCR meter. L
Source/Drain Contact -200 (ITO
nm)
Channel (IGZO -40 nm) (ATO or SiN, -200 nm) Gate Contact
Fi.1Sceaccrs-ctoofheGZTF.
Gt otc , Glass Substrate
587
Results and Discussion
101
Fig. 2 shows the x-ray diffraction pattern of an IGZO film deposited at room temperature and used in this study. The film is amorphous with no obvious crystalline structure. The broad peaks seen are from the glass substrate. In Fig. 3, a cross-sectional HRTEM of a TFT shows smooth films and the inset confirms that the IGZO film is essentially
amorphous.
100
(a)
E10
E
E
cn
.
l- 0 r o°1o020
10-410
(b)
80 60 40 20
|O
40
20
60
80
100
0
50
0
Oxygen partial pressure (mTorr)
100
150
Time (minutes)
200
250
Fig. 4. Conductivity of IGZO films as a function of (a) oxygen partial pressure during film growth. (b) post deposition annealing time in air for two different temperatures, ( ) 175 'C and (m) 200 C 40
1021
30~~~~~~
-
~~~~~~~20 ~~~~~~~~~2 325
t
S~~~~~~~~~~~~~~~~~ 1019
Ns
\
30
10
20
30
20 (Degrees)
40
2
50a20'
15
25 0l C~~~~
C
Fig. 2. XRD pattern of the IGZO film. The film is amorphous and the broad 10 peaks are from the glass substrate.
10
15
20
2
10180
O
9
0~~~~~~~~~~~~~~
5_________________ 1017 X
0~~~~~~~~~~~~~~~~~
peaks__are_from__the__glassO
0
ITO~~~~~~ Fig. 5. Carrier concentration and Hall mobility as a function of oxygen
partial pressure during film growth. Higher indium concentration (open) ( heuglas/ITO/AT quait ofte im composition used insusrt.'hpiAl the study (solid). l l ~~~~~~~~~~~~~~~~~~IGZO
wavelengh of the entire IGZO-TFT stack and comnpares it to
Fig 2_XR It ~ ~~ ~ ~ ~ ~ ~ ~ ~ ~
Fig. 3. Cross-sectional HRTEM micrograph of the TFT layer structure and
the magnified image ofthe ATO/amorphous IGZO interface,
was high. Distinct interference fringes were observed shows that versufomsc optoa spctu smooth films with tranmitanc little scatter and a relatively
1S ~~~~Fg indicating
sharp optical absorption edge. The entire stack was highly
transparent at visible wavelengths and the majority of the absorption coming from the ITO contact layer which was 'deposited at RT. Functional transistors with IGZO soure/drain co ntacts furtherImprovedthe transparency, but their electrical characteristics are stllbeing studied.
control~~. othcarecocnrtointecanliesnil. g e T r t s a annealing steps, two process parameters - oxygen partial pressure during IGZO deposition and post deposition annealing of the IGZO films were evaluated. By varying the oxygen ambient in the chamber, the conductivity of the films 0.8 L over four orders of magnitude was achieved (Fig. 4a).1 v t co. Annealing in air at relatively low temperatures ( T2OOT°C) also °- 6 a . R causes the conductivity to decrease significantly but it was t t con observed thththe hall mobility does not change considerably e 4L (Fig. 4b). Since IGZO is a multi-component system, , concentration of ofeach the constituents can be varied toh obtain required properties. A strong correlation of the Hallm moblirty and carrier concentraton Of films with the oxygen partial pressure is seen and plotted in Fig. 5 for two IGZO 200 300 400 500 600 700 800 compositions. The films tend to be n-type [3,4] and mobilitiesWaengh(m greater than 30 cm2Vasl are achieved. The mobility tends to Fig. 6. Optical transmission spectrum for the complete IGZO TTFT stack decrease with the carrier concentration in the films.
(solid) and the substrate alone (open). The PLD IGZO and ITO layers do not significantly reduce the transmission in the visible range.
588
carriers. This also shows that changing the channel thickness would be an effective way to engineer the VT of the TFTs. 10
0o
10
10 -8
10 1
Fig. 7. The high transmission throughout the visible spectrum
can be seen
with the chips having functional transistors. The three chips shown have different source/drain material - (A) opaque metal (B) transparent ITO and (C) transparent IGZO.
The transparency of working transistor chips with different source/drain material is shown in Fig. 7. Typical dc drain current - drain voltage [IDS- VDS] curves for an IGZO TFT is shown in Fig. 8. The drain current exhibits pinch-off and hard saturation indicating that the TFT follows standard field effect transistor characteristics. The IGZO TFT behaves like an n-type enhancement mode device, 0.28
V (V)
0.24G
16
o-10
1 1 1o-12,
G
1
1
1
-15 -10
-5
GS
5
10
15
20
o-12
(V)
Fig. 9. Transfer characteristics at VDS = 20 V for an IGZO TFT with ATO gate dielectric. Between the two IDS curves, the IGZO channel thickness is varied, 50 nm (open) and 75 nm (solid). Since TFTs are essentially surface channel devices the effect of gate dielectric was explored. Fig. 10 compares ATO and PECVD SiNX gated TFTs. SiNX gated TFTs show a
hysteresis during
the IDS-VGS sweeps indicating interface states. The extracted ['sat and S were 5 cm2V 's-1 and 500
12
r
1 o-
0.08
0.04
8
5
10
vD
l
