Input-controlled Buck Converter for Photovoltaic Applications

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application with the input-controlled buck converter it is especially .... characteristics. Fig. 4: Bode plots of GVD (s) using the current source (continuous lines) and ...
IET Power Eletronics, Machines, and Drives Conference (PEMD), York, UK, 2008.

Input-controlled Buck Converter for Photovoltaic Applications: Modeling and Design M. G. Villalva , E. Ruppert F. University of Campinas (UNICAMP), Brazil [email protected], [email protected] Keywords: converter, buck, control, photovoltaic, PV.

Abstract DC-DC converters used in some photovoltaic (PV) systems require that the input voltage be controlled while the output voltage is constant. This paper shows different ways of modeling and controlling a buck converter with variable input voltage fed by a photovoltaic array.

1

Introduction

Conventional DC-DC converter models generally encountered in the literature are not suitable for the control of the input voltage. In the following sections we study three control systems for the buck converter employing two modeling strategies. The first system permits the control of the average input voltage using the transistor duty cycle as the control variable. In the second system the average voltage and current of the converter are controlled and two feedback control loops are employed. In the third system an analog inductor peak current controller and a linear feedback voltage loop are used to achieve the control of the input voltage of the converter.

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only in the current-source region. When vPV > VMP this model does not represent the array correctly. Fig. 2b shows another linear circuit that we could think as a possible array model. This circuit originates the line that contains the segment d of Fig. 1b and describes the array in the voltage-source region of operation. This model is rare in the literature and in our application with the input-controlled buck converter it is especially undesirable.

Modeling the photovoltaic (PV) array

A common model for PV arrays found in the literature is the circuit of Fig. 1a, where IPV is the PV current and RS and RP are the series and shunt resistances, respectively. Fig. 1b shows the current vs. voltage curve of the PV array obtained from this circuit. We can notice that for output voltages lower than VMP the array behaves like a current source (segmentc) and for voltages greater than VMP it becomes a voltage source (segment d). Fig. 2 shows that the PV array has a maximum power point (MPP). Ideally the array should operate at this point in order to deliver the maximum available instantaneous power. The parameters of the model of Fig. 1a may be obtained from eqs. (1) and (2) and from information encountered in manufacturer’s datasheets, which generally provide the opencircuit voltage of the array (VOC), the short-circuit current (ISC), the maximum-power voltage (VMP) and the maximum-power current (IMP). V − VMP VMP RS = OC , RS + R P = I MP I SC − I MP

I PV = I SC

RS + R P RP

(1) (2)

It is quite often to find publications about PV systems where the circuit of Fig. 2a is used as an array linear model. This circuit represents the line that contains the segment c of Fig. 1b. However, this circuit describes the behavior of the array

(a)

(b) Fig. 1: (a) Equivalent circuit of the PV array and (b) its current vs. voltage characteristic curve.

If the array is modeled in the current source region (line c) the model error increases as vPV becomes greater than VMP. Similarly, the error increases when vPV is bellow VMP if the array is modeled as a voltage source (line d). What model should be considered? Next section will show why the current source model (line c) is the best choice.

(a)

(b)

Fig. 2: PV array equivalent circuits. (a) Current source. (b) Voltage source.

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Modeling and controlling the converter

Fig. 3 shows a DC-DC buck converter attached to a PV array. The output voltage of the array is the variable input voltage of the converter. A storage device (e.g. battery) or a cascaded converter (e.g. DC-AC inverter) may be used to keep the output voltage VO at a constant value. In this section we will build linear models for this PV-buck system and design feedback systems with linear compensators to control the input voltage of the converter. 3.1 Voltage control with single feedback loop We need a linear model of the PV-buck system of Fig. 3. The goal is to find a small-signal transfer function that describes the dynamic behavior of the converter input voltage near the MPP. The control variable is the duty cycle d of the transistor switching at frequency fS = 1/TS. Considering that fS is

sufficiently high, by inspection of the circuit of Fig. 3 we can write eq. (3) for the inductor current. The symbol < > denotes the average value of the variable (voltage or current) in a switching period TS. [2]

Fig. 3: Input-controlled buck converter attached to a PV array. L

d =< v > d − Vo dt

(3)

In order to obtain a small-signal model we introduce small perturbations [2] in the circuit variables, as shown in eq. (4). The symbol ~ denotes small AC perturbations and capitalized letters denote DC steady-state values. ~ ~ < v >= V + v~ , d = D − d , < i >= I + i

(4)

From eqs. (3) and (4), by neglecting the nonlinear products and applying the Laplace transform, we obtain the frequency domain equation (5). ~ ~ s ⋅ L ⋅ i = −V ⋅ d + v~ ⋅ D

(5)

VEQ and REQ are the voltage and resistance of the equivalent Thévenin’s circuit of the models seen in Fig. 2. If the current source model (Fig. 2a) is used, we have: VEQ = IPV RP and REQ = RP + RS. If the voltage source model (Fig. 2b) is used, we have: VEQ = VOC and REQ = RS. Let us write an equation for the capacitor voltage. By inspection of the circuit of Fig. 3 we obtain eq. (6). V EQ − < v > R EQ

−C

d −d =0 dt

Fig. 4: Bode plots of GVD (s) using the current source (continuous lines) and voltage source (dashed lines) array models.

Although neither of the models of Fig. 2 represents the PV array in its full operating range, the circuit of Fig. 2a may be used as a linear array model for the purpose of modeling the PV-buck system. By comparing the Bode plots of Fig. 4 we intuitively conclude that a feedback control system designed for the current source region of the PV array will automatically fit for the operation in the voltage source region. Fig. 5 shows the feedback system employed to control the input voltage v of the converter. The compensator CVD(s) may be a proportional and integral one designed with conventional techniques of control systems to meet any dynamic and stability specifications [1]. Fig. 6 shows the frequency response of GVD(s) compensated with CVD(s) = (0.2+20/s), which results a crossover frequency of approximately 34000 rad/s and a phase margin of 86 degrees in this example system.

Fig. 5: Feedback control of the buck input voltage.

(6)

Similarly, by replacing eq. (4) in eq. (6) we find eq. (7). −

~ ~ v − s ⋅ C ⋅ v~ + I ⋅ d − i ⋅ D = 0 R EQ

(7)

From eqs. (5) and (7) we obtain the small-signal control-tooutput transfer function of eq. (8). R EQ (VD + sL I ) v~ (s ) GVD ( s) = ~ = 2 d (s ) s REQ LC + sL + D 2 REQ

(8)

With a simple DC circuit analysis we can find the expressions of the steady-state values I and V that appear in eq. (9). These expressions may be substituted in eq. (8). I=

V EQ − V R EQ D

, V=

VO D

(9)

Let us compare the frequency responses (Fig. 4) of GVD(s) when the models of Fig. 2a and 2b are used. The Bode plots of Fig. 4 were obtained with a PV-buck system with the parameters of the Kyocera KC 200 GT solar panel and VO=12 V, L = 2 mH, C = 450 μF, D = 0.5. When the current source model (Fig. 2a) is used, GVD(s) presents a resonance with an abrupt phase shift near 500 rad/s. When the voltage source model (Fig. 2b) is used, GVD(s) presents a low-pass response without any important characteristics.

Fig. 6: Bode plots of GVD(s) (dashed line) and of the compensated transfer function CVD(s) GVD(s) (continuous line).

3.2 Voltage control with inner current loop The second control system proposed employs the small-signal transfer functions GVD (s ) and G ID (s) . From eqs. (5) and (7) we can write the transfer function G ID (s ) , eq. (10). ~ i (s ) −V (1 + sR EQ C ) + R EQ DI G ID ( s) = ~ = d (s ) s 2 L R EQ C + sL + R EQ D 2

(10)

Fig. 7 shows the frequency response of GID(s) and Fig. 8 shows its root locus. This system has a right half-plane zero and its root locus is mostly on the right half-plane. The Bode plot shows that near the crossover frequency there is a phase shift of 180 degrees. Such a marginally stable system requires special attention. Fig. 9 shows the current control loop with the compensator CID(s). This compensator may be a simple proportional and integral one, but we must carefully choose the proportional

gain in order to set a crossover frequency with a good phase margin, keeping all system poles on the left half-plane. Because the root-locus is mostly on the right side of the s-plane there are strong constraints in the design of the compensator CID(s). A compensator with a low proportional gain, an integrator at the origin and a zero placed at a low frequency makes this system stable. If we try to set a closed-loop crossover frequency above the resonance frequency of GID(s) the system poles fall on the outside of the left half-plane, making the system unstable. The only option to make this system stable is keeping the magnitude at the resonance frequency bellow 0 dB. Unfortunately the stabilization of the current loop results a very low bandwidth. Fig. 7 shows the Bode plot of GID(s) compensated with C ID (s) = 1.3 ⋅ 10 −4 (s + 836.1) / s .

Fig. 10: Frequency responses of FI(s)GVD(s) and of CVI(s)FI(s)GVD(s).

Up to now we have analyzed two control systems where the average capacitor voltage v and the average inductor current i are controlled. These control systems may be implemented with analog circuitry or with a digital processor. Integrated circuits for duty-cycle control of DC-DC converters (also know as voltage-control mode) are widely available in the market. With the usage of an integrated controller all we have to do is to implement external analog or digital compensators and feedback paths. 3.3 Voltage and inductor peak current control

Fig. 7: Bode plots of GID(s) (dashed line) and of the compensated system CID(s) GID(s) (continuous line).

Most of integrated controllers for DC-DC converters available in the market also work in the current-control mode (also known as current-programmed mode). In this case instead of controlling the output voltage of the converter (or the input voltage in PV systems) by changing the transistor duty cycle we control the inductor current. If we wish to control the voltage an external control loop may be used to provide a reference current.

(a)

(b)

Fig. 11: (a) Analog inductor peak current controller and (b) waveform of the controlled inductor current. Fig. 8: Root locus of GID(s).

Fig. 9: Input voltage control system with inner current loop.

A low current control bandwidth does not mean the system will not work properly. In Fig. 9 we notice the existence of an external voltage control loop. The combination of the inner current loop and the outsider voltage loop results a closed-loop system whose transient voltage response may be as fast or as low as we wish, according to the design of the voltage compensator CVI(s). Our attention now is on the design of the voltage compensator CVI(s) used in the scheme of Fig. 9. Fig. 10 shows the frequency response of FI(s)GVD(s), where FI (s) = CID(s)/ (1+ CID (s)GID (s)). We must design the compensator CVI(s) in order to stabilize the outer voltage loop. A simple proportional and integral controller may be used and a large bandwidth with a sufficiently large phase margin may be easily obtained. Fig. 10 shows the Bode plot of the compensated loop transfer function CVI(s)FI(s)GVD(s), where CVI ( s ) = 80( s + 40) / s .

Fig. 11a shows the simplified scheme of the peak current controller. A square-wave oscillator sets the flip-flop at the beginning of the switching period TS. The inductor current i is measured and compared with the reference current iREF. When i > iREF the flip-flop is reset and the transistor is open until the beginning of the next cycle. Fig. 11b illustrates a typical inductor current waveform obtained with this control scheme. The transistor duty cycle is automatically adjusted in order to keep the inductor current near the desired reference current. As we know, when the duty cycle is greater than 0.5 this control scheme tends to become unstable [2,3]. The stabilizing ramp signal seen in the scheme of Fig. 11a is necessary for the proper operation of the converter. This stabilization increases the controller error, as the peak of the controlled current gets farther from the reference [2,3]. However, if this control scheme is employed as the inner part of an external control loop, the current error has no influence since the reference current will be automatically corrected, hence cancelling the effect of the current control error. Fig. 12 shows how the input voltage of the buck converter may be controlled with the peak current controller of Fig. 11a. The input voltage v is fed back and compared with the reference voltage vREF. The reference current iREF is determined by the voltage compensator CV (s).

< i E > = < i > D ≈ i REF D

(11)

With eq. (11), using the definitions of eq. (12), we can write the transfer function of eq. (13). ~ < v >= V + v~ , < i >= I + i , ~ ~ < i E >= I E + iE , i REF = I REF + iREF

Fig. 12: Voltage control employing inner peak current control system.

The simplicity of this scheme hides an important question: how is the dynamic response of the converter and the current controller? We need to develop a model that describes the behavior of the converter and helps to properly design the compensator CV (s). In order to obtain a converter model we assume that the control of the inductor current is instantaneous. If the current has a small ripple Δ i and a small error due to the stabilizing ramp, the average inductor current approximately follows the reference iREF. These assumptions are good enough for the purpose of modelling the system.

VEQ − V v~ GVI ( s ) = ~ ≈− I + s REQ I C iREF

(12)

(13)

Fig. 14 shows the frequency response of the transfer function GVI(s) and of the compensated transfer function CV(s)GVI(s). CV(s) may be a simple proportional and integral compensator. In this example we have used CV ( s ) = ( s + 500) / s.

When the reference iREF is perturbed the inductor average current is instantaneously adjusted except by the time ΔT it takes for the inductor current to rise till the value of the reference signal at the (+) terminal of the comparator – this is illustrated in Fig. 11b. It would be difficult to develop a sophisticated dynamic model for the current controller, like models found in references [4] and [5] for the conventional converter with output voltage control. If we pay attention to the inductor current waveform in Fig. 11b we can notice that the current rises linearly during the interval ΔT, beginning when a reference step occurs. During this interval (ΔT >> TS) the transistor remains closed and the duty cycle is d = 1. In other words, the converter is out of control during the interval ΔT. The transistor is simply turn on and so it remains until the flip-flop receives a reset signal. This behavior is extremely nonlinear and difficult to model, since the duration of ΔT depends on several variables such as the inductance L, the size of the reference step, and the instantaneous input voltage. Models developed in [4] and [5] take in account very small signal variations and do not represent the system behavior when ΔT >> TS . For the purpose of modelling and controlling our system we can neglect ΔT and consider that the peak current control is an instantaneous process. Even if ΔT >> TS this is a feasible assumption because the dynamic characteristic we are interested in depends mainly on the capacitor charging time. This considerably simplifies the task of modeling the PV-buck system and permits to draw the equivalent circuit of Fig. 13. Current is drained from the PV array and from the capacitor by a controlled current source. It does not matter what exists after the current source. Provided that the analog current controller of Fig. 11a is capable to maintain the inductor current under control the current flowing through the current source of Fig. 13 may be expressed as eq. (11), where D is the steady state duty-cycle of the transistor.

Fig. 13: Equivalent circuit of the PV-buck system with peak current control.

Fig. 14: Frequency response of GVI (s) and of the compensated transfer function CV(s)GVI(s).

4

Results

Switching converter models with the proposed control systems were simulated. The frequency responses of the compensated systems were presented in the previous section. Now let us see how the converters behave in the time domain. Fig. 15a shows the open-loop step response of the transfer function GVD(s) superimposed with the response of the simulated switching converter. This transfer function almost exactly represents the behavior of the switching converter regarding the duty-cycle of the transistor and the capacitor voltage. Fig. 15b shows the open-loop step response of the transfer function GID(s) superimposed with the response of the simulated switching converter. This transfer function represents the behavior of the switching converter regarding the duty-cycle of the transistor and the inductor current. Fig. 16a shows the result of the simulated switching converter controlled with the feedback system of Fig. 5, designed in section 3.1. The input voltage v rapidly and accurately reaches the 30 V reference. Fig. 16b shows the response of the converter controlled with the control scheme of Fig. 9, designed in section 3.2. The presence of the inner current loop speeds up the transient response. The input voltage v of the converter accurately reaches the reference voltage. Fig. 17 shows the behavior of the inductor current with this control scheme. Fig. 18 shows the open-loop step response of the transfer function GVI(s) superimposed with the response of the simulated switching converter. This transfer function aproximately represents the system behavior for small and even large voltage oscillations near the nominal operating point (V=24 V in this example). The transfer function exactly describes the approximated circuit model of Fig. 13. The error

between the responses of the tranfer function and of the real system is mainly due to the approximation D ≈ iREF and due to the assumption that ΔT ≈ 0. We must pay special attention to the fact that this system has a nonzero initial condition, since the initial capacitor charge does not depend on the existence of current flow through the controlled current source of Fig. 13. So we must remark that the DC value of the transfer function GVI (s) does not necessarily coincide with the steady state input voltage V. Fig. 19 shows the result of the PV-buck system operating with the current controller of Fig. 11, with the control system of Fig. 12, and with the compensator designed in section 3.3. This system is considerably stable due to the robustness of the analog current controller and its dynamic response is excellent.

(a)

(b)

Fig. 15: Open-loop step responses of (a) GVD (s) and (b) GID(s) compared to their respective physical systems with duty-cycle control.

(a)

(b)

Fig. 16: (a) Input voltage (vREF = 30 V) of the buck converter with the control system designed in section 3.1 (single voltage loop) and (b) with the control system designed in section 3.2 (voltage loop combined with inner current loop).

Fig. 17: Inductor current of the buck converter obtained with the inner control loop designed in section 3.2.

5

Conclusions

In section 2 we have demonstrated why the current source PV array model is better than the voltage source one for the purpose of modeling this PV-buck system. Although neither of the models represents the array in its full operating range, the current source model may be adopted and considered as a suitable representation of the PV array. This becomes evident when we analyse the frequency responses of the open-loop converter using both models. The converter response is worse when the PV array operates in the current mode, so we must design the control system aiming this region of operation. In section 3 we have presented several ways to obtain converter transfer functions for the input voltage control of the buck converter operating with duty-cycle control (voltage mode) or with inductor peak current control (current-programmed mode). The transfer functions show important dynamic characteristics of the input-controlled buck converter attached to the PV array. With these transfer functions we were able to design compensators and feedback controllers for the control of the input voltage of the buck converter. The development of the linear models and transfer functions presented in section 3 is rare in the literature. The control of the input voltage of DC-DC converters has not been well explored. Most of publications about PV systems which employ input control usually show experimental results but seldom show how the control systems were designed. In section 4 we have presented results obtained with simulated switching converters. These results show that the proposed models and transfer fuctions correctly describe the dynamic behavior of the studied PV-buck system. The open-loop transfer functions (GVD, GID, and GVI) describe the behavior of the converter with good accuracy. The results presented in the previous section show that the compensators designed in section 3 permit the construction of accurate, fast and stable closed-loop feedback control systems, making feasible the control of the input voltage of the DC-DC buck converter employed in PV applications.

References [1] Villalva, M. G., Ruppert F., E. (2007), Buck Converter with Variable Input Voltage for PV Applications, Proc. Brazilian Power Electronics Conf. (COBEP), 2007. [2] Erickson, R. W., Maksimovic, D., Fundamentals of Power Electronics, Kluwer Academic Publishers, 2nd Edition, ISBN 0-7923-7270-0.

Fig. 18: Response of GVI (s) to a step at 10 ms and open-loop input voltage of the buck converter with peak current control (iREF = 15 A).

[3] Pressman, A. I. (1998), Switching Power Supply Design, McGraw-Hill, 2nd Ed., ISBN 0-07-052236-7. [4] Tan F. D., Middlebrook R. D. (1995), A Unified Model for Current-Programmed Converters, IEEE Transactions on Power Electronics, Vol. 10, No. 4. [5] Middlebrook, R. D. (1989), Modeling Current-Programmed Buck and Boost Regulators, IEEE Transactions on Power Electronics, Vol. 4, No. 1.

Fig. 19: Input voltage (vREF = 30 V) with the control system designed in section 3.3 (voltage loop with peak current controller).