the Symposium held its 22nd meeting of presentations on state-of-the-art ... nologists, who attend the VLSI Technology Symposium held in conjunction with the ...
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 45, NO. 4, APRIL 2010
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Introduction to the Special Issue on the 2009 Symposium on VLSI Circuits
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HIS special issue of the IEEE JOURNAL OF SOLID-STATE CIRCUITS highlights some of the best papers from the 2009 Symposium on VLSI Circuits, which was held at the Rihga Royal Hotel, Kyoto, Japan, June 16–18, 2009. In 2009, the Symposium held its 22nd meeting of presentations on state-of-the-art topics important to VLSI designers, exchanges of important technical information, and introductions to new advancements in VLSI circuit design. Industry and academia around the world contributed papers to the Symposium. The VLSI Symposia offers a unique venue for attendees to exchange ideas with other circuit designers, as well as technologists, who attend the VLSI Technology Symposium held in conjunction with the Circuit Symposium, and alternates between the USA and Japan. Founded in 1987, the Symposium on VLSI Circuit is sponsored jointly by the IEEE Solid-State Circuits Council and the Japan Society of Applied Physics in cooperation with the Institute of Electronics, Information and Communications Engineers of Japan. In 2009, the Circuits Symposium was held for three full days, and overlapped with the Technology Symposium during the first two days of the conference. The overlap days allowed attendees to freely attend sessions from both Symposia, providing a unique opportunity to learn about the latest advances in both VLSI Circuits and Technology and to interact with attendees from both Symposia. The Technical Program Committees received 313 submissions from 24 countries of which 110 papers were selected for presentation covering the range of digital, memory, analog, wireless and wireline communication circuits. From these presentations, the committee has selected 23 outstanding papers as highlights of the 2009 Symposium for publication in this issue of the JOURNAL. They will be presented with greater detail, elaborating the innovations and findings, than what was Digital Object Identifier 10.1109/JSSC.2010.2042256
possible in the Symposium digest. These papers were subject to the normal JOURNAL review and rigorous referee process. The special papers include eight analog papers, seven digital papers, three memory papers, and five wireless and wireline communications papers. We enjoyed working with the authors on these papers, and we certainly hope that the detailed discussion presented in these papers will be valuable and enjoyable to the JOURNAL reader. This special issue required substantial efforts from the authors and the reviewers to ensure correctness and quality of presentation. We would like to thank them for their efforts. We would also like to thank the Symposium on VLSI Circuits North-America/Europe and Japan/Far-East Technical Program Committees for coordinating and successfully running the conference, and selecting the papers for this special issue; we owe them a debt of gratitude, as well as the Executive Committee for their support. Finally, we would like to thank the JOURNAL Editor, Bram Nauta, for his guidance, and the staff of the IEEE Transactions and Journals Department for their invaluable assistance in publishing this issue. In closing, we would like to encourage readers to attend the 2010 Symposium on VLSI Circuits to be held in Honolulu, Hawaii, on June 16–18, 2010, to participate in the discussion of the papers and find out about the latest new advances in VLSI Circuits.
MASAYUKI MIZUNO, Guest Editor NEC Corporation Kanagawa, Japan AJITH AMERASEKERA, Guest Editor Texas Instruments Incorporated Dallas, USA
Masayuki Mizuno received the B.S., M.S., and Dr.Eng. degrees in electronic engineering from Osaka University, Osaka, Japan, in 1991, 1993, and 2000, respectively. In 1993, he joined NEC Corporation, where he has been engaged in the research and development of low-power circuit techniques, world’s first single-chip MPEG2 video encoder LSIs, high-speed clock generation circuits and distribution networks especially for NEC’s supercomputers, and high-bandwidth serial links. During a leave from 1999 to 2000, he engaged in the research of interconnection network for chip multiprocessors at Stanford University as a visiting scholar. Currently he is a senior manager of Device Platforms Research Laboratories, NEC Corporation, and his research interests lie in dependable LSI design and test, low-power PAN and BAN wireless and high-speed wireline communications. He was a Visiting Professor at Hiroshima University, Japan. Dr. Mizuno served as the program committee members for Symposium on VLSI Circuits, ISSCC, and SSDM. He is the program chair of 2009 Symposium on VLSI Circuits. 0018-9200/$26.00 © 2010 IEEE
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 45, NO. 4, APRIL 2010
Ajith Amerasekera is a TI Fellow and Director of the Kilby Research Labs at TI. He received the Ph.D. degree in 1986 and then worked at Philips Research Labs., Eindhoven, The Netherlands, on the first submicron semiconductor development. In 1991, he joined Texas Instruments, Dallas, working in the VLSI Design Labs on circuit and device modeling of high current effects in devices and circuits. Since 1999, he has been working on circuit design and IP development for TI’s CMOS technologies from 250 nm to 32 nm. Before taking up the role at the Kilby Labs, he was Chief Technology Officer for TI’s ASIC Business Unit and Director of ASIC Technology Strategy. He has 28 issued patents, and has published over 100 papers in technical journals and conferences, in addition to four books on Electrostatic Discharge and semiconductor device reliability. Dr. Amerasekera has served on the technical program committees of a number of International Conferences, and he is currently the Technical Program Chair of the 2010 VLSI Symposium on Circuits.
