4.3.3.2 Standard 2-level converter voltages and current wave forms 53. 4.3.3.3 Standard 2-Level ... 4.4 Comparison of the MMC to the standard 2-levels converter . . . . . . . . 56 ...... In order to understand the thermal model, the Cauer and Foster.
1
---
Faculty of Computer Science and Electrical Engineering Institute of Power Electronics and and Electrical Drives
Master Thesis subject:
Analysis and development of a Modular Multilevel Converter for Traction Drives applications
Presented by: Mr. Nescelin TSAGUE Under the Direction of: Prof. Dr. Ing. Hans-Gunter Eckel Supervisor: M.Sc. Till-Mathis Plötz
Rostock, 19 August 2016
Abstract In this master thesis, the aim of our work is to investigate a single phase two legs modular multi-level converter (MMC) for AC-DC network and create a software model of this converter topology using Matlab-Simulink with and additional toolbox Plecs, paying a special attention to the output current of the converter in this case the grid current. For this reason, it is important to investigate the total harmonic distorsion (THD) of the grid current and determine the power limit of the converter using dierent variety of converter topologies. For this task, the computation of the junction temperature of the semi-conductors (IGBTs and diodes) is done to know the maximal output current that the semi-conductors can support in normal operation of the converter, the correponding power losses in the semi-conductors , the output power of the converter and the e ciency of the converter in these conditions. Finally the outcome of the MMC has to be compared to the standard 2-levels converter which is often used in traction.
In
the preamble of this master thesis, the general idea behind the MMC is presented with the mathematical model of a one leg MMC as well as the modulation approoach used. Then, the analysis and operation of a single phase two legs MMC, the power control strategy in the converter and the total harmonic distorsion investigation on the grid current and voltage are presented with the power losses calculation as well as the junction temperature computation for the semi-conductors. Finally, the simulation results and a brief comparaison of the MMC full bridge topology to the standard 2-levels converter are given.
I
ACKNOWLEDGEMENTS I would like to thank Almighty God for the breath that he gives me in my daily life. I would like to express my sincere gratitude to Prof. Dr. Ing. Hans-Günter Eckel for having selected me for this important project, Mr. M.Sc. Till-Mathis Plötz for his supervision and his unconditional availability and help during the accomplishment of this project, to Dr. Ing Tamara Bachtold for her advises and to Ms. Stefanie Schulten for her help and sympathy and to all other people, friends and classmate who contributed directly or indirectly to preparation of this important project. My deepest gratefulness goes to my elder brothers Dr. Etienne Wamba and Mr. Clement Fouepe for their nancial and moral support, to my dear Nguetchou Toukam Jessy Wilfried and his mother and nally to the Toko's family which works so hard to remember our father, the great Toko Jean.
II
Contents
1 The Modular Multilevel Converter (MMC)
2
1.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2
Working principle of a MMC
1.3
Mathematical modeling of the single phase one leg MMC . . . . . . . . . .
6
1.3.1
System model of one Leg
7
1.3.2
Capacitor in the submodules
1.3.3
Arm inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
8 9
1.4
Modulation techniques for MMC
Multi-carrier PWM . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
1.5
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
1.4.1
. . . . . . . . . . . . . . . . . . . . . . .
2
2 Analysis and operation of a single phase two legs MMC
10
13
2.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2
Mathematical analysis
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
2.3
Power in the converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
2.4
Power equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
2.4.1
Power delivered from the grid to the converter . . . . . . . . . . . .
16
2.4.2
Power delivered from the converter to the grid . . . . . . . . . . . .
17
2.5
2.6
Converter working point control strategy . . . . . . . . . . . . . . . . . . .
18
2.5.1
Converter angle . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19
2.5.2
The modulation index calculation . . . . . . . . . . . . . . . . . . .
19
Total harmonic distorsion on the grid current and voltage. . . . . . . . . .
20
2.6.1
2.7
Total harmonic distorsion on the grid current ig(t)
2.6.2
Total harmonic distorsion on the converter voltage
2.6.3
Consequences of high THD in the system
. . . . . . . . .
VConv
21
. . . . . .
21
. . . . . . . . . . . . . .
22
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
24
3 Power losses calculation 3.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2
Power losses in the semi-conductors . . . . . . . . . . . . . . . . . . . . . .
25
25
25
3.2.1
Losses hierarchy
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
25
3.2.2
Case of the IGBT . . . . . . . . . . . . . . . . . . . . . . . . . . . .
26
3.2.3 3.3
13
3.2.2.1
Conduction losses
3.2.2.2
Switching losses
. . . . . . . . . . . . . . . . . . . . . .
27
. . . . . . . . . . . . . . . . . . . . . . .
28
Case of the freewheeling diode
. . . . . . . . . . . . . . . . . . . .
Junction temperature in the semi-conductors calculation . . . . . . . . . . 3.3.1
Virtual junction temperature TVj.
III
. . . . . . . . . . . . . . . . . .
29 30 30
3.3.2
. . . . . . . . . . . . . . . . . . . . . . . . .
30
3.3.3
Heat sink temperature Th. . . . . . . . . . . . . . . . . . . . . . . .
30
3.3.4
Ambient temperatureTa. . . . . . . . . . . . . . . . . . . . . . . . .
31
3.3.5
Thermal Impedance or resistance . . . . . . . . . . . . . . . . . . .
31
3.3.6 3.4
Case temperature Tc.
3.3.5.1
Cauer model. . . . . . . . . . . . . . . . . . . . . . . . . .
31
3.3.5.2
Foster model. . . . . . . . . . . . . . . . . . . . . . . . . .
32
. . . . . . . .
32
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Modelling of submodules thermal equivalent circuits
34
4 Simulations results 4.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2
Control of semi-conductors switching states 4.2.1
4.3
4.3.2 4.3.3
. . . . . . . . . . . . . . . . .
35 35
. . . . . . . . . . . . . . . . . . . . . . .
41
M2C Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
41
4.3.1.1
M2C simulation model . . . . . . . . . . . . . . . . . . . .
43
4.3.1.2
M2C full bridge voltages and current wave forms . . . . .
46
4.3.1.3
M2C full bridge voltages and current phase-shift
. . . . .
47
4.3.1.4
M2C full bridge power and e ciency . . . . . . . . . . . .
47
4.3.1.5
M2C full bridge junction temperature of the semi-conductors 48
Total harmonics distorsion(THD) . . . . . . . . . . . . . . . . . . . Standard 2-level converter model
. . . . . . . . . . . . . . . . . . .
51
Standard 2-level converter simulation model . . . . . . . .
52
4.3.3.2
Standard 2-level converter voltages and current wave forms 53
4.3.3.3
Standard 2-Level converter voltages and current phase-shift 53
4.3.3.4
Standard 2-Level Converter Power and E ciency . . . . .
4.3.3.6
. . . . . . . . . . . . . . . . . . . . . . .
54
Standard 2-level converter Total harmonics Distorsion(THD) 55
Comparison of the MMC to the standard 2-levels converter 4.4.2
54
Standard 2-Level Converter Junction Temperature of the semi-conductors
4.4.1
50
4.3.3.1
4.3.3.5
4.4
35
Multi-carrier pulse width modulation used . . . . . . . . . . . . . .
Model according to the topology 4.3.1
35
. . . . . . . .
56
Advantages of the MMC compared to the standard 2-levels converter 56 Disadvantages of the MMC compared to the standard 2-levels converter
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
58
4.5
Summary table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
59
4.6
Application of the Project . . . . . . . . . . . . . . . . . . . . . . . . . . .
60
4.6.1
Traction Drives for High-speed trains . . . . . . . . . . . . . . . . .
60
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
60
4.7
IV
List of Tables 1.1
Switching states of a half bridge submodule
. . . . . . . . . . . . . . . . .
4
1.2
Switching states of a full bridge submodule
. . . . . . . . . . . . . . . . .
5
4.1
comparison table
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
59
V
List of Figures 1.1
Submodule con guration: a) Half bridge; b) Full bridge
. . . . . . . . . .
1.2
Current ow in a half bridge submodule
. . . . . . . . . . . . . . . . . . .
4
1.3
Positive current ow in a full bridge submodule . . . . . . . . . . . . . . .
5
1.4
Negative current in a full bridge submodule
6
1.5
Single phase one leg MMC model . . . . . . . . . . . . . . . . . . . . . . .
1.6
MMC single phase equivalent circuit
1.7
Multi-Carrier PMW
1.8 2.1
Single phase full bridge equivalent circuit
2.2
Converter simpli ed circuit and phasor diagramme [7]
2.3
Phasor diagramme controlled[8].
. . . . . . . . . . . . . . . . .
3
7
. . . . . . . . . . . . . . . . . . . . .
10
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
Signal output Multi-Carrier PMW (modulated signals) . . . . . . . . . . .
12
. . . . . . . . . . . . . . . . . .
13
. . . . . . . . . . .
15
. . . . . . . . . . . . . . . . . . . . . . .
18
3.1
Losses hierarchy in a sub-module [12] . . . . . . . . . . . . . . . . . . . . .
26
3.2
IGBT output characteristics[12] . . . . . . . . . . . . . . . . . . . . . . . .
27
3.3
Diode forward characteristic
. . . . . . . . . . . . . . . . . . . . . . .
29
3.4
Thermal equivalent
. . . . . . . . . . . . . . . . . . . . . . .
32
3.5
Submodule thermal equivalent circuits[17]
3.6
The thermal eect on the submodule
4.1
Pulse-Width-Modulated signals according to the topology
. . . . . . . . .
36
4.2
PWM signals control in full bridge topology . . . . . . . . . . . . . . . . .
37
4.3
Vector selector for MMC full bridge topology
38
4.4
Full bridge submodule switch gear control ow chart
. . . . . . . . . . . .
39
4.5
Half bridge submodule switch gear control ow chart . . . . . . . . . . . .
41
4.6
Operation of the MMC at the fundamental frequency . . . . . . . . . . . .
42
4.7
Full simulation model of the single phase MMC . . . . . . . . . . . . . . .
43
4.8
Module con guration per arm in the simulation model
. . . . . . . . . . .
44
4.9
Submodule con guration in the simulation model . . . . . . . . . . . . . .
45
[12] models.[8][16]
4.10 Full bridge MMC converter signals
[17]
. . . . . . . . . . . . . . . . . .
33
. . . . . . . . . . . . . . . . . .
34
. . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . .
46
4.11 Full bridge MMC: Phase between signals . . . . . . . . . . . . . . . . . . .
47
4.12 Full Cauer model used . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
49
4.13 Full bridge MMC: junction temperature and e ciency according to the power losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
50
4.14 Full Bridge MMC: Total harmonic distorsion according to the switching frequency
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.15 Standard 2-levels converter simulation model
51
. . . . . . . . . . . . . . . .
52
4.16 Standard 2-levels convertersignals . . . . . . . . . . . . . . . . . . . . . . .
53
VI
4.17 Standard 2-levels converter: Phase between signals
. . . . . . . . . . . . .
53
4.18 Standard 2-levels converter: Junction temperature and e ciency according to the power losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
55
4.19 Standard 2-levels converter: Total harmonic distorsion investigation . . . .
56
4.20 MMC and standard 2-levels converter current wave forms
. . . . . . . . .
57
. . . . . . . . . . . .
58
. . . . . . . . . . . . . . . . . .
60
4.21 Grid current and converter voltage THD comparison 4.22 Verlaro E: With 350 km/h (Siemens) [19]
VII
List of abbreviations IGBT
Insulated Gate Bipolar Transistor
MMC:
Modular Multi-levels Converter
M2C:
Modular Multi-levels Converter
HVDC:
High Voltage Direct Current.
FACTS:
Flexible Alternative Current Transmission System.
NPC:
Neutral point Clamped
FC:
Flying Capacitor.
PWM:
Pulse-Width-Modulation
CPWM:
Carrier Pulse-Width-modulation
LS-PWM:
Level Shifted Pulse-Width-modulation
PD-PWM:
Phase Deposition Pulse-Width-modulation
PAD-PWM:
Phase Alternating Deposition Pulse-Width-modulation
POD-PWM:
Phase Opposition Deposition Pulse-Width-modulation.
APOD-PWM:
Alternating Phase Opposition Deposition Pulse-Width-modulation
PS-PWM:
Phase Shifted Pulse-Width-modulation.
SVM:
Space vector modulation
THD:
Total Harmonics Distorsion
DC:
Direct Current
AC:
Alternative Current
FB:
Full bridge topology .
HB:
Half bridge topology.
2-L:
Two point or two levels converter.
VIII
List of symbols IDC
DC-link current
VDC
DC-link voltage
Vg
Grid voltage
Ig
Grid current
Rg
Grid resistance
VL
Inductor voltage
Vselect
PWM selected vector
Lg
Grid inductance
XL
Grid inductor reactance
Vconv
Converter voltage
Ra
Arm resistance
La
Arm inductance
VU
Upper arm voltage
VL
Lower arm voltage
IL
Lower arm current
IU
Upper arm current
VCU
Total upper arm capacitor voltage
VCL
Total lower arm capacitor voltage
Vcap
Submodule capacitor voltage
Vconv,max
Converter peak voltage
nU
Total number of active capacitors in the upper arm
nL
Total number of active capacitors in the lower arm
IX
N
Total number of submodule ON at the same time during a half period of the output signal
Csub
Submodule capacitance
Ctot
total capacitor in one module or total capacitor in one arm
Ncell,MMC
Cell capacitor number of the modular multi-level
Icir
Circulating current
δ
Converter angle
δmax
Converter maximal angle
ϕ
Phase angle
Sg
Grid apparent power
Pg
Grid active power
Qg
Grid reactive power
Sconv
Converter apparent power
P conv
Converter active power
Qconv
Converter reactive power
T HDIg
Total harmonics distorsion of the grid current
T HDVconv
Total harmonics distorsion of the converter voltage
f sw
Converter switching srequency
f1
Converter or grid frquency
Tsw
Converter switching period
T
Converter output period
Pj
Average power losses in the converter
P out
Average output converter power
m
Converter modulation index
P D,cond
Diode average conduction losses
PD,rec
Diode reverse recovery power losses
PIGBT,cond
Insulated gate bipolar transistor average conduction power losses
X
converter
PIGBT,sw
Insulated gate bipolar transistor average switching power losses
PIGBT,ON
Insulated gate bipolar transistoraverage power losses in ON state
PIGBT,Of f
Insulated gate bipolar transistor average power losses in OFF state
EON
Swittching ON energy given by the datasheet
EOf f
Swittching OFF energy given by the datasheet
WON
Swittching ON energy per unit watt
WOf f
Swittching OFF energy per unit watt
Wrec
Reverse recovery energy per unit watt
Erec
Reverse recovery energy given by the datasheet
Tc
Conduction period
Tof f
OFF state period
Ton
ON period
PIGBT,tot,average
Insulated gate bipolar transistor total average power losses
IC
Insulated gate bipolar transistor collector current in nominal regime
IC,sat
Insulated gate bipolar transistor collector current in saturation regime
VCE
Insulated gate bipolar transistor collector-emitter voltage in nominal regime
R0
Insulated gate bipolar transistor ON resistance
RD
Diode ON resistance
Vf
Diode forward voltage
VD,0
Diode threshold voltage
If
Diode forward current
Rth
Thermal resistance
Zth
Thermal impedance
Cth
Thermal capacitance
XI
Rthjc
Thermal resistance junction to case
Rthcs
Thermal resistance hcase to heatsink
Rthsa
Thermal resistance heatsink to ambient
T vj
Temperature virtual junction
T jc
Temperature Juction case
T cs
Temperature case to heatsink
T ca
Temperature case to ambient
Ta
Ambient temperature
XII
General Introduction Nowadays the increasing penetration of renewable energies, as well as the requirements in terms of e ciency, quality and reliability in the electrical systems leads to a big challenge. Innovative operational equipments based on power electronics such as multilevels converters and suscepitible to be connected to the medium voltage grid, able to provide several function to the power operators such as control of power ow, reduction of power losses and quality improvement in several parameters in the given electrical system such as output current and voltage wave forms. A suitable application of this is the high voltage direct current transmission, exible alternative current transmission technologies (FACT) and electric tractions drives. In this master thesis, we will focus ourself on the traction drive application.
Among the multi-levels converter topologies, the modular
multi-levels converter (MMC) has recently become subject of intense researches because it provides some particular and interesting features.
However, as it is not a mature
technology, it does not have yet a speci c control scheme or classi cation. Therefore, we will contribute to this interesting research topic in this master thesis by focusing ourselves on the modular multi-level converter for application to electric traction drives, with a particular attention to the grid current, the harmonic spectrum of the converter voltage and current, the power limit dimensionning of the converter, the junction temperature of IGBT computation in dierent submodules and nally a comparison of this converter topology to the standard 2-levels converter. This work is divided in four chapters where in the chapter 1, the general idea behind the MMC is presented with the mathematical model of a one leg MMC as well as the modulation approoach used. In the chapter 2 is presented analysis and operation of a single phase two legs MMC, the power control strategy in the converter and the total harmonic distorsion investigation on the grid current and voltage. The chapter 3 shows power losses calculation as well as the junction temperature computation for the semi-conductors.
Finally, the simulation results are
presented in the chapter 4 with a comparaison of the MMC full bridge topology to the standard 2-levels converter.
1
1 The Modular Multilevel Converter (MMC) 1.1 Introduction In this chapter, the working principle and the mathematical analysis of the MMC are presented. The initial study is based on the single phase one leg model and farther in the next chapter it is extended to the single phase two legs model. The operation of the 1-phase converter at the recti er and inverter mode is explained. However, the focus of our work on this master thesis is based on the single phase with two legs and this is done from the next chapters. The working principle of a MMC and a detailed mathematical analysis is presented for a single phase one leg model, the role of the arm inductance, the submodule capacitor as well and the modulation techniques used are described.
1.2 Working principle of a MMC The MMC topology is based on a series connection of identical elements, called submodules or cells. Each sub-module represents the basic component of the MMC, shown in gure (1.2). The series connection of sub-modules in one phase is known as leg. The leg is divided into upper and lower arms such that the number of the sub-modules in each arm is equal.
The converter voltage (Vconv) terminal is the common connection
point between both arms.
Since the leg capacitors share a common DC-link voltage
there is no need of bulky DC link capacitors, as in case of two-level, Neutral Point Claimped (NPC) or Flying Capacitor (FC) topologies[1].
Inductors are placed in the
arms to limit transient currents. Dierent MMC topologies can be classi ed depending on the submodule structure.
The dierence in the cell structure results in dierent
possible voltage levels at the terminals of the sub-module[1]. However, with the increase of elements, the capacitor balancing becomes more complicated. The term sub-module refers to a half bridge or full bridge formed by two or four switches with antiparallel diodes respectivelly for half and full bridge and a DC capacitor, as shown in Figure (1.2). The capacitor inside the submodules acts as a voltage source.
The switches execute
the insertion of the sub-module into the arm circuit while the antiparallel diodes ensure uninterruptable current ow[1].
2
S1
T1,D1
A
Vout
S2
S1
C
T2,D2
T1,D1
A
T3,D3
S3 C
T2,D2
S2
S4
B
T4,D4
B
a) Half bridge submodule configuration
b) Full bridge submodule configuration Vout=VAB
Figure 1.1: Submodule con guration: a) Half bridge; b) Full bridge
Since all the submodules are identical, the operation principle of MMC can be resumed to the cell level operation. Each sub-module has two states depending on the switch positions ( this is the case of a half bridge con guration). When the switch S1 in gure(1.2-a) is ON, the switch S2 is OFF and the submodule is inserted into the circuit. The voltage between the terminals is equal to the capacitor voltage . When the lower switch is ON, the upper is OFF and the sub-module is bypassed and the terminal voltage is zero. As it can be derived from the sub-module topology, the switches have to operate in complementary way in order not to short circuit the capacitor. By controlling the number of the submodules inserted and bypassed, a staircase output voltage can be obtained at the converter voltage (Vconv) terminals of the converter. The direction of the arm current aects the capacitor voltage pro le[1]. sub-module for dierent states.
In gure(1.2) is shown the current ow in the
When the submodule is inserted, the positive current
will charge the capacitor, passing through the upper diode (D1) gure(1.2-a) whereas the negative current will discharge the capacitor passing through the upper Insulated Gate Bipolar Transistor (IGBT-T1) ( gure(1.2)-c). When the sub-module is bypassed the capacitor voltage remains constant. Hence, a positive current will pass through the lower (IGBT-T2) whereas a negative current will pass through the Diode (D2) This is strictly the case for a half bridge submodule con guration. In table (1.2) the sub-module terminal voltages and capacitor status depending on the switching states and the direction
3
of the arm current are summarized. As for the full bridge submodule con guration, the gure(1.2) show the complete operation of the submodule with the current ow direction (sign of the current) and the operation semi-conductors. It is to be noticed that in this case, the output submodule voltage can take three states (+Vc, 0 and -Vc) where Vc is the capacitor voltage. The table (1.2) shows the complete operation of the full bridge submodule con guration.The following gure shows the dierent active semi-conductors for a negative current ow in a half bridge submodule, according to the switching states of the IGBTs:
S1
T1,D1
S1
i A
S2
Vout
i
C
Vout
T2,D2
a) Current ow: S1=1; S2=0; i>0
T1,D1
S2
b) Current ow: , S1=1; S2=0; i0
T2,D2
d) Current ow: S1=0; S2=1; i0 Voutput
0 +Vc
i0
T4,D4
b) Current ow: S1=0; S2=1; i>0
S3
S1
S3 T1,D1
S1
T3,D3 C
i
S2
C
A
i
B
S3
T2,D2
T1,D1
c) Current ow: S1=1; S3=1; i>0
A
C
B
S4
S2
T4,D4
T3,D3
T2,D2
T4,D4
d) Current ow: S1=0; S3=0; i>0
Figure 1.3: Positive current ow in a full bridge submodule
The following table shows the IGBTs switching states in a full bridge submodule:
Switching States
i>0
¯ S1=S2
¯ S2=S1
¯ S3=S4
¯ S4=S3
0
1
0
0
1
1
1
0
1
0
i0
Vector 2-1
S1
Switch [0 0]
*,3
[1 0]
Vector 2-2
Vector 3 Multi-port switch Pulse generator
Figure 4.3: Vector selector for MMC full bridge topology
As for the switching gear in the gure (4.2), it is a Matlab function block containing the programme to be executed to switch the corresponding submodules. The following gure(4.4) shows the ow chart of the switching gear control in the MMC full bridge topology. In this ow chart, the variables are denominated as follows:
Vec is the a column vector with ve components containing the submodule output voltages per arm.
I is the arm current owing through the submodules. m the corresponding PWM selected vector component. NB: This variable is dierent to the modulation index as de ned in the previous chapter.
38
Start Define set as Function of Vec, I, m set=zeros(5,1) No No
Display vector Vec in ascending values
I0
yes
No
Display vector Vec in descending values
Display vector Vec in descending values
For i=1:1:abs(m)Switch ON the Submodule i with negative output
I>0
yes Display vector Vec in ascending values
For i=1:1:m Switch ON the Submodule i with positive output
End
Figure 4.4: Full bridge submodule switch gear control ow chart
The rst step to control the full bridge submodule switch gear is to de ne as function the submodule output voltages per arm vector Vec, the current I owing through the corresponding arm and the correspoding PWM selected vector component m for the corresponding arm. The PWM selected vector has two components and it is in the form Vselect = [a b]. Where a is the number of submodules to be switched on in the upper arm of the corresponding leg and b the number of submodules to be switched on in the lower arm of the corresponding leg (m = a for the upper arm and m = b for the lower arm). a and b may be positive or negative with respect to sign of the submodule output voltage that we would like to have or even zero if we don't want to switch on any submodule in the corresponding arm: For example the vector Vselect =[4 -1] means that we switch on four submodules with positive output voltage in the upper arm of the corresponding converter leg and one submodule with negative output voltage in the lower arm of the corresponding converter leg.
Then, we create a zero column vector
having ve components. After this step, suppose that we are in the upper arm of the
m = a > 0, we check the sign of the current I owing through arm. If the current is postive (I > 0), we arrange the vector (Vec) component in th ascending values and for any integer i=1,..,m, we switch on the i submodules with
rst converter leg and that the the
positive output voltages. Otherwise, if the current owing through the arm is negative
(I < 0),
we arrange the vector (Vec) component in the descending values and for any
39
integer i=1,..,m, we switch on the
ith
submodules with negative output voltages.
In
other hand, suppose that we are in the upper arm of the rst converter leg and that
m = a < 0, we check negative (I < 0), we
the sign of the current I owing through the arm. If the current is arrange the vector (Vec) component in the descending values and
for any integer i=1,..,m, we switch on the
ith
submodules with negative output voltages.
Otherwise, if the current owing through the arm is negative
(I > 0),
we arrange the
vector (Vec) component in the ascending values and for any integer i=1,..,m, we switch on the
ith
submodules with positive output voltages. We repeat this for the lower arm
but considering this time
m = b,
the second component of the vector Vselect. Finally, we
do the same operation for the second leg of the converter. It is to be noticed that the PWM signal for the rst converter leg is in phase opposition with the second leg. As for the half bridge switch gear control ow chart, we set as function with the same de nitions as it is the case for the full bridge topology but just that in this case, the PWM selected vector components a and b are either positive or zero. For example the vector vec = [6 0] means that we switch on six submodules with positive output voltage in the upper arm of the corresponding converter leg and no submodule in the lower arm of the corresponding converter leg.
Then, we create a unit column vector having six
components. After this step, suppose that we are in the upper arm of the rst converter leg, we check the sign of the current I owing through the arm. If the current is postive
(I > 0), we arrange the vector (Vec) component in the ascending values and switch on the m submodules with positive output voltages. Otherwise, if the current owing through the arm is negative
(I < 0),
we arrange the vector (Vec) component in the descending
values and switch on the m submodules with negative output voltages. After this step, suppose that we are in the upper arm of the rst converter leg, if
m = a > 0,
for any
th submodule imposing at its output a 0V output integer i = 1,..,m, we switch o the i voltage. Otherwise, if
m = a < 0,
the control stops. This operation is repeated for the
lower arm but considering this time
m = b,
the second component of the vector Vselect.
Finally, we do the same operation for the second leg of the converter. Likewise in the full bridge topology, PWM signal for the rst converter leg is in phase opposition with the second leg. The following gure shows the ow chart of the programme which controls the switching gear in the MMC half bridge topology:
40
Start
Define set as function of Vec, I, m
set=one(6,1)
No
yes
I>0
Display vector Vec in descending values
Display vector Vec in ascending values
No
m>0 yes
For i=1:1:m Switch OFF the Submodule i
End
Figure 4.5: Half bridge submodule switch gear control ow chart
4.3 Model according to the topology 4.3.1 M2C Model The full model was built considering the following parameters for the system: 1. For the full bridge topology, a DC-voltage source is used at the DC-link instead of a capacitor to keep constant the active power produced by the submodules even after a long time. As the capacitor acts as a voltage source, it has no active power limit over the time and consequently, the active power will keep on decreasing because of the voltage drop inside the submodule capacitor and after a while, we will have no more active power at the DC-link.
Each arm is equiped with an
inductance which aects the arm current ripple by reducing it and playing many
41
other important role in the model as described in (2.4) and (4.2.1). Each arm has a total of ve submodules in full bridge con guration and three submodule in the half bridge topology with a submodule capacitor voltage (Vc) of 600V. The converter rms voltage (Vconv) is xed to 1.8 kV with a modulation index (m) of
√
2.
At the
grid side, the grid inductor rms voltage (VL) is assumed to be 25% of the grid rms
4 voltage (Vg). The grid rms voltage (Vg) is then √
V . 17 conv
2. For the half bridge topology, a DC-voltage source is used at the DC-link instead of a capacitor for the same reason. Each arm is equiped with an inductance with a total of three submodules in half bridge con guration.
Each submodule has a
1.8 capacitor voltage(Vc) of 600V. The converter rms voltage(Vconv) is xed to √ kV 2
with a Modulation Index (m) of
1.
At the grid side, the grid inductor rms voltage
(VL ) is assumed to be 25% of the grid rms voltage (Vg). The grid rms voltage (Vg)
4 V . 17 conv
is then √
In a modular multilevel converter, at any time, the DC-link voltage is computed as follows:
VU + VL = VDC
(4.1)
This formula is valid for the full bridge and half bridge MMC. However, the modulation index in the case of half bridge can not exceed 1 ie.(m
6 1)
which is not the case for the
Full Bridge toplogy, where the modulation index can be lower or greater than 1. The our
m=1
simulation, we have used
m=
for the half bridge toplogy ,
√
2
for the full bridge
topology and m=0.7289 for the standard 2-Level converter. The following gure shows the operation of the MMC at the fundamental frequency for dierent topologies.
. .
+VDC/2+x +VDC/2
+VDC/2+x +VDC/2
Converter voltage(V)
Converter voltage(V)
.
.
.
.
VL
VU
VL VU
.
.
-VDC/2
VU
VL
-VDC/2
-VDC/2-x
.
VU
VL
-VDC/2-x . . .
0
T/2
.
T
Time(s)
a) Converter voltage, Full Bridge topology
. .
0
.
T
b) Converter voltage, half bridge topology
Figure 4.6: Operation of the MMC at the fundamental frequency
42
T/2 Time(s)
4.3.1.1 M2C simulation model The following gure show the full simulation model of the single phase MMC.
Upper module1
Upper module2
La
La
Ra
Ra
Rg Lg
VDC Ra
Ra
La
La
Lower module1
Lower module2
Vg
Figure 4.7: Full simulation model of the single phase MMC
Each leg consists of two modules: That is the upper module for the upper arm and the lower module for the lower arm. The model shown in gure (4.7) can be used as full bridge or half bridge topology just by modifying the module con guration and of course the switching control scheme. Inside each module are submodules which are ve for our full bridge topology and three for our half bridge topology. The following gure shows the module con guration according to the MMC topology:
43
IN
IN1
Sub1
Sub1
Sub2
Set1
Sub2
Sub3
Vc
Sub3
Vc
set1
Sub4 Sub4
Sub5 Sub5 Sub6
OUT OUT
a) Full bridge module con guration
b) half bridge module con guration
Figure 4.8: Module con guration per arm in the simulation model
The dierence between the full bridge and half bridge topology resides on how the submodules are con gurated. The following gure shows the submodule con guration according to the MMC topology:
44
IGBT1 s1
IGBT3
D1
s3
IGBT1
D3
s1
D1
Vc
Vc Out
In
s2
IGBT2 D2
s4
In
IGBT4 D4
s2
IGBT2 D2
Out
a) Full bridge con guration
b) Half bridge con guration
Figure 4.9: Submodule con guration in the simulation model
In the M2C model, we have paid more attention during the simulation especially on the full bridge toplogy. The following wave forms have been taken for a critical inductance(i.e the the value of the inductance which leads to the maximal junction temperature of the semi-conductors) value of Lg=1.8mH corresponding to a grid current of Ig=758.6A.
45
4.3.1.2 M2C full bridge voltages and current wave forms
a) Converter Voltage
b) Grid voltage
c) Grid Current
d) Inductor Volatge
d) Capacitor voltages in submodules
e) Fluctuation of the capacitor voltages in the submodules
Figure 4.10: Full bridge MMC converter signals
46
4.3.1.3 M2C full bridge voltages and current phase-shift In accordance to the gure(2.3), the converter voltage is shifted to the grid voltage with the converter angle (δ ). This can be observed in the following gure(4.11-a). Likewise, the grid current and voltage are in phase and this result is obvious on the gure (2.3-b).
a) Converter and Grid Voltages
b) Grid voltage and Current
c) Inductor voltage and current
d) Inductor and Grid voltages
Figure 4.11: Full bridge MMC: Phase between signals
4.3.1.4 M2C full bridge power and e ciency As stated in the equation (2.28), the converter output power is given by:
Pout = Vg Ig cos(ϕ)
(4.2)
Qout = Vg Ig sin(ϕ)
(4.3)
47
Given that the grid current is controlled such that
ϕ=0°, the new converter output power
after the grid current control can be written as Pout=VgIg. Hence, the converter power is calculated as: Pout=1.7463kV*752.28A=1.32MW. This value of the converter output power was calculated using the critical value of the grid inductance L=1.8mH (ie: the inductance value at which the semi-conductors reach the maximal junction temperature) under an output frequency of f1=1kHz. Due to the fact that the phase between the grid
°
°
current and the grid voltage is 0 (ie:ϕ=0 ), the reactive power is 0 VAR: ie Qout=0 VAR. The e ciency is calculated as
η=
Pout − Pj Pout
(4.4)
Where Pout is the grid power and Pj is the power losses in the semi-conductors. Given that we neglected the grid resistance(ie: the transformer secondary winding resistance) was neglected, it follows that there is no power losses on the grid and consequently the power at the grid side is also the power at the converter side (i.e: Pout≈Pconv).
The
e ciency was then calculated using the equation (4.4) and the critical value of the grid inductance. Therefore, for the full bridge topology, we got
°
η =98.15% , a THDIg of 1.54%
°
under a maximum junction temperature of 147.17 C for the IGBTs and 93.32 C for the diodes.
4.3.1.5 M2C full bridge junction temperature of the semi-conductors The full Foster model in the matrix con guration as described in the equation (3.19) is used for the simulation of the semi-conductors junction temperature is shown in the following gure:
48
dT JC IGBT
Pj IGBT PLECS Circuit
1 Pj_IGBT
PLECS
1 dT jc IGBT
dTca Ibgt- Igbt
Pj IGBT
5 dT J_IGBT 2 dTca IGBT dT Igbt-Diode
Pj IGBT PLECS Circuit
Ta 4 dTca Diode
dT JC Diode
Pj Diode PLECS Circuit
2 Pj_Diode
60
Pj Diode PLECS Circuit
6 T J_Diode 3 dTjc Diode
dT Diode-Diode
Foster-Modell16
Pj Diode PLECS Circuit
dT Diode-Igbt
Figure 4.12: Full Cauer model used
From gure(3.5), we have
Tja = Tjc + Tcs + Tsa
(4.5)
The change of temperature case-ambient is the sum of the change temperature caseheatsink and heatsink-ambient. Hence, we have That is
Tc = Tca + Ta
Tja = Tjc + Tcs + Tsa ;Tca = Tcs + Tsa .
and
Tj = Tjc + Tc = Tjc + Tca + Ta
(4.6)
Where Ta is the Ambient Temperature in water. In the current application(in Traction
°
Drives), Ta=60 C. That is:
For IGBT,
TJmax = 150◦ C so
For Diodes,
TJmax = 150◦ C
that
Tja = Tjc + Tca ≤ 90°C
so that
Tja = Tjc + Tca ≤ 90°C
.
In oder to ful ll these conditions and the conditions stated in (4.3.1), we have used the datasheet FF1400R12IP4 for a better approximation of power losses in the semiconductors. This is because the submodule capacitor voltage used is 600V, which is the maximal blocking voltage of each semi-conductor in the full bridge topology. It is to be
49
noticed that choosing an IGBT module which blocking voltage is close to the on provided by the datasheet leads to mimimize the switching losses. The following gure shows the junction temperature of the semi-conductors and e ciency of the converter according to the power losses
160 TjIgbt Tjdiode
Junnction temperature(°C)
140 120 100 80 60 40 20 0 18
19
20
21 22 23 Power losses(KW)
24
25
26
a) TJIGBT and TJdiode with respect to Pj
b) E ciency with respect to Pj
Figure 4.13: Full bridge MMC: junction temperature and e ciency according to the power losses
The gure (4.13-a) above, we see that the IGBTs junction temperature grows faster than the diode junction temperation and both are linear up to the maximal junction temperature of each semi-conductors.
This can be veri ed in the table (4.1) and the
gure (3.6), which con rm that the converter is operating in inverter mode.
Also, we
can observe that the more is the power losses the higher is the junction temperature in the semi-conductors and this follows that the lower will be the e ciency of the converter as shown in the gure (4.18-b).
4.3.2 Total harmonics distorsion(THD) As described in section (2.6), the total harmonic distortion, or THD, is the summation of all harmonic components of the voltage or current waveform over the fundamental component of the voltage or current wave form:
T HDIg
v uP u n I2 u i t = i=22 (%) I1
(4.7)
From this equation (4.7), we understand mathematically that if the some of harmonics starting from the second order harmonic (
n P
i=2
50
Ii2 )
is very high, the total harmonic distor-
tion will be high as well and as consequence, this will have a negative eect on the output power and of course on the e ciency of the converter. So, estimating the total harmonic distortion on the grid current is very important for our work in this Master thesis. After the simulations, we got the results shown in the following gure for the THD on the grid current and converter voltage for the MMC full bridge topology:
a) THDIg with respect to fs
b) THDVconv with respect to fs
Figure 4.14: Full Bridge MMC: Total harmonic distorsion according to the switching frequency
The gure (4.14) above shows the THD on the grid current and converter voltage for the MMC full bridge topology.
It shows that the grid current THD is lower than
the converter voltage THD and small enough such that the grid current is smooth and perfectly sinusoidal. The bigger is the switching frequency, the lower is the grid current THD. This means that the switching frequency has a signi cant impact on the grid current THD, which is not the case for the converter voltage.
The high grid current
THD leads to a signi cant amount of power losses on the grid. That is in the transformer secondary winding. So by reducing the grid current THD we save power losses in the transformer and that makes us save money.
4.3.3 Standard 2-level converter model For this converter topology, a DC-voltage source is used at the DC-link instead of a capacitor. The converter rms voltage(Vconv) is xed to 1.8kV. At the grid side, the grid inductor rms voltage (VL) is assumed to be 25% of the grid rms voltage (Vg). The grid rms voltage (Vg) is then
4V√conv . after controlling the converter angle and the phase shift 17
between the voltage and current, we have got
δ h14°.
ϕ=0°
and
δ =0.2450
rad corresponding to
The modulation index was computed by setting the grid rms voltage Vg=900V,
the rms voltage drop in the inductor is assumed to be 25%Vg ie. VL=225V (2.35) can
51
be written as
m= which gives exactly m=0.7289.
√ Vg 2 cos(δ)VDC
(4.8)
The following signals have been gotten for a critical
inductance value of Lg=0.49mH corresponding to a grid current of Ig=1.59 kA and a
°
juction temperature of IGBTs and diodes close toTj,max =25 C. In the standard 2-levels topology, we used the IGBT module described in the datasheed FZ1500R33HE3.
4.3.3.1 Standard 2-level converter simulation model The following gure shows the simulation model for the 2-Level Converter:
IGBT1 s1
D1
s3
IGBT3 D3 Rg
VDC
Lg
s2
IGBT2 D2
s4
IGBT4 D4
Figure 4.15: Standard 2-levels converter simulation model
52
Vg
4.3.3.2 Standard 2-level converter voltages and current wave forms
a) Converter voltage
b) Grid current
Figure 4.16: Standard 2-levels convertersignals
The gure (4.16-a) above shows the converter voltage wave form in the standard 2-levels converter topology whereas in the gure (4.16-b) is shown the grid current wave form for the same converter topology. From this gure, we observe huge ripples in the grid current which are responsible of the high THD.
4.3.3.3 Standard 2-Level converter voltages and current phase-shift
a) Converter and grid voltages
b) Grid voltage and current
Figure 4.17: Standard 2-levels converter: Phase between signals
53
The gure (4.17-a) above shows the phase shift (δ ) between the grid voltage and the converter voltage wave forms in the standard 2-levels converter topology whereas in the gure (4.17-b) is shown the phase shift (ϕ) grid current and the grid voltage wave forms for the same converter topology. From this gure, we observethat
0°
δ >0 whereas ϕ =
and as consequence, the grid current and voltage are in phase. This helps to optimize the output power.
4.3.3.4 Standard 2-Level Converter Power and E ciency Likewise in the full bridge topology, the converter output power is given by:
Pout = Vg .Ig cos(ϕ)
(4.9)
Qout = Vg .Ig sin(ϕ)
(4.10)
Given that the grid current is controlled such that
ϕ=0°, the new converter output power
after the grid current control can be written as Pout=VgIg. Hence, the converter output power is calculated as: Pout=900V.1,59kA=1,4MW. This value of the converter output power was calculated using the critical value of the grid inductance L= 49 mH (ie: the inductance value at which the semi-conductors reach the maximal junction temperature) under an output frequency of f1=450Hz. Due to the fact that the phase between the grid
° (ie:ϕ=0°), the reactive power is 0w:
current and the grid voltage is 0 The e ciency is calculated as
η=
ie Qout=0 VAR.
Pout − Pj Pout
(4.11)
where Pout is the grid power and Pj is the power losses in the semi-conductors. Given that the grid resistance (ie: the transformer secondary winding resistance) was neglected, it follows that there is no power losses on the grid and consequently the power at the grid side is also the power at the converter side (i.e:
Pg≈Pconv).
The e ciency was
then calculated using the equation (4.11) and the critical value of the grid inductance. Therefore, for the standard 2-levels topology, we got
°
η =98.95%
, a THDIg of 16.84%
°
under a maximum junction temperature of 124.73 C for the IGBTs and 103.26 C for the diodes. The simulation results are summarized in the table (4.1) below.
4.3.3.5 Standard 2-Level Converter Junction Temperature of the semi-conductors Likewise as stated in(4.3.1.5), we have
Tja = Tjc + Tcs + Tsa
(4.12)
The change of temperature case-ambient is the sum of the change temperature caseheatsink and heatsink-ambient. Hence, we have
Tja = Tjc + Tca ; Tjc = Tj − Tc ; Tca = Tc − Ta
.
Tja = Tjc + Tcs + Tsa ;Tca = Tch + Tha ; That is Tc = Tca + Ta and
Tj = Tjc + Tc = Tjc + Tca + Ta
54
(4.13)
Where Ta is the Ambient Temperature in water. In the current application (in Traction
°
Drives), Ta=60 C. That is:
For IGBT,
TJmax = 125◦ C so
For Diodes,
TJmax = 125◦ C
Tja = Tjc + Tca ≤ 65°C
that
so that
Tja = Tjc + Tca ≤ 65°C
.
To ful ll these conditions and the conditions stated in(4.3.1) , we have used the datasheet FZ1500R33HE3 to approximate the power losses in the semi-conductors. semi-conductors. This is because the submodule capacitor voltage used is the whole DC-link voltage (1.8 kV), which is the maximal blocking voltage of each each semi-conductor in the standard 2-levels topology.
The following gure shows the junction temperature of the semi-
conductors and e ciency of the converter according to the power losses.
140 0.991
TjDiode TjIGBT
130
0.9905 0.99
110 Efficiency (%)
Junction temperature(°C)
120
100 90 80 70
0.989 0.9885 0.988
60 50
0.9895
0.9875 0
2
4
6
8
10
12
14
Power losses (kW)
a) TJIGBT and TJDiode with respect to Pj
16
0.987
0
5
10 Power losses (kW)
b) E ciency with respect to Pj
Figure 4.18: Standard 2-levels converter: Junction temperature and e ciency according to the power losses
From the gure (4.18-a) above, we see that the IGBTs junction temperature grows faster than the diode junction temperation and both are linear up to the maximal junction temperature of each semi-conductors.
This can be veri ed in the table (4.1) and the
gure (3.6), which con rm that the converter is operating in inverter mode.
Also, we
can observe that the more is the power losses the higher is the junction temperature in the semi-conductors and this follows that the lower will be the e ciency of the converter as shown in the gure (4.18-b).
4.3.3.6 Standard 2-level converter Total harmonics Distorsion(THD) Likewise in the section (4.3.2), after the simulations, we got the results shown in the following gure for the THD on the grid current and converter voltage for the standard 2-Level Converter topoloy :
55
15
a) THDVconv with respect to fs
b) THDIg with respect to fs
Figure 4.19: Standard 2-levels converter: Total harmonic distorsion investigation
The gure (4.19) above shows the THD on the grid current and converter voltage for the standard 2-level converter topology.
It shows that the grid current THD is lower
than the converter voltage THD. The bigger is the switching frequency, the lower is the grid current THD. This means that the switching frequency has a signi cant impact on the grid current THD, which is not the case for the converter voltage.
The high grid
current THD leads to a signi cant amount of power losses on the grid. That is in the transformer secondary winding. So it is very important to reduce the grid current THD to save power losses in the transformer to optimize the output power.
4.4 Comparison of the MMC to the standard 2-levels converter 4.4.1 Advantages of the MMC compared to the standard 2-levels converter The MMC con guration oers many advantages over the traditional VSC:
Not all the switches in a leg are opened or closed at the same time as they would in a two-level VSC, but they are operated at dierent time instants to follow the sinusoidal reference command more closely, the switching frequency of each switch can thus be low, while still generating a large apparent switching frequency.
The voltage blocking requirements of an individual switch is limited to the voltage across the module's capacitor.
If enough modules are used, the voltage across each switch can be low enough not to require seriesconnected switches. In a 2-level VSC, each arm must be able to block the DC-link voltage in the blocking state. During switching, all these devices must
56
operate together. If one IGBT operation is delayed, it is exposed to a high voltage, which could damage it. In the case of the MMC, the high number of modules, each only blocking the voltage across its internal capacitor eliminates this inconvenience and improves the failure rate.
The modular concept allows operation even if some modules have failed.
Failed
modules can simply be bypassed, and kept bypassed until it is possible to replace them and continue the operation. The DC-link voltage is then divided among the remaining N
=1 modules and normal operation can continue.
The MMC has a relatively low THDV and THDI compared to the standard 2-Levels converter.
As consequence, the converter voltage and grid current are smooth
enough and close to the sinusoidal reference wave form.
No lters at AC-side required
The following gure(4.20) show the current wave form in MMC full bridge and the one in the standard 2-levels converter. From this gure, we see that the current resolution is better in the MMC topology (full bridge for instance) whereas we observe huge ripples on the grid current in the standard 2-levels converter. As consequence, the total harmonic distorsion of the grid current in the MMC is dramatically lower compared to the standard 2-levels converter as we can observe in the gure (4.21-c) shown below. The same observation is obvious on the converter voltage as shown in the gure(4.21-d) below. It is to be noticed that the total harmonic distorsion of the grid current is also better in the MMC full bridge to the detriment of the one in MMC half bridge topology. As for the converter voltage total harmonic distorsion, it is better for the half bridge topology than in the full bridge topology as shown in the gure (4.21-b) below.
MMC and 2-L grid current (A)
1500
2-L MMC-FB
1000
500
0
-500
-1000
-1500 0
0.01
0.02
0.03
0.04
0.05
0.06
time(s)
Figure 4.20: MMC and standard 2-levels converter current wave forms
57
a) THDIg full bridge and half bridge topology
b) THDVconv full bridge and half bridge topology
c) THDIg full bridge and 2-levels topology
d) THDVconv full bridge and 2-levels topology
Figure 4.21: Grid current and converter voltage THD comparison
4.4.2 Disadvantages of the MMC compared to the standard 2-levels converter
Higher number of semi-conductors and as consequence, the cost is relatively higher compared to the Standard 2-Levels Converter in terms of semi-conductors cost.
Large and costly capacitors required in the submodules High complexity regarding the control of IGBTs compared to the standard 2-levels converter
More power losses in the semi-conductors in the MMC compared to the standard 2-levels converter
58
The MMC has a slightly lower e ciency (η 2-levels converter(η
≈98%
) compared to the standard
≈ 99%).
The power losses in the semi-conductors are not symmetrical in the MMC-full bridge topology:
It is not the case in the standard 2-levels converter topology
where power losses are symmetrical.
4.5 Summary table. The following table showing a brief summary of the simulation results when the converter is operating in inverter mode: MMC full bridge
MMC half hridge
2-levels
DC-link voltage (VDC)
1.8 kV
1.8 kV
1.8 kV
Converter voltage (Vconv)
1.8 kV
1.8 kV
1272.8V
Submodule capacitor voltage (Vcap)
600 V
600 V
-
Grid voltage (Vg)
1.74 kV
1.74 kV
900 V
Submodule capacitance Csub
10mF
10mF
-
Grid current (Ig)
752.28A
547.8 A
1.59 kA
Power losses (Pj)
24.4 kW
21.48 kW
13.84 kW
Grid power(Pg)
1,32 MW
1,61 MW
1.31 MW
Converter Ee ciency (η )
98.15%
98.66%
98.95%
Switching frequency (fs)
1 kHz
1 kHz
450Hz
THDVconv
11.25%
10.5%
85.23%
THDIg
1.54%
6.6%
16.84%
Grid inductance(Lg)
1.8 mH
2.8mH
0.49 mH
° 93.32°C √
TJmax,IGBT
° 90.66°C
147.17 C
TJmax,diode
2
Modulation index (m)
°
° 103.26°C
148.73 C
124.73 C
1
0.7289
°
°
Converter angle (δ )
0.2440 rad (13.98 )
0.2450 rad (14.03 )
0.2450 rad (14.03 )
Phase angle (ϕ)
0
0
0
0.1 mH
0.1 mH
-
0Ω
0Ω
0Ω
50 mF
10 mF
-
0Ω
0Ω
0Ω
Arm inductance Arm resistance
(La ) (Ra )
Submodule capacitor Grid resistance
°
(Csub )
(Rg )
Table 4.1: comparison table
59
°
°
4.6 Application of the Project 4.6.1 Traction Drives for High-speed trains The MMC can be used in traction drives for high speed trains in order to:
Elimination the high expense for passive lters[18] Minimize machine losses Minimize accoustic noise in the traction machines. Insure a redundant operation after failures of submodules or failures at the DC-link Compensate the reactive power Insure a low maintenance with high reliability of the system Guarantee a very good e ciency Reduce large transient overvoltages from grid Guarantee a good overload capacity.
Figure 4.22: Verlaro E: With 350 km/h (Siemens) [19]
4.7 Conclusion We have presented in this chapter the global simulation results of the whole system for dierent topologies. For a better interpretation of these results, the simulation was performed using the same modulation techniques PD-PWM (Phase Deposition PWM) for dierent topologies (full bridge, half bridge). The converter working point control was investigated and for a better understanding of its control strategy, the converter and grid voltage wave form were presented as well as the phase shift between the converter voltage and the grid current, the grid voltage and the grid current, the converter voltage and
60
the grid voltage and nally the the grid inductor and the grid current. The power losses in the submodules and semi-conductors for the 2L-converter were investigated and the results were presented and the junction temperature in the semi-conductors as well. The Total Harminic Distorsion(THD) of the converter current and voltage were simulated and the result was presented and according to the theory developed in the previous chapters.
61
General Conclusion In this master thesis, the aim of our work was to investigate a single phase modular multilevel converter (MMC) for AC network and create a software model of this converter using Matlab-Simulink with and additional toolbox Plecs, paying a special attention to the output current of the converter in this case the grid current. For this reason, we had to investigate the total harmonic distorsion (THD) of the grid current and determine the power limit of the converter using dierent veriety of converter topologies.
For
this task, the computation of the junction temperature of the semi-conductors (IGBTs and diodes) was done to know the maximal power losses in the semi-conductors, the corresonding output power of the converter and the e ciency of the converter in these conditions.
Finally the outcome of the MMC had to be compared to the standard 2-
Levels converter. At the beginning of the master thesis, we gave a general introduction to the MMC and in the rst three chapters, we developped the theory behind the MMC with one leg and two legs with all functional equations to achieve our aim. In the chapter 4 are presented the simulation results performed using Matlab-Simulink/Plecs, based on the theoritical knowledge described previously. As for the outcome of this work, we can say that our aim was reached since in the paragraph (2.6.3), we can see exactly how the THD can in uence on the power losse for instance and on the e ciency accordingly and the simulation results shown in the gure (4.20) and in the table (4.1) prove exactly we have reduced dramatically the grid current THD using the MMC. The table (4.1) present also the power limit, the corresponding output current and power losses, the e ciency and the corresponding junction themperature for the semi-conductors. However, we got some di culties for choosing the right PWM method and to control the phase shift between the grid voltage and current since and the very beginning we did not neglect the grid resistance and also as the power losses in the semi-conductors in the MMC full bridge are not symmetrical, we had too choose for the junction temperature the rst IGBT or diode which reaches the rst the maximal junction temperature. Although the standard 2-levels converter has an e ciency slightly greather than the MMC, we can say that the MMC has more advantages than the standard 2-levels converter.
As for the
cost, we didn't do a suitable comparaison. Nevertheless, our aim for this master thesis was reached.
62
References:
[1] Department of Energy Technology Aalborg University, Denmark,Control of MMC in HVDC Applications Master Thesis 30/05/2013
[2]Real-time simulation of Modular Multilevel Converters Dominic Paradis, Masters of Science Graduate Department of Electrical and Computer Engineering University of Toronto 2013
[3]Design and Control of Modular Multilevel Converter in an Active Front End Application, Panagiotis Asimakopoulos, ERN-THESIS-2013-274 31/08/2013
[4] Q. Tu, Z. Xu, H. Huang and J. Zhang, Parameter Design Principle of the Arm Indcutor in Modular Multilevel Converter based HVDC, International Conference on Power System Technology, 2010.
[5] D. Schmitt, Y. Wang, Th. Weyh and R. Marquardt, DC-side Fault Current Management in extended Multiterminal-HVDC-Grids, 9th International MultiConference on Systems, Signals and Devices, 2012.
[6] Franquelo, L.G.; Rodriguez, J.; Leon, J.I.; Kouro, S.; Portillo, R.; Prats, M.A.M., "The age of multilevel converters arrives," Industrial Electronics Magazine, IEEE , vol.2, no.2, pp.28,39, June 2008
[7] Exploring the Properties of a Modular Multilevel Converter Based HVDC Link With Focus on Voltage Capability, Power System Relations, and Control System Elisabeth Nøkleby Abildgaard,Submission date: June 2012
[8] Auslegung eines modularen Mehrpunktumrichters fur Traktionsanwendungen von Till-Mathis Plotz, Uni-Rostock, August 2015
°
[9] Harmonic detection and ltering Low voltage expert guides n
4, Schneider
Electric Industries SAS, 04-2008
[10] Arm Inductance and Sub-module Capacitance Selection in Modular Multilevel Converter Yalong Li, The University of Tennessee, Knoxville, December 2013
[11] Cell Capacitor Sizing in Multilevel Converters: Cases of the MMC and AAC
¨
Micha el M. C. Merlin, Tim C. Green, August 5, 2014
[12] Application Note AN6156-1 September 2014 LN31943 [13] Technical Information IGBT-Module FZ1500R33HE3
63
[14] Technical Information IGBT-Module FF1400R12IP4 [15]
© Hitachi Power Semiconductor Device Ltd. 12 2015. All rights reserved. th
Mar.'15 LD-ES-150379 Thermal Equivalent Model of IGBT Modules
[16] Temperature-Dependent Thermal Model of IGBT Modules Suitable for CircuitLevel Simulations Rui Wu, IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 52, NO. 4, JULY/AUGUST 2016
[17] Application Note 5SYA 2093-00 Thermal design and temperature ratings of IGBT modules
[18] Rainer Marquardt, Yeqi Wang Institute for Power Electronics and Control (IPEC) University of Bundeswehr Munich, Germany
[19] http://www.siemens.com/press/pool/de/materials/industry/imo/velaro_e_en.pdf. [20] Proc. of the EPRI Power Quality Issues & Opportunities Conference (PQA'93), San Diego, CA, November 1993
64
65
Annexes
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