LLC Resonant Converter With Matrix Transformer - IEEE Xplore

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 8, AUGUST 2014

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LLC Resonant Converter With Matrix Transformer Daocheng Huang, Shu Ji, and Fred C. Lee, Life Fellow, IEEE

Abstract—In this paper, a high-efficiency high power density LLC resonant converter with a matrix transformer is proposed. A matrix transformer can help reduce leakage inductance and the ac resistance of windings so that the flux cancellation method can then be utilized to reduce core size and loss. Synchronous rectifier (SR) devices and output capacitors are integrated into the secondary windings to eliminate termination-related winding losses, via loss and reduce leakage inductance. A 1 MHz 390 V/12 V 1 kW LLC resonant converter prototype is built to verify the proposed structure. The efficiency can reach as high as 95.4%, and the power density of the power stage is around 830 W/in3 . Index Terms—Flux cancellation, LLC resonant converter, magnetic integration, matrix transformer.

I. INTRODUCTION NERGY saving and cost reduction are becoming more and more important for today’s industry, causing efficiency and power density to become major driving forces in modern power delivery systems [1]–[3]. Hard switching pulsewidth modulation (PWM) converters are common in power supplies; however, they suffer high switching losses. Low efficiency and low power density are the major drawbacks. Soft-switching techniques can help the PWM circuit achieve zero-voltage switching (ZVS) so that lower switching loss and higher frequency can be accomplished. Nevertheless, for computing and consumer electronics applications, such as servers, laptops, telecom, etc., a holdup time operation is required. Conventional PWM converters have to sacrifice normal operation efficiency in order to extend the operation range [4]– [6]. As shown in Fig. 1, LLC type resonant converters are excellent for both efficiency and power density [7]–[14]. They have a ZVS capability for zero to full load range and a low turn off current that is achievable for primary-side switches. At the same time, synchronous rectifier (SR) devices are zero-currentswitching (ZCS). At the end, it gets voltage gain boost capability

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Manuscript received July 23, 2013; revised October 6, 2013; accepted November 8, 2013. Date of current version March 26, 2014. This work was supported by the Power Management Consortium (PMC) in the Center for Power Electronics Systems, Virginia Tech. Recommended for publication by Associate Editor K.-H. Chen. D. Huang and F. C. Lee are with The Bradley Department of Electrical and Computer Engineering, Center for Power Electronics Systems, Virginia Polytechnic Institute and State University (Virginia Tech), Blacksburg, VA 24061 USA (e-mail: [email protected]; [email protected]). S. Ji was with The Bradley Department of Electrical and Computer Engineering, Center for Power Electronics Systems, Virginia Polytechnic Institute and State University (Virginia Tech), Blacksburg, VA 24061 USA. He is now with Texas Instruments Incorporated, Dallas, TX 75266-0199 USA (e-mail: [email protected]) Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TPEL.2013.2292676

Fig. 1.

LLC Resonant Converter.

without efficiency deterioration in a normal condition, suitable for applications with a hold-up time requirement. In comparison with soft-switching PWM converters, LLC resonant converters can achieve a higher frequency and a higher power density with better efficiency. High switching frequency introduces high power density. However, the switching loss and magnetic components losses are increased. The emerging GaN devices [17]–[19] provide the opportunity to diminish the switching-related loss. Hence, the magnetic design becomes very critical. Isolated high output current dc/dc applications, like a server, may suffer very high conduction loss, especially for transformer and SR devices [20], [21]. Paralleling SR devices are required to reduce device conduction loss. For winding loss, the matrix transformer is a good candidate for its high current capability [22]. However, the price paid for the matrix transformer is multiple cores. Reference [23] uses the flux cancellation method to reduce the core number for less core volume and core loss. The drawbacks are an expensive 12-layer PCB board as transformer windings and the large conduction loss from alternative current through vias among PCB layers. To eliminate the ac conduction loss among layers, one effective way is to mount MOSFET devices on the PCB board [24], [25]. This structure can dramatically help reduce conduction loss between layers. Both transformer structures have litz wires as primary-side windings and the PCB board for secondary-side windings. The primary windings are complicated and hard to manufacture. This paper studies the high-frequency, high-efficiency LLC resonant converter with matrix transformer. Several concepts are proposed to reveal the essence of the high-frequency high turns ratio transformer design. The matrix transformer is utilized to reduce the leakage inductance and winding loss. To reduce the size and loss of multiple cores for the matrix transformer, the flux cancellation method is employed. In order to minimize the termination-related loss, SR devices and output capacitors are integrated with secondary windings. All transformer windings use only a four-layer PCB board. No litz wire is applied. Several winding structures are discussed to tradeoff the interleaving effect and termination loss. The detail analysis

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is verified by the finite element analysis (FEA). According to the investigation, the optimal transformer structure is proposed. At the end, the theoretical analysis and the proposed optimal transformer design are verified by a 1 kW, 1 MHz, 390 V/12 V LLC resonant converter prototype. II. MATRIX TRANSFORMER WITH FLUX CANCELLATION For high-frequency, high-step-down LLC resonant converters, the transformer loss dominates the whole converter loss [20]–[25], thus, the transformer design is very critical. For a conventional wired transformer, the primary-side windings are solid or multistrand wires for low switching frequency and low cost design. At high frequency, litz wires are chosen for a lower conduction loss. For off-line dc–dc converters, the secondary-side current is much higher than the primary side. Therefore, copper foils are selected for the secondary-side winding. To alleviate ac winding loss, the primary-side and the secondary-side windings are interleaved as a sandwich structure. Mostly, the secondary-side windings are connected with the motherboard via copper poles. However, this structure suffers high termination losses due to the proximity effect and the current surges in the ac connection terminals. Meanwhile, because of the skin effect very little current goes through the center of the terminals thus causing very high losses and generating hot spots [24]. In [25], the secondary-side windings are integrated with the SR devices on the PCB board. Virtually, termination is achieved at dc output so the termination loss can be reduced considerably. However, there are some limitations. The primary-side and secondary-side windings are interleaved as one. For each cell, the primary-side winding is connected in series. To finish the whole transformer, multiple cells are connected in parallel. As a result, this structure becomes very complicated. In addition, since all primary-side and secondary-side windings are paralleled, current sharing between windings might be a potential issue for some circumstances, especially for high current applications. This transformer structure is simplified by [24]. The primaryside windings are placed in series, and the secondary windings in parallel. However, the manufacturing process is still complicated because of the half litz wires half PCB board transformer. The current sharing among each paralleled secondaryside windings is not guaranteed either. The planar transformer is easily adapted to an automatic manufacturing process [21]. A high power density and low profile transformer is also achievable. Mostly, a multilayer PCB board is used as the planar transformer windings. The primary and secondary-side windings interleaves as a sandwich structure. Nevertheless, it is hard to integrate SR devices on secondaryside windings inside the PCB board. The matrix transformer may help to fix the dilemma. The matrix transformer is defined as an array of elements interwired so that the whole functions as a single transformer [22]. Each element being a single transformer that contains a set turns ratio, i.e. 1:1, 2:1 . . ..n:1. The desired turns ratio is obtained by connecting the primary windings of the elements in series or

Fig. 2.

LLC resonant converter with four sets output.

parallel and the secondary’s in series or parallel. For the high output current cases only a single turn secondary will be considered. The benefits of the matrix transformer are that it can split current between secondary windings connected in parallel, reduce leakage inductance by lowering the N2 value of the secondary loop inductance, and improve thermal performance by distributing the power loss throughout the elements. On the other hand, the matrix transformer structure also can effectively reduce the magnetomotive force (MMF) of the windings, especially for the PCB winding. That also means a reduction in leakage inductance and winding ac resistance. Fig. 2 shows one typical example of a 400 V/12 V 1 kW LLC resonant converter. The GaN HFETs Q1 and Q2 are primary devices. SR1, SR2, etc., are SR devices. The resonant capacitor is Cr. Lr is the leakage inductance of the transformer, while Lm is the magnetizing inductance. The transformer turns ratio is 16:1:1. Based on the optimized loss of SR devices, four sets of center-tap output are chosen. The detail reasons are discussed in [22]. Fig. 3 shows the planar transformer structure employing Fig. 2 circuit with one core structure and a 12-layer PCB board as the transformer windings. The primary-side winding is in series, and the secondary side in parallel. All the windings are wrapped around the single core. The 12-layer PCB windings can be divided into 4 sections. Each section has three PCB layers; two layers for the secondary winding with the center one for the primary side. As indicated in Fig. 3, when secondary winding 1 conducts, the secondary winding 2 does not conduct due to the center-tap structure. The current direction for the first and second layers of the PCB board is marked. The other sections are similar. The MMF between primary and secondary windings is four times the primary-side current, as shown in Fig. 3. Fig. 4 shows the PCB winding structure employing the matrix transformer concept. The current direction for the first three PCB layers are shown, other layers are similar. The primary and secondary windings wrap on two cores. The MMF between

HUANG et al.: LLC RESONANT CONVERTER WITH MATRIX TRANSFORMER

Fig. 3.

Twelve-layer PCB structure with one core and its MMF.

Fig. 4.

Twelve-layer PCB structure with two cores and its MMF.

primary and secondary windings is only twice that of the primary current, as indicated in Fig. 4. Low MMF means low leakage inductance and low ac resistance of windings. However, a 12-layer PCB board is seldom used in most front end applications, like server, telecom, etc. The four-layer PCB board is widely employed. Thus, a matrix transformer based on a four-layer PCB board is adopted. The whole transformer is split into four small transformers, whose primary side is in series and secondary side in parallel. Each small transformer has four turns primary windings and two turns center-tap secondary windings as indicated in Fig. 5. As shown in Fig. 6, two PCB layers are taken for primary windings at the top and bottom, and the inner two layers for secondary windings. At this instant, the secondary winding 1 and primary windings are conducted. The MMF between primary and secondary windings are only twice the primary current, which is very similar to the MMF on the 12-layer structure in Fig. 4. Consequently, a low MMF means a low ac winding resistance and a low leakage inductance of transformer. At the same time, the current sharing among the secondary side is automatically achieved by the structure of the primary winding in series and the secondary winding in parallel. When low MMF is achieved, the core loss is increased because of multiple cores. The flux excursion for each transformer core is the same in each matrix element as the traditional transformer mentioned in Fig. 7. The primary winding pattern with

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Fig. 5.

LLC Resonant converter with matrix transformer structure.

Fig. 6.

Four-layer PCB structure with four cores and its MMF.

Fig. 7.

Primary-side winding pattern with four U-I cores matrix transformer.

four magnetic cores in Fig. 5 is shown in Fig. 7. Just one of two primary winding layers is shown for simplicity. The other layer winding pattern is similar. It is widely known that using integrated magnetic structures can allow for flux cancellation [21]. The matrix transformer configuration offers an ideal case for magnetic integration that results in the cores being excited with identical voltage-second generating the same flux in each core. This allows for almost complete flux cancellation if designed properly and can decrease overall size and core loss. The primary-side winding is rearranged to reverse the flux direction of core 2 and core 4 in Fig. 8. Hence, the U-I core 1 and core 2 can both turn 90◦ and merge into E-I core 1 , while core 3 and core 4 can merge into core 2 , as shown in Fig. 9. The flux density in each core is the same because the voltage-second is the same and, the magnetic flux in center leg of core 1 can be

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Fig. 8.

Rearranged primary-side winding pattern with four U-I cores.

Fig. 9.

Primary-side winding pattern for two E-I core matrix transformer.

Fig. 10. Primary-side winding pattern for two core matrix transformer with flux cancellation.

Fig. 11.

LLC resonant converter with proposed transformer structure.

cancelled, as can core 2 . Thus, the flux density in the center leg is nearly zero. The center leg of two E-I cores actually can be reaped, so that two U-I cores are obtained, as shown in Fig. 10. By flux cancellation, four U-I cores of the matrix transformer can be reduced to two U-I cores. The core loss and core size can be reduced by more than 30%. Then, the whole circuit is as shown in Fig. 11. III. PCB WINDINGS INTEGRATED WITH SR DEVICES As mentioned earlier, the planar matrix transformer has only a four-layer PCB board as windings and is easily manufactured.

Fig. 12.

Top view of the first winding arrangement.

Fig. 13.

Cross view of the first winding arrangement and its MMF.

It also can effectively reduce leakage inductance and winding ac resistance with low MMF compared to the traditional single transformer design. Meanwhile, the flux cancellation method will help reduce the size and loss of the magnetic cores. For better efficiency, the transformer winding structure needs more improvement. In [18], [19], we know the termination of the secondary-side windings introduces a large ac conduction loss. To eliminate the ac loss introduced by termination, SR devices need to be integrated into the secondary-side windings [21]. However, [21] does not provide the detail loss analysis and optimal winding design. The following discussion gives insight analysis and optimal transformer design to the previous proposed matrix transformer structure. The matrix transformer structure shown in Fig. 11 has two parts. Each part has eight turns primary windings in series, two sets center-taped secondary windings in parallel, and one set of U-I core. These two parts are also in series at the primary side and in parallel at the secondary side. There are two options for the winding arrangement. The first one shown in Fig. 6 has a good interleaving structure. The winding structure of one U-I core indicated in Fig. 11 as a dashed box is shown in Figs. 12 and 13. The top view is shown in Fig. 12, and the side view is shown in Fig. 13. Primary windings are located at the top and bottom side of the PCB board. For one half circle of the switching period, the primary winding conducts current, while the secondary winding 1 (Sec1) conducts and secondary winding 2 (Sec2) does not. The MMF of this structure is shown in Fig. 13. However, the secondary


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Fig. 14. AC current distribution for secondary winding of the first winding arrangement.

windings need vias and an external terminal to connect the SR devices on top and bottom layers, as indicated in Fig. 12. The Maxwell three-dimensional (3-D) FEA simulation is applied to estimate the leakage inductance and ac resistance of the transformer windings. Fig. 14 shows the FEA simulation results of the ac current distribution for the secondary side of the transformer. The dashed arrows express the ac current direction as current flows out of the secondary winding and into the SR device and capacitors. It is clear that there is severe current crowding along the terminal connecting SR device and capacitors. The reason is that the termination does not interleave with the primary winding, thus, the ac currents in the opposite direction will attract each other along the edge. The dotted box is where the vias connect the middle layer secondary windings and the top layer. The current among vias is not even. The simulation result of one U-I core transformer is given in Fig. 15. The secondary-side ac resistance including termination is Rsec = 6.81 mΩ, and the leakage inductance is Lk = 176.4 nH. If the transformer secondary side is cut off as the dashed line indicates in Fig. 15(a) and shorted by the copper bar at the cut port. Fig. 16 is the simulation result. The secondary-side ac resistance is Rsec = 3.35 mΩ, and the leakage inductance Lk = 58.0 nH. This phenomenon means the ac resistance of termination including via is 3.46 mΩ, and the leakage inductance 118.4 nH. However, there are opposite direction currents flowing in and out of the shorted port, which will also cause current crowding. Fig. 17 shows the simulation result for the secondary winding totally shorted, which means that no ac current flows out and into the secondary winding, and there is no termination loss. The ac current direction is shown in the solid line in Fig. 17. The ac resistance is Rsec = 1.37 mΩ, and the leakage inductance Lk = 36.6 nH. Compared with Fig. 15, the ac resistance of the secondary winding with termination is 4 times larger than the one without termination. Based on previous analysis, the lossy parts of the first winding arrangement are the terminal and the vias, which connect the secondary windings, SR devices and output capacitors. To eliminate this termination-related loss, the second winding ar-

Fig. 15. FEA simulation for the first winding arrangement. (a) Current density distribution. (b) Magnetic field intensity plot.

Fig. 16. FEA simulation for the first winding arrangement with output shorted. (a) Current density distribution. (b) Magnetic field intensity plot.

rangement is proposed whose SR devices and output capacitors are integrated into secondary windings. For this one, no extra terminal is needed for devices and capacitors connection. The devices and capacitors are naturally part of the secondary-side windings. The ac current loop of the secondary winding exactly

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Fig. 17. FEA simulation for the first winding arrangement with secondary winding shorted. (a) Current density distribution. (b) Magnetic field intensity plot.

Fig. 18.

Top view of the second winding arrangement.

Fig. 19.

Cross view of the second winding arrangement.

matches those of the primary-side winding. There is no ac current flowing out and into the secondary-side windings, thus no extra ac current loss is introduced. The second winding arrangement is proposed in Figs. 18 and 19. The secondary windings are located at the top and bottom side of the PCB board. The SR MOSFETs and output capacitors are part of secondary windings. In Fig. 19, the MMF between windings is higher than that of the first winding arrangement in Fig. 13, which means that this winding structure has an inferior interleaving. The FEA simulation results are given in Fig. 20. The secondary-side ac resistance is Rsec = 2.08 mΩ, and the leakage inductance Lk = 63.4 nH. Although the first winding arrangement has better interleaving, its ac resistance and leakage

Fig. 20. FEA simulation for the second winding arrangement. (a) Current density distribution. (b) Magnetic field intensity plot.

inductance are much higher than the second one. That means the termination loss is much larger than the loss saved by the better interleaving structure. In the first winding arrangement, the SR devices connect the secondary-side winding by vias and an external connection, which causes a huge ac conduction loss. The second reason (what is the first reason?) is that its primary winding and secondary winding are not exactly a match for each other. When the windings do not overlap very well, the leakage flux induced by those parts will force the current to crowd to the edge of windings as shown in the red part in Figs. 15 and 16. In the second winding arrangement, the SR devices are integrated into secondary windings; thus, there is no termination loss. The primary and secondary windings are exactly overlapped, so there is very little current crowding anywhere in this case as shown in Fig. 20(a). IV. EXPERIMENTAL RESULTS A 1 MHz, 390 V/12 V, 1 kW LLC resonant converter prototype with proposed matrix transformer structure is built. The second winding arrangement is applied. The circuit is shown in Fig. 21, while the hardware picture is shown in Fig. 22. This prototype operates as a dc/dc transformer; in other words, its switching frequency is fixed at resonant frequency. The primary devices are Transphorm GaN HEMTs. For better efficiency, two GaN devices are paralleled so there are four devices at the primary side. The SR devices are BSC010N04LSI from Infineon. The core material is 3F45. The magnetizing and leakage inductance are used as resonant elements, which are integrated into matrix transformer. The leakage inductance of the matrix transformer is 220 nH, while the magnetizing inductance


Fig. 21.

Fig. 22.

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Circuit of 1 kW, 390 V/12 V LLC resonant converter prototype. Fig. 23.

Experimental waveforms for 15% load condition.

Fig. 24.

Experimental waveforms for 100% load condition.

Fig. 25.

Efficiency for 1 MHz, 1 kW, 390 V/12 V prototype.

Prototype of 1 kW, 390 V/12 V LLC resonant converter.

is 17.6 μH. The resonant capacitor is 70 nF. The power density of the power stage is around 830 W/in3 . Figs. 23 and 24 show the waveforms under 15% and 100% load. Vds Q2 is the drain–source voltage waveform of the primary device Q2 . ICr is the current through resonant capacitor Cr . Even as high as 1 MHz switching frequency, the primaryside devices can easy achieve ZVS. The oscillation during dead time is caused by the leakage inductance and secondary rectifier’s junction capacitance. The turnoff current is as low as 2 A. The whole converter efficiency can reach as high as 95.4% shown in Fig. 25. One more thing that needs to be clarified is that the advantage of GaN devices is smaller Coss compared with Si MOSFET having the same Rdson . That will result in a lower turn off current, which helps to achieve ZVS. Lower turn off current means less circulating energy in the circuit. Thus, the major loss reduction parts caused by GaN device are the conduction loss and driving loss of the primary devices and the conduction loss of primary winding of transformer while the major loss saving by the new transformer structure is the secondary-side winding

conduction loss and termination loss. The detail analysis for GaN device benefits is described in [25]. Based on previous Maxwell 3-D simulation, the new winding structure can save more than 60% secondary-side winding loss under full load. More than 20% of total loss is reduced. The detail loss breakdown for 100% load and 15% load are given in Tables I and II. It is clear to see that the major loss is distributed around the transformer and the secondary rectifier devices at full load. V. CONCLUSION To deal with the high output current applications, a matrix transformer structure helps reduce the leakage inductance and winding ac resistance of the transformer. The price for this is

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TABLE I LOSS BREAKDOWN OF PROTOTYPE UNDER 100% LOAD

TABLE II LOSS BREAKDOWN OF PROTOTYPE UNDER 15% LOAD

the rising of the cores loss and volume due to multiple magnetic cores. Flux cancellation also reduces core size and core loss so the SR devices and output capacitors are integrated into the secondary-side windings to eliminate the termination loss. A high-efficiency high power density matrix transformer structure based on a previous discussion is proposed. The FEA simulation results validate the benefits of the proposed structure. A 1 MHz, 390 V/12 V, 1 kW LLC resonant converter prototype is built to verify the proposed structure. REFERENCES [1] M. M. Jovanovic, “Technology drivers and trends in power supplies for computer/telecom,” in Proc. APEC, 2006, Plenary session presentation. [2] Efficient power supplies for data center and enterprise servers [Online]. Available: www.80plus.org [3] F. C. Lee, P. Barbosa, P. Xu, J. Zhang, B. Yang, and F. Canales, “Topologies and design considerations for distributed power system applications,” in Proc. IEEE, Jun. 2001, vol. 89, no. 6, pp. 939–950. [4] W. Chen, F. C. Lee, M. M. Jovanovic, and J. A. Sabate, “A comparative study of a class of full bridge zero-voltage-switched PWM converters,” in Proc. IEEE APEC, vol. 2, 1995, pp. 893–899. [5] X. Ruan and Y. Yan, “Soft-switching techniques for PWM full bridge converters,” in Proc. IEEE PESC, vol. 2, 2000, pp. 634–639. [6] J. G. Cho, J. A. Sabate, G. Hua, and F. C. Lee, “Zero voltage and zero current switching full bridge PWM converter for high power applications,” in Proc. IEEE PESC, 1994, pp. 102–108.

[7] G. Huang, A. J. Zhang, and Y. Gu, “LLC series resonant DC-to-DC converter,” U.S. Patent 6 344 979, Feb. 5, 2002. [8] B. Yang, F. C. Lee, A. J. Zhang, and G. Huang, “LLC resonant converter for front end dc/dc conversion,” in Proc. IEEE APEC, 2002, pp. 1108– 1112. [9] B. Yang, Y. Ren, and F. C. Lee, “Integrated magnetic for LLC resonant converter,” in Proc. IEEE APEC, 2002, pp. 346–351. [10] Bo Yang, “Topology investigation for front end DC/DC power conversion for distributed power system,” Ph.D. dissertation, Dept. ECE, Virginia Tech, Blacksburg, VA, USA, 2003. [11] Y. Gu, Z. Lu, L. Hang, Z. Qian, and G. Huang, “Three-level LLC series resonant DC/DC converter,” IEEE Trans. Power Electron., vol. 20, no. 4, pp. 781–789, Jul. 2005. [12] D. Fu, Y. Liu, F. C. Lee, and M. Xu, “A novel driving scheme for synchronous rectifiers in LLC resonant converters,” IEEE Trans. Power Electron., vol. 24, no. 5, pp. 1321–1329, May 2009. [13] Xinke Wu, Chen Hu, Junming Zhang, and Chen Zhao, “Series–parallel autoregulated charge-balancing rectifier for multioutput light-emitting diode driver,” IEEE Trans. Ind. Electron., vol. 61, no. 3, pp. 1262–1268, Mar. 2014. [14] Xinke Wu, Guichao Hua, Junming Zhang, and Zhaoming Qian, “A new current-driven synchronous rectifier for series–parallel resonant (LLC) DC–DC converter,” IEEE Trans. Ind. Electron., vol. 58, no. 1, pp. 289– 297, Jan. 2011. [15] D. Huang, D. Fu, F. C. Lee, and P. Kong, “High-frequency high-efficiency CLL resonant converters with synchronous rectifiers,” IEEE Trans. Ind. Electron., vol. 58, no. 8, pp. 3461–3470, Aug. 2011. [16] D. Huang, F. C. Le, and D. Fu, “Classification and selection methodology for multi-element resonant converters,” in Proc. IEEE APEC 2011, Mar. 6–11, 2011, pp. 558–565. [17] International Rectifier. (Feb. 2010). GaNpowIR—An introduction [Online]. Available: http://www.IRF.com [18] International Rectifier. iP2010PbF—High frequency GaN-based integrated power stage [Online]. Available: http://www.IRF.com [19] Efficient Power Conversion. EPC1015—Enhancement mode power transistor [Online]. Available: www.EPC.com [20] R. Prieto, J. A. Cobos, O. Garcia, P. Alou, and J. Uceda, “Taking into account all the parasitic effects in the design of magnetic components,” in Proc. 13th Annu. Appl. Power Electron. Conf. Exp., vol. 1, Feb. 15–19, 1998, pp. 400–406. [21] N. Dai and F. C. Lee, “Edge effect analysis in a high-frequency transformer,” in Proc. 25th Annu. IEEE Power Electron. Spec. Conf., Rec., vol. 2, Jun. 20–25, 1994, pp. 850–855. [22] E. Herbert, “Design and application of matrix transformers and symmetrical converters,” presented at High Freq. Power Convers. Conf., Santa Clara, CA, USA, May 1990. [23] D. Reusch and F. C Lee, “High frequency bus converter with low loss integrated matrix transformer,” in Proc. IEEE APEC 2012, Feb. 5–9, pp. 1392–1397. [24] D. Fu, F. C. Lee, and Shuo Wang, “Investigation on transformer design of high frequency high efficiency dc–dc converters,” in Proc. IEEE APEC 2010, Feb. 21–25, pp. 940–947. [25] C. Yan, F. Li, J. Zeng, T. Liu, and J. Ying, “A novel transformer structure for high power, high frequency converter,” in Proc. IEEE PESC 2007, pp. 940–947, Jun. 17–21. [26] D. Fu, “Topology investigation and system optimization of resonant converters,” Ph.D. dissertation [27] X. Huang, Q. Li, Z. Liu, and F. C. Lee, “Analytical loss model of high voltage GaN HEMT in cascode configuration,” IEEE Trans. Power Electron., vol. PP, no. 99.

Daocheng Huang received the B.S. and M.S. degrees in electrical engineering from Huazhong University of Science and Technology, Wuhan, China, in 2005 and 2007, respectively. He is currently working toward the Ph.D. degree from Virginia Polytechnic Institute and State University, Blacksburg, VA, USA. His current research interests include highfrequency power conversion, soft-switching techniques, magnetic design, passive integration, distributed power systems, and datacenter power conversion techniques.


Shu Ji received the B.S. degree in electrical engineering and automation from the Nanjing University of Aeronautics and Astronautics, Nanjing, China, in 2001, and the M.S. degree in electrical engineering from Zhejiang University, Hangzhou, China, in 2005, and from Virginia Tech, Blacksburg, USA, in 2013, respectively. He joined Texas Instruments Incorporated, Dallas, USA, in 2013, as a System Engineer. Before he came to TI, he was a Senior Electrical Engineer at Bel Power Inc. from 2001 to 2009, and a Research Associate at the Center for Power Electronics Systems (CPES), Virginia Tech, from 2009 to 2013. His current research interests are high-efficiency isolated and nonisolated converters, high power density module packaging and integration, high temperature converter, resonant converters, LED driver, battery management, and power architecture.

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Fred C. Lee (S’72–M’74–SM’87–F’90–LF’12) received the B.S. degree in electrical engineering from the National Cheng Kung University, Tainan City, Taiwan, in 1968, and the M.S. and Ph.D. degrees in electrical engineering from Duke University, Durham, NC, USA, in 1972 and 1974, respectively. He is currently a University Distinguished Professor at Virginia Polytechnic Institute and State University (Virginia Tech), Blacksburg, USA, and the Founder and Director of the Center for Power Electronics Systems, an engineering research center consisting of 80 corporations. The mission of the center is “to provide leadership through global collaboration to create electric power processing systems of the highest value to society.” His current research interests include high-frequency power conversion, magnetics and EMI, distributed power systems, renewable energy, power quality, high-density electronics packaging and integration, and modeling and control. He holds 72 U.S. patents and has authored or coauthored more than 250 journal articles and more than 640 refereed technical papers. During his tenure at Virginia Tech, he has supervised to completion 75 Ph.D. and 83 Master’s students. Dr. Lee was the President of the IEEE Power Electronics Society (1993– 1994) and is a recipient of the William E. Newell Power Electronics Award in 1989; the PCIM Award for Leadership in Power Electronics Education presented at HFPC in 1990; the Arthur E. Fury Award for Leadership and Innovation in 1998; the Honorary Sun Yuen Chuan Chair Professor from National Tsing Hua University, Taiwan in 2001; the Ernst-Blickle Award sponsored by SEWEURODRIVE FOUNDATION in 2005; the Distinguished Alumni Award from National Cheng Kung University in 2006; the Honorary Li Kwoh-Ting Chair Professor, National Cheng Kung University in 2011; and the inaugutal member of the Virginia Tech Entrepreneur Hall of Fame in 2012. He is a member of the U.S. National Academy of Engineering and an Academician of the Academia Sinica.