olithic instrumentation amplifier. Its current-feedback circuitry achieves very wide
bandwidth and excellent dynamic response over a wide range of gain. It is ideal.
INA163
SBOS177D – NOVEMBER 2000 – REVISED MAY 2005
Low-Noise, Low-Distortion INSTRUMENTATION AMPLIFIER FEATURES
DESCRIPTION
● ● ● ● ● ● ●
The INA163 is a very low-noise, low-distortion, monolithic instrumentation amplifier. Its current-feedback circuitry achieves very wide bandwidth and excellent dynamic response over a wide range of gain. It is ideal for low-level audio signals such as balanced lowimpedance microphones. Many industrial, instrumentation, and medical applications also benefit from its low noise and wide bandwidth. Unique distortion cancellation circuitry reduces distortion to extremely low levels, even in high gain. The INA163 provides near-theoretical noise performance for 200Ω source impedance. Its differential input, low noise, and low distortion provide superior performance in professional microphone amplifier applications. The INA163’s wide supply voltage, excellent output voltage swing, and high output current drive allow its use in high-level audio stages as well. The INA163 is available in a space-saving SO-14 surface-mount package, specified for operation over the –40°C to +85°C temperature range.
LOW NOISE: 1nV/√Hz at 1kHz LOW THD+N: 0.002% at 1kHz, G = 100 WIDE BANDWIDTH: 800kHz at G = 100 WIDE SUPPLY RANGE: ±4.5V to ±18V HIGH CMR: > 100dB GAIN SET WITH EXTERNAL RESISTOR SO-14 SURFACE-MOUNT PACKAGE
APPLICATIONS ● PROFESSIONAL MICROPHONE PREAMPS ● MOVING-COIL TRANSDUCER AMPLIFIERS ● DIFFERENTIAL RECEIVERS ● BRIDGE TRANSDUCER AMPLIFIERS
VO1 1 INA163 VIN−
4 3
6kΩ
6kΩ
A1
Sense 8
3kΩ
RG
A3 3kΩ
VO
9
G=1+ 12 VIN+
6kΩ
6kΩ
A2
6000 RG
Ref 10
5 14 VO 2
11 V+
6 V−
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright © 2000–2005, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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ELECTROSTATIC DISCHARGE SENSITIVITY
PIN CONFIGURATION Top View
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. VO1
1
14 VO2
NC
2
13 NC
GS1
3
12 GS2
VIN−
4
11 V+
VIN+
5
10 Ref
V−
6
9
VO
NC
7
8
Sense
NC = No Internal Connection
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS(1) Power Supply Voltage ....................................................................... ±18V Signal Input Terminals, Voltage(2) .................. (V–) – 0.5V to (V+) + 0.5V Current(2) .................................................... 10mA Output Short-Circuit to Ground ............................................... Continuous Operating Temperature .................................................. –55°C to +125°C Storage Temperature ..................................................... –55°C to +125°C Junction Temperature .................................................................... +150°C Lead Temperature (soldering, 10s) ............................................... +300°C NOTES: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails should be current limited to 10mA or less.
PACKAGE/ORDERING INFORMATION(1) PRODUCT
PACKAGE-LEAD
DESIGNATOR
MARKING
INA163UA
SO-14 Surface Mount
D
INA163UA
NOTE: (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this document, or see the TI web site at www.ti.com.
INA163 2
www.ti.com
SBOS177D
ELECTRICAL CHARACTERISTICS: VS = ±15V TA = +25°C and at rated supplies, VS = ±15V, RL = 2kΩ connected to ground, unless otherwise noted. INA163UA PARAMETER
CONDITIONS
MIN
GAIN Range Gain Equation(1) Gain Error, G = 1 G = 10 G = 100 G = 1000 Gain Temp Drift Coefficient, G = 1 G > 10 Nonlinearity, G = 1 G = 100 INPUT STAGE NOISE Voltage Noise fO = 1kHz fO = 100Hz fO = 10Hz Current Noise fO = 1kHz
1 to 10000 G = 1 + 6k/RG ±0.1 ±0.2 ±0.2 ±0.5 ±1 ±25 ±0.0003 ±0.0006
INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection, G = 1 G = 100
MAX
UNITS V/V
±0.25 ±0.7
±10 ±100
% % % % ppm/°C ppm/°C % of FS % of FS
RSOURCE = 0Ω
OUTPUT STAGE NOISE Voltage Noise, fO = 1kHz INPUT OFFSET VOLTAGE Input Offset Voltage vs Temperature vs Power Supply
TYP
VCM = VOUT = 0V TA = TMIN to TMAX VS = ±4.5V to ±18V VIN+ – VIN– = 0V VIN+ – VIN– = 0V VCM = ±11V, RSRC = 0Ω
1 1.2 2
nV/√Hz nV/√Hz nV/√Hz
0.8
pA/√Hz
60
nV/√Hz
50 + 2000/G 1 + 20/G 1 + 50/G (V+) – 4 (V–) + 4 70 100
INPUT BIAS CURRENT Initial Bias Current vs Temperature Initial Offset Current vs Temperature
250 + 5000/G 3 + 200/G
(V+) – 3 (V–) + 3 80 116 2 10 0.1 0.5
µV µV/°C µV/V V V dB dB
12 1
µA nA/°C µA nA/°C
INPUT IMPEDANCE
DYNAMIC RESPONSE Bandwidth, Small Signal, –3dB, G = 1 G = 100 Slew Rate THD+Noise, f = 1kHz Settling Time, 0.1% 0.01% Overload Recovery OUTPUT Voltage Load Capacitance Stability Short-Circuit Current POWER SUPPLY Rated Voltage Voltage Range Current, Quiescent
Differential Common-Mode
60 2 60 2
MΩ pF MΩ pF
G = 100 G = 100, 10V Step G = 100, 10V Step 50% Overdrive
3.4 800 15 0.002 2 3.5 1
kHz V/µs % µs µs µs
(V+) – 1.8 (V–) + 1.8 1000 ±60
V V pF mA
RL = 2kΩ to Gnd
(V+) – 2 (V–) + 2
Continuous-to-Common
±4.5 IO = 0mA
TEMPERATURE RANGE Specification Operating θJA
±15 ±10
–40 –40
±18 ±12 +85 +125
100
V V mA °C °C °C/W
NOTE: (1) Gain accuracy is a function of external RG.
INA163 SBOS177D
www.ti.com
3
TYPICAL CHARACTERISTICS At TA = +25°C, VS = 5V, VCM = 1/2 VS, RL = 25kΩ, CL = 50pF, unless otherwise noted.
GAIN vs FREQUENCY
THD+N vs FREQUENCY
70
0.1
60
VO = 5Vrms RL = 10kΩ
G = 1000
G = 1000
50 G = 100
30 20
0.01
THD+N (%)
Gain (dB)
40
G = 10
10
G = 100 0.001
0
G = 10
G=1
−10
G=1
−20
0.0001 10k
100k
1M
10M
20
100
1k
Frequency (Hz)
NOISE VOLTAGE (RTI) vs FREQUENCY
CURRENT NOISE SPECTRAL DENSITY 10
100
Current Noise Density (pA/√Hz)
Noise (RTI) (nV/√Hz)
1k
G=1
G = 10
10
G = 500 G = 1000
G = 100
1
0.1
1 10
100
1k
10k
1
10
100
Frequency (Hz)
1k
10k
Frequency (Hz)
COMMON- MODE REJECTION vs FREQUENCY
POWER-SUPPLY REJECTION vs FREQUENCY
140
140
G = 1000 Power-Supply Rejection (dB)
120
Input Referred CMR (dB)
10k 20k
Frequency (Hz)
G = 100
100
G = 10
80
G=1 60 40 20 0
120
G = 100, 1000 G = 10
100 G=1 80 60 40 20 0
10
100
1k
10k
100k
1M
1
Frequency (Hz)
10
100
1k
10k
100k
1M
Frequency (Hz)
INA163 4
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SBOS177D
TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VS = 5V, VCM = 1/2 VS, RL = 25kΩ, CL = 50pF, unless otherwise noted.
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
SETTLING TIME vs GAIN
V+
10 20V Step 8
(V+) − 4
Settling Time (µs)
Output Voltage to Rail (V)
(V+) − 2
(V+) − 6 (V−) + 6 (V−) + 4
0.01%
6
4
2
(V−) + 2
0.1% 0
V− 10
20
30
40
50
60
1
10
100 Gain
SMALL-SIGNAL TRANSIENT RESPONSE (G = 1)
SMALL-SIGNAL TRANSIENT RESPONSE (G = 100)
1000
20mV/div
Output Current (mA)
20mV/div
0
LARGE-SIGNAL TRANSIENT RESPONSE (G = 1)
LARGE-SIGNAL TRANSIENT RESPONSE (G = 100)
5V/div
10µs/div
5V/div
2.5µs/div
2.5µs/div
2.5µs/div
INA163 SBOS177D
www.ti.com
5
APPLICATIONS INFORMATION
temperature drift. These effects can be inferred from the gain equation. Make a short, direct connection to the gain set resistor, RG. Avoid running output signals near these sensitive input nodes.
Figure 1 shows the basic connections required for operation. Power supplies should be bypassed with 0.1µF tantalum capacitors near the device pins. The output Sense (pin 8) and output Reference (pin 10) should be low-impedance connections. Resistance of a few ohms in series with these connections will degrade the common-mode rejection of the INA163.
NOISE PERFORMANCE The INA163 provides very low-noise with low-source impedance. Its 1nV/√Hz voltage noise delivers neartheoretical noise performance with a source impedance of 200Ω. The input stage design used to achieve this low noise, results in relatively high input bias current and input bias current noise. As a result, the INA163 may not provide the best noise performance with a source impedance greater than 10kΩ. For source impedance greater than 10kΩ, other instrumentation amplifiers may provide improved noise performance.
GAIN-SET RESISTOR Gain is set with an external resistor, RG, as shown in Figure 1. The two internal 3kΩ feedback resistors are laser-trimmed to 3kΩ within approximately ±0.2%. Gain is: G = 1+
6000 RG
The temperature coefficient of the internal 3kΩ resistors is approximately ±25ppm/°C. Accuracy and TCR of the external RG will also contribute to gain error and
V+ 0.1µF
1 VIN−
4
11 INA163 6kΩ
6kΩ
A1 3
Sense 8
3kΩ A3
RG
9
3kΩ
VO G=1+
12 VIN+
6kΩ
6kΩ
Ref
A2
10
5 14
6 0.1µF
V− V+
RG
6000 RG
GAIN (V/V) (dB) 1 0 2 6 5 14 10 20 20 26 50 34 100 40 200 46 500 54 1000 60 2000 66
RG (Ω) NC(1) 6000 1500 667 316 122 61 30 12 6 3
NOTE: (1) NC = No Connection. Sometimes Shown in Simplified Form:
INA163
VO
V−
FIGURE 1. Basic Circuit Connections.
INA163 6
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SBOS177D
INPUT CONSIDERATIONS
OFFSET VOLTAGE TRIM
Very low source impedance (less than 10Ω) can cause the INA163 to oscillate. This depends on circuit layout, signal source, and input cable characteristics. An input network consisting of a small inductor and resistor, as shown in Figure 2, can greatly reduce any tendency to oscillate. This is especially useful if a variety of input sources are to be connected to the INA163. Although not shown in other figures, this network can be used as needed with all applications shown.
A variable voltage applied to pin 10, as shown in Figure 3, can be used to adjust the output offset voltage. A voltage applied to pin 10 is summed with the output signal. An op amp connected as a buffer is used to provide a low impedance at pin 10 to assure good common-mode rejection.
V+
47Ω
11
VIN− 1.2µH
8 INA163
12
VIN+
6
An output sense terminal allows greater gain accuracy in driving the load. By connecting the sense connection at the load, I • R voltage loss to the load is included inside the feedback loop. Current drive can be increased by connecting a buffer amp inside the feedback loop, as shown in Figure 4.
4 3
1.2µH
OUTPUT SENSE
VO
9 10
+15V
5
47Ω V− 4
11
Sense
FIGURE 2. Input Stabilization Network.
INA163
9 10
5
V+
4
12 5
BW
6
−15V
8 INA163
RG
VO
BUF634
BUF634 connected for wide bandwidth.
11
3
±250mA Output Drive
8
VO
9
V+
10 6
100µA
FIGURE 4. Buffer for Increase Output Current.
V− 150Ω
OPA237 10kΩ
150Ω
100µA
V−
FIGURE 3. Offset Voltage Adjustment Circuit.
INA163 SBOS177D
www.ti.com
7
Phantom Power +48V
R3 47k
+
47 F
+15V R1 6.8k
0.1 F
R2 6.8k 1N4148 C1(1) 47 F 60V +
1 Female XLR Connector
R6(2) 5
3 2
A1 INA163
C2(1) 47 F 60V +
9
VO
10 1M
R7(3) 1k R4 2.2k
8
R5 2.2k
0.1 F
0.1 F 1N4148 A2 OPA134
NOTES: (1) Use non-polar capacitors if phantom power is to be turned off. (2) R6 sets maximum gain. (3) R7 sets minimum gain.
15V 15V
Optional DC Output Control Loop
FIGURE 5. Phantom-Powered Microphone Preamplifier. MICROPHONE AMPLIFIER Figure 5 shows a typical circuit for a professional microphone input amplifier. R1 and R2 provide a current path for conventional 48V phantom power source for a remotely located microphone. An optional switch allows phantom power to be disabled. C1 and C2 block the phantom power voltage from the INA163 input circuitry. Non-polarized capacitors should be used for C1 and C2 if phantom power is to be disabled. For additional input protection against ESD and hot-plugging, four INA4148 diodes may be connected from the input to supply lines. R4 and R5 provide a path for input bias current of the INA163. Input offset current (typically 100nA) creates a DC differential input voltage that will produce an output
offset voltage. This is generally the dominant source of output offset voltage in this application. With a maximum gain of 1000 (60dB), the output offset voltage can be several volts. This may be entirely acceptable if the output is AC-coupled into the subsequent stage. An alternate technique is shown in Figure 5. An inexpensive FET-input op amp in a feedback loop drives the DC output voltage to 0V. A2 is not in the audio signal path and does not affect signal quality. Gain is set with a variable resistor, R7, in series with R6. R6 determines the maximum gain. The total resistance, R6 + R7, determines the lowest gain. A special reverse-log taper potentiometer for R7 can be used to create a linear change (in dB) with rotation.
INA163 8
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SBOS177D
PACKAGE OPTION ADDENDUM www.ti.com
16-Feb-2009
PACKAGING INFORMATION Orderable Device
Status (1)
Package Type
Package Drawing
Pins Package Eco Plan (2) Qty
INA163UA
ACTIVE
SOIC
D
14
INA163UA/2K5
ACTIVE
SOIC
D
INA163UA/2K5E4
ACTIVE
SOIC
INA163UAE4
ACTIVE
SOIC
50
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
14
2500 Green (RoHS & no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
D
14
2500 Green (RoHS & no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
D
14
CU NIPDAU
Level-3-260C-168 HR
50
Green (RoHS & no Sb/Br)
(1)
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
INA163UA/2K5
Package Package Pins Type Drawing SOIC
D
14
SPQ
Reel Reel A0 Diameter Width (mm) (mm) W1 (mm)
2500
330.0
16.4
Pack Materials-Page 1
6.5
B0 (mm)
K0 (mm)
P1 (mm)
9.0
2.1
8.0
W Pin1 (mm) Quadrant 16.0
Q1
PACKAGE MATERIALS INFORMATION www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
INA163UA/2K5
SOIC
D
14
2500
367.0
367.0
38.0
Pack Materials-Page 2
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