Method Of Designing ZVS Boost Converter

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Abstract—The article presents a method of designing multiresonant ZVS boost converter including one transistor based on simulation testing. Dependencies are ...

Method Of Designing ZVS Boost Converter 1)

Mirosław Luft1), Elżbieta Szychta2), Leszek Szychta3)

Technical University of Radom, Radom, Poland, e-mail: [email protected] Technical University of Radom, Radom, Poland, e-mail: [email protected] 3) Technical University of Radom, Radom, Poland, e-mail: [email protected]

2)

Abstract—The article presents a method of designing multiresonant ZVS boost converter including one transistor based on simulation testing. Dependencies are given between parameters of resonant circuit elements and parameters of the control system which condition ZVS operation of the converter. Results of simulation and experimental tests provide grounds for the conclusion that the presented method allows the determination of the values of the resonant circuit elements.

have parameters of real equipment. Supply voltage is E=50V DC.

Keywords—Converter circuit, Resonant converter, ZVS converters.

I. INTRODUCTION Multiresonant ZVS DC/DC converters are resonant circuits where oscillations supporting processes of switching semiconductor elements at zero voltage occur with at least three resonant frequencies in a full operation cycle. High control frequency is the fundamental characteristic of these circuits. Multiresonant ZVS converters are characterised by great energy efficiency ratio, minimum dimensions and minimum electromagnetic and acoustic interference [3]. Power of such converters is usually below 5 kW [1]. These converters are applied, among other uses, in military technology, to supply power to information technology and telematic systems, in transportation systems and many other areas of demand for DC electricity. Interest in the practical potential of these circuits is growing. Designing of multiresonant converters involves necessary application of complex numerical analysis [7], therefore effective methods of designing these circuits, need to be developed. Available research [5] does not cover the problem in full. The article presents a method of designing multiresonant ZVS boost converter including one transistor. The method is based on simulation testing by means of Simplorer software. It enables to design the circuit without recourse to complex numerical analysis. II. TOPOLOGY OF ZVS BOOST MRC Figure 1 presents a simulation model of singletransistor ZVS boost MRC according to Simplorer [2]. The circuit includes models of the following reactive elements: L=7μH, CS=7nF, CD=23nF, LF=600μH CF=10µF, RN=0,5 and RN=1 and models of semiconductor elements: transistor MOSFET IRFP460, diode HFA25TB60. The models of semiconductor elements

Fig.1. ZVS boost MRC

Essentials notation used in the paper [3]: ratio of voltage conversion M: UO E

(1)

M ⋅E RN ⋅ Z S

(2)

M =

load current IO: IO =

load resistance RN in relative units: RN =

R ZS

(3)

characteristic impedance ZS: ZS =

L (CS + COS )

(4)

switching frequency in relative units fN: fN =

f fS

(5)

where: f – MRC’s control frequency fS - resonant frequency of L, (CS+COS) circuit: fS =

1

2π L(CS + COS )

capacitance factor CN:

(6)

CN =

CD + COD CS + COS

(7)

III. ZVS OPERATING REGION The control system of ZVS MRC (Fig. 1) is based on the method of frequency control at the constant time of transistor’s turn-off toff [4]. The transistor’s control modulation ratio β should have such values that MRC’s semiconductor elements are switched at zero voltage (ZVS). β is expressed:

β= where: f =

t on T − t off = = 1 − t off ⋅ f T T

(8)

1 1 = T t on + t off

Fig.2. Determination of fN variation range for M∈, RN ∈

B. Determination of the acceptable ZVS operating region corresponding to the assumptions.

MRC’s ZVS operating region is delimited with curves plotted for minimum βmin and maximum βmax within the acceptable range of fN variation. Minimum values of βmin correspond to maximum time of transistor’s turn-off t off max , while maximum values of βmax correspond to

On the basis of boost MRC’s ZVS operating region, determined by means of simulation testing (Fig.3 and Fig.4), variation ranges of β for the given f N min , f N max and appropriate RN ∈ are determined.

minimum time of transistor’s turn-off t off min . MRC’s ZVS operating region is defined by such values of β that meet the condition:

β max ≥ β ≥ β min

(9)

where minimum t off min and maximum t off max meet the following condition in the full variation range of control frequency fN : t off min ≤ t off ≤ t off max

(10)

Fig.3. Boost MRC’s ZVS operating region for RN=0.5

Following from the ZVS operating region at RN=0.5 IV. METHOD OF SELECTING ELEMENTS OF THE ZVS MRC’S RESONANT CIRCUIT The following sample input data of the boost MRC’s are accepted for selection of the elements: ratio of voltage conversion M∈, load resistance RN in relative units RN∈, supply voltage E=50V, resonant frequency fS, transistor’s drain-source voltage Vds=500V, transistor’s drain current Id=20A. Selection of the resonant circuit elements is an algorithm.

(Fig.3),

11 11 1 β min , β max are obtained with respect to f N min ,

and β min , β max are obtained for f N min . a, b indices in the control modulation ratios of transistor 12

12

2

ab ab β min , β max denote:

a=1; for RN = 0,5, 1 N

b=1; for f = f ,

a=2; for RN = 1 2

b=2; for f = f N

A. Determination of the switching frequency range fN For a given variation range of the voltage conversion ratio M∈, the curves of M (Fig.2) (determined by means of simulation testing) serve to define the range of minimum frequency f N min ∈ ( f N1 min ÷ f N2 min ) at RN=0.5, and the range of maximum frequency 1 2 f N max ∈ ( f N max ÷ f N max ) at RN = 1 .

Fig.4. Boost MRC’s ZVS operating region for RN=1

Following from the ZVS operating region at RN=1 (Fig.4),

21 21 1 22 22 β min , β max result for f N max , and β min , β max

2

are produced in regard of f N max . C. The determination of t off at a constant value

toff = const in the full variation range of control frequency fN at variable values of M and RN. MRC’s ZVS operation at various fN (corresponding to various M) and various values of RN affects tCS of the capacitor’s CS overloading. tCS corresponds to minimum time of transistor’s turn-off toffmin (Fig.5). t off = const in

Fig.6. Ratio β at control with constant time of transistor’s turn-off

t off min 1 , t off min 2 , for M∈, RN=0,5 and RN=1

the full variation range of MRC’s operation must meet the condition (10). On the basis of assumed variation range of M∈ and load resistance RN=0.5 and RN=1, four possible values of toff are obtained (Fig.5): • t off min 1 – determined for M=1,18, RN=1, (point a), •

t off min 2 – determined for M=1,18, RN=0,5, (point b),



t off min 3 – determined for M=1,7, RN =1, (point c),



t off min 4 – determined for M=1,7, RN=0,5, (point d).

t off min 1 =0,87μs fulfils the condition (10) and determines constant time of transistor’s turn-off toff in the assumed range of MRC’s operation. There is a relation between toff and β (8). When (10) is fulfilled by toff, the condition (9) should also be β. Variation of β at met by t off = const = t off min 1 ÷ t off min 4 , is illustrated in Figures 6 and 7.

Fig.7. Ratio β at control with constant time of transistor’s turn-off

t off min 3 , t off min 4 for M∈, RN=0,5 and RN=1 Figures 6 and 7 indicate that

β

is within ZVS

operating region in the full variation range of f N and the conditions (9) and (10) are fulfilled only during control with constant time of transistor’s turn-off t off = t off min 1 . This means that parameters of the resonant circuit L, CS, CD elements should be selected with respect to point a (RN=1) of MRC’s operation. D. Verification of the maximum voltage across the transistor U CS max . Maximum voltage across the transistor U CS max is defined with the aid of control characteristics of the transistor’s maximum voltage UCSmax/E in relative units (Fig.8)

Fig.5. The transistor’s turn-off times t off min for M∈, RN=0,5 and RN=1 (simulation results)

for

f N1 min

and

RN=0,5,

UCSmax/E

≈7 ⇒ U CS max ≈ 350 V, up to the acceptable catalogue value Vds=500V.

Fig.8. Determination of the transistor’s maximum voltage UCSmax/E

E. Verification of the maximum current across the transistor I S max . The transistor’s maximum current I S max is defined with the aid of control characteristics of the transistor’s maximum current ISmax/IO in relative units (Fig.9) for

f N1 min and RN=1, ISmax/IO ≈ 3,7 ⇒ I S max ≈ 11 A, up to the acceptable catalogue value Idkat= 20A.

The control system diagram of the experimental ZVS boost MRC is illustrated in Figure 10 [3].

Fig.10. Control system diagram of the experimental ZVS boost MRC

Fig.8. Determination of the transistor’s maximum current ISmax/IO

F. Determination of reactive element values For a known R, on the basis of (3), (4), (6), inductance L is [3]: L=

1 R 1 2π RN f S

(11)

CS is calculated from (6). For MRC to implement ZVS operation, the following condition must be fulfilled [3]: ⎛ 1 − β max L ≤ ⎜⎜ ⎝ π ⋅ f max

Fig.9. Circuit diagram of the experimental ZVS boost MRC

ZVS operation region On the basis of experimental testing of the system presented in Figure 9, the region of ZVS operation of the multiresonant ZVS boost converter was defined as the dependence β=f(fN), for RN=0.5 and RN=1. Results derived from experimental testing, shown in Figure 11, exhibit conformity with results obtained in the corresponding simulation tests (Fig.3, 4). This conformity is maintained even where different voltages are supplied to the converter.

2

⎞ 1 1 + CN ⎟⎟ ⋅ ⋅ C + C CN S OS ⎠

(12)

CD is calculated from (7). LF should be chosen in relation to minimum fmin of the transistor switching and maximum βmax within ZVS operating region, thus fulfilling [3]: ⎛ 1 LF ≥ ⎜⎜ ⎝ π ⋅ f min

a)

2

⎞ 1 ⎟ ⋅ ⎟ C +C S OS ⎠

(13)

V. RESULTS OF EXPERIMENTAL TESTING OF ZVS BOOST MRC Based on presented method of designing of ZVS boost MRC, an experimental circuit was designed and executed (Fig.9). Tests were carried out at load resistances RN=0.5 and RN=1 [3].

b) Fig.11. The operating region at zero voltage switching in the experimental ZVS boost MRC.

Selected current and voltage waveforms Figure 12 presents selected current and voltage waveforms of the resonant circuit elements in the ZVS boost MRC, obtained in simulation (Fig.12a) and experimental (Fig.12b) tests. Notation in regard to the

waveforms is shown in Figure 1. To compare the conformity of simulation and experimental results, redcoloured current and voltage waveforms derived from simulation tests were superimposed over iS, iL and uCS, uCD waveforms obtained on the basis of experimental testing.

a)

b) Fig.13. Efficiency ratio η of the ZVS boost MRC; E=20V a) simulation results, b) experimental results

8. CONCLUSION 1.

2.

3.

4.

The paper has presented a selection algorithm of ZVS boost MRC’s resonant circuit elements. Determination of the variation range of the transistor’s turn-off time toff in the full range of control frequency fN at varied values of M and RN is the supreme selection criterion. The design method discussed above enables selection of boost MRC’s elements on the basis of ZVS operating region obtained in simulation testing without necessarily resorting to complex numerical calculations. Conformities between results of simulation and experimental tests provide grounds for the conclusion that the designing of a converter based on simulation testing in consideration of ZVS operating region allows the determination of the values of the resonant circuit elements. MRC’s ZVS operating region obtained in simulation testing enables to define ranges of the control system parameters. REFERENCES

a)

b)

[1]

Fig.12. Current and voltage waveforms in the ZVS boost MRC; RN=0.5, f=345kHz, β=0.65, a) simulation results; E=20V, ILF=2.92A, UO=28.48V, η=0.93, Pin=58.25W, Pout=54.12W b) experiment results; E=20V, ILF=2.97A, U O=28.33V, η=0.90, Pin=59.40W, Pout=53.71W

The result diverges most widely in regard to uCS. With respect to RN=0.5, the relative error δuCS =4% with:

δuCS =

ΔU CS max ⋅ 100% U CS max

(14)

where: ΔU CS max – maximum divergence between simulation and experimental waveforms, U CS max – maximum transistor voltage derived from simulations. Oscillations in experimental waveforms result from parasitic reactance in the experimental model which is the prototype converter produced in laboratory conditions. Efficiency ratio Figure 13 illustrate the results of the simulation and experimental testing of the ZVS boost MRC in the form of efficiency ratio η. The converter’s η is similar in both the cases, ranging from 0.91 to 0.97.

[2] [3]

[4]

[5]

[6] [7]

Nowak M., Barlik R., “Poradnik inżyniera energoelektronika” (Handbook of Power Electronic Engineer) WNT 1998. “Simulation system SIMPLORER 4.0 User Manual”, Ansoft Corporation, Pittsburgh, 2002. Szychta E., ”Multirezonansowe przekształtniki ZVS napięcia stałego na napięcie stałe” (Multiresonant DC/DC ZVS converters), Oficyna Wydawnicza Uniwersytetu Zielonogórskiego, Monograph, vol. 6, 2006. Szychta E., “ZVS operation region of multiresonant DC/DC boost converter”, Journal of Advances in Electrical and Electronic Engineering, Faculty of Electrical Engineering, Vol.6, No.2, 2007, Zilina University, pp. 60-62. Tabisz W.A., Lee F.C., ”DC analysis and design of zero-voltageswitched multi-resonant converters”, IEEE 20th Annual Power Electronics Specialists Conference, PESC '89, vol. 1, 1989, p. 243 – 251. Tunia H., Barlik R., ”Teoria przekształtników” (Theory of Converters) Oficyna wydawnicza Politechniki Warszawskiej, Warsaw 2003. Люфт М., Шихта Э., ”Математическая модель мультирезонансного инвертора ZVS DC/DC, повышающего напряжение, Вестник МИИТ-а”, № 17, cc.74-86, Москва 2007, Россия.