Model Predictive Control for DC-DC Boost Converters ... - IEEE Xplore

This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2017.2785255, IEEE Transactions on Power Electronics

Model Predictive Control for DC-DC Boost Converters with Reduced-Prediction Horizon and Constant Switching Frequency Long Cheng, Pablo Acuna, Member, IEEE, Ricardo P. Aguilera, Member, IEEE, Jiuchun Jiang∗, Senior Member, IEEE, Shaoyuan Wei, John E. Fletcher, Senior Member, IEEE and Dylan D.C. Lu, Senior Member, IEEE.

Abstract—The implementation of multi-step direct model predictive control (MPC) for DC-DC boost converters overcomes the well-known issue of non-minimum phase behaviour. However, it can lead to a high computational burden depending on the prediction horizon length. In this work, a simple and computationally efficient MPC method for DC-DC boost converters is proposed. The key novelty of the presented control strategy lies in the way dynamic references are handled. The control strategy is capable of providing suitable references for the inductor current and the output voltage, without requiring additional control loops. Moreover, this reference design allows the predictive controller to be implemented with a single-step prediction horizon. Thus, a significant reduction in the required real-time calculations executed in the control hardware is achieved. To obtain constant switching frequency, the power switch commutation instants within a sampling period are considered as control inputs. Therefore, the predictive controller is formulated as a continuous control set MPC (CCS-MPC). Additionally, the proposed formulation is able to deal with different operation modes of the converter without changing the controller structure. Finally, an observer is used to dynamically modify the reference to provide robustness to system parameter uncertainties. Simulation and experimental results show an accurate tracking of dynamic inductor current and output voltage references, while respecting the restrictions on maximum inductor current levels of the converter. Index Terms—Modeling, control, predictive control, converters, DC-DC power conversion.

I. I NTRODUCTION A DC-DC boost converter has the ability to transfer power from one DC voltage source to another, higher voltage, thereby stepping-up the input voltage. Therefore, this converter has a major role in several applications such as solar PV systems, energy storage systems and electrical vehicles [1]. From a control point of view, the main challenge when governing this converter is to provide a constant output voltage independent This work was supported by the National Key R&D Program of China (Grant Number 2017YFB1201005). ∗ Corresponding author: J. Jiang∗ , L. Cheng and S. Wei are with the National Active Distribution Network Technology Research Center, Beijing Jiaotong University, Beijing, 100044, China, (e-mails: [email protected]; [email protected]; [email protected]). P. Acuna is with the School of Engineering, RMIT University, Melbourne, Australia (e-mails: [email protected]). J. E. Fletcher is with the School of Electrical Engineering and Telecommunications, The University of New South Wales, Sydney, NSW 2052, Australia (e-mails: [email protected]). R. P. Aguilera and D.D.C. Lu are with the University of Technology Sydney, Sydney, NSW 2007, Australia (e-mail: [email protected]; [email protected]).

of the variation in the current drawn from it by the load. The regulation of the output voltage is not a trivial task since this topology presents nonlinearities, continuous- and discontinuous-conduction-modes (CCM and DCM), and a non-minimum phase output voltage behaviour under a wide range of operating conditions [2]–[8]. A standard approach is to use a cascade linear PWMbased control strategy. An inner loop controller regulates the inductor current while a second outer loop controller controls the output voltage. For the inner current controller, there are two standard controllers: peak current-mode control (PCMC) and average current-mode control (ACMC) [9]. The PCMC is faster, but it lies on the slope compensation to avoid subharmonic oscillations while working with large duty cycle. Additionally, it controls the peak value not the average value which means it has an error between the current reference and the average value current [9] [10] [11]. The ACMC, which usually uses a PI controller, does not have the above issues, however it has shortcomings such as: lower response compared with PCMC and it is difficult to obtain accurate PI controller parameters. The main reason is that a degree of nonlinearity is introduced by the power switch, so the design and tuning of control parameters that work well for a certain operating point, does not necessary work when the converter is working with different load/input conditions, e.g. solar PV systems. In many cases PCMC still are the first choice for low power applications. However, they are sensitive to commutation noise, which makes the use of the average value of the current essential for high-power applications. For the outer loop, PI controllers are also considered the standard approach. It has been proved that same degree of nonlinearity discussed before also adds offset error in steady-state to the model unless the switching frequency is accounted in the averaging process [12]. As a consequence, if a non-frequency dependant averaged model of the converter is used, then the closed-loop performance and stability are affected as demonstrated in [12]. Even though this issue can be alleviated by increasing the switching frequency, this is not the case for high power applications where a low switching frequency is required. Another important feature, which is not straightforward to implement using linear feedback control, is the inclusion of system constraints. A standard cascade structure implementation of both outer- and inner-loop uses static output saturation. In fact, it is well-known that the performance under such saturation is completely ignored in

0885-8993 (c) 2017 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.


the tuning of the PI controller. This issue is normally solved by using an anti-windup scheme which limits the bandwidth of the closed-loop system, and thus a large setting-time is obtained. Additionally, if state constraints such as maximum voltage/current needs to be addressed, the simplicity of the established PI tuning procedures becomes more complex. In [13] an internal mode control to attain the non-minimum phase behaviour of DC-DC boost converters using only a voltageloop while having high-bandwidth is proposed, however still need the average linear model developed in the neighbourhood of a nominal operating point. For this reason, controller design for high-power DC-DC converters working at relatively lowfrequency (< 20 kHz) has an increasing practical value. A number of recent studies have begun to focus on the MPC for both DC-DC boost and buck-boost converters [9], [14]– [21]. In [14], a finite control set MPC (FCS-MPC) based on a mixed logical dynamic (MLD) model was proposed. An FCS-MPC is used as an inner current loop controller and a PI controller is used as the outer voltage loop controller. In [9], a continuous control set MPC (CCS-MPC) for CCM that works in using valley current, peak current or average current is proposed. The control laws are derived for buck, boost, and buck-boost converters. This method provides fixed-switching frequency, however the inclusion of state constraints such as peak current within the sampling period when is working with the average current and DCM has not been analysed. Both FCS-MPC and CCS-MPC allow the controller to improve the inner current loop performance, but is still limited by the generation of a proper current reference coming from the output voltage loop for different operating points [15]. As part of the improvements on the current reference design, there are two methods, which also use FCS-MPC as inner current controller [16], [17]. In both methods the current reference is obtained by two parts. The first part is a steady-state reference which is derived from the DC-DC boost converter model and the output voltage reference. The second part is a proportional term, [16], or a proportional-integral term to the voltage error, [17], which can increase the inductor current when a stepchange in the voltage reference is required. This method has a better dynamic output voltage response compared with the linear-based proposed in [14], however it leads to a large peak inductor current. In [18], a constrained Direct Voltage FCS-MPC strategy is introduced to control step-down buckboost converters. The inclusion of system constraints maintains currents and voltages within design limits region. In [19] [21], the inherit non-minimum phase behaviour issue of the output voltage in boost converters is attained by using a long prediction horizon FCS-MPC formulation. It is well known that long horizon predictions increase the computational burden, however a moving block technique where the prediction horizon, N , is divided in two parts N = N1 + N2 has been adopted to run converter predictions. The key idea here is to use a larger sampling period, e.g. 4Ts , for the second horizon achieving, thus, a longer horizon with less computational complexity. Then, by using enumeration, the optimal input (switch position) is chosen. Despite the fast closed-loop performance in MPC formulations, there are still some aspects that need to be analysed, including the inner-loop

iL L

+

vin

io

DC-DC Boost Converter

RL S1

−

D1

ic Rc Cf

+

Z

+

vo −

vc −

vin iL

S1

vo

CCS-MPC Current Controller

i⋆L

vin

vo

Reference Design

Fig. 1. Circuit topology of the DC-DC boost converter.

reference design, DCM operation mode and system contraints for CCS-MPC, and the fact that a long prediction horizon using a complexity reduction method is still needed [20]. The aim of this paper is to propose an MPC formulation with particular focus on the prediction horizon reduction. For the DC-DC boost converter, that has an inherit non-minimum phase output voltage behaviour. This paper extends the preliminary work [22] by deriving a suitable current reference and a single inductor current control loop. The proposed current reference generator aims to design a suitable current reference which leads to a predefined slope in the output voltage, especially at the beginning of transient conditions. In this way the inductor current reference which can maintain the output voltage increasing linearly and fast is calculated accurately in every control instant. It neither generates a large peak inductor current nor needs a long prediction horizon compared with prior long prediction horizon FCS-MPC and outer voltage control loop. Moreover, the proposed current reference along with a continuous control set MPC (CCS-MPC) formulation, similar to [9], is used to govern the DC-DC boost converter which encompasses different operational modes and provides a constant switching frequency.

II. DC-DC B OOST C ONVERTER M ODEL

The DC-DC boost converter is shown in Fig. 1, where S1 is the power switch, D1 is a diode that provides a free wheel path for inductor current, L is the inductor with RL representing the inductor equivalent series resistance and Cf is the output capacitor with Rc representing its equivalent series resistance. The continuous-time model, considering the inductor current



iL , capacitor voltage vc and output voltage vo is expressed as: − RL ZRc diL (t) = daux [ − ]iL (t) dt L L(Z + Rc ) Z − daux vc (t) L(Z + Rc ) vin (t) Z + (Rc iL (t) + vc (t))u(t) + daux L(Z + Rc ) L dvc (t) Z 1 = daux iL (t) − vc (t) dt Cf (Z + Rc ) Cf (Z + Rc ) Z iL (t)u(t) − Cf (Z + Rc ) ZRc Z vo (t) = daux iL (t) + vc (t) Z + Rc Z + Rc ZRc − iL (t)u(t) Z + Rc ( 1 S1 = 1 u(t) = 0 S1 = 0 ( 1 u(t) > 0 or u(t) = 0 and iL (t) > 0 daux (t) = 0 u(t) = 0 and iL (t) = 0, (1) where u(t) is the input of the system, that is related to the states of the switch S1 . In that case, S1 = 1 means the switch is ON and S1 = 0 means is OFF. In DCM operation, the inductor current returns to zero in every switching cycle, thus the auxiliary binary variable daux is introduced to derive a model that describes the operation of the converter either in DCM (daux = 0) or CCM (daux = 1). A discrete-time model in matrix form of the DC-DC boost converter can be obtained using the continuous-time model (1) and considering the first-order approximation Euler’s method as: x(k + 1) = Ax(k) + Bu(k) + Ev y(k) = Cx(k) + Du(k) ( (2) 1 S1 = 1 u(k) = 0 S1 = 0 where x(k) = [iL (k) vc (k)]T , y(k) = [iL (k) vo (k)]T and the matrices are:   − Ts Z Ts ZRc Ts RL 1 − τaux [ L + L(Z + Rc )] τaux L(Z + Rc )  , A=   Ts Ts Z 1− τaux Cf (Z + Rc ) Cf (Z + Rc )   Ts Z  L(Z + Rc )(Rc iL (k) + vc (k)) , B=   Ts Z − iL (k) Cf (Z + Rc )     0 1 0 , C= Z  , D =  −ZRc ZRc iL (k) τaux Z+ Z + Rc  Rc Z + Rc  Ts E = τaux L  , and v = vin (k). 0

Notice that this model identifies three operation modes, with Mode 1, 2 and 3 referring to different cases based on the evolution of iL within the sampling period Ts . Each of this operation modes is distinguished using the auxiliary variable τaux as per (3). Furthermore, τ1 stands for the timeinstant when the inductor current reaches zero within Ts . As will be elucidated later, these operation modes can be used to forecast the evolution of the current within consecutive sampling instants. Importantly, based on the prediction for iL at τ1 , the controller will accommodate its optimal times in order to account for DCM operation.   1 u(k) > 0 or u(k) = 0 and iL (k + 1) > 0,       Mode 1    τaux = τ1 u(k) = 0 and iL (k) > 0 and iL (k + 1) = 0,   Ts    Mode 2      0 u(k) = 0 and iL (k) = 0, Mode 3 (3) III. O PTIMAL C ONTROL P ROBLEM F ORMULATION This section explains the proposed control strategy, firstly discussing practical disadvantages of MPC cost function formulations that directly control the output voltage. A. Direct Voltage MPC Formulation The aim of Direct Voltage MPC is to control vo by formulating a cost function that minimizes its reference tracking error without requiring a current control loop [21]. To do this, system variable predictions run at every sampling period Ts in order to assemble an admissible switching sequence made by several switching states over a sufficiently long prediction horizon. In that case, the cost function is chosen as: JDV (k) =

k+N X−1

(|vo,err (l + 1|k)| + λ|∆u(l|k)|),

(4)

l=k

where N is the total number of time-steps in the prediction horizon and ∆u(k) = u(k) − u(k − 1) allows the controller to reduces the average switching frequency. This cost function formulation effectively achieves voltage control over the output voltage vo , however the number of calculations needed increases the complexity to obtain the optimal solution for practical implementations. Furthermore, as explained in [21], (4) also produces a variable switching frequency. A variable switching frequency directly affects the design procedure for passive components of this type of DC-DC converters. Both large horizon and variable frequency are evidently considered disadvantages from the implementation point of view. B. Proposed CCS-MPC Formulation The proposed CCS-MPC algorithm aims to solve the aforementioned practical issues of direct voltage MPC. To do this, the optimal commutation instants for generating the switching sequence are analytically derived (off-line) from a quadratic



is1

iL i⋆L

is1

iL fi1

i⋆L

fi1 is0 = iL (k)

fi2

is3

is2

t4

0A Ts S1

1

t2

t1

is3 fi3

is0 = iL (k)

0A

fi3

fi2

is2 = 0 Ts

S1

t3

0

1

t1

t2

t3

0 k+1

k

k+1

k

Fig. 2. Inductor current evolution during a sampling period (Ts ) in CCM.

Fig. 3. Inductor current evolution during a sampling period (Ts ) in DCM.

cost function that minimizes the inductor current reference tracking error at every sampling period. Thus, no multiple times-steps are needed to forecast the evolution of the inductor current between switching periods. Instead, only the optimal times are calculated in real-time from computational costefficient formulae which finally are used to generate a fixedfrequency PWM switching sequence. Moreover, a dynamic reference design is used to find an appropriated inductor current reference that provides control over the output voltage vo . Finally, a Luenberger-Observer is designed in order to provide a feed-forward term which dynamically modifies the reference. The combination of the feed-forward term and the Luenberger-Observer is used to deal with load uncertainties and model mismatches. 1) Current CCS-MPC for DC-DC converters: Based on the discrete model (2), if τaux = 1, then the inductor current and output voltage increments remain constant during the time that S1 remains on its corresponding switching state. Thus, these current increments (neglecting internal resistors) can be expressed via:

the current reference i⋆L is written in terms of each current tracking errors within Ts for is1 , is2 and is3 as:

vin (k) L vin (k) − vo (k) = L vin (k) . = L

fi1 = fi2 fi3

(5)

Fig. 2 exemplifies the evolution of the inductor current between consecutive measured points at k and k +1, that takes into consideration (5). Here, times t1 and t3 = Ts − t1 − t2 are forced to be equal. In steady-state condition, t3 (k) is almost equal to t1 (k + 1) which means the measured current is0 = iL (k) and is3 = iL (k + 1) are almost equal to the average value of the inductor current. If an initial value for the measured inductor current iS0 is considered, then an onestep ahead prediction for iL can be obtained as: iL (k + 1) = is0 + fi1 t1 + fi2 t2 + fi3 t3 .

(6)

Thus, a current reference tracking error cost function J(k) that makes the average value of the inductor current iL track

J(k) = (i⋆L (k + 1) − is1 )2 + (i⋆L (k + 1) − is2 )2

(7)

+ (i⋆L (k + 1) − is3 )2

The same cost function (7) can be expressed by considering the times t1 , t2 and t3 , yielding: 2

2

J(k) = (ei − fi1 t1 ) + (ei − fi1 t1 − fi2 t2 )

2

+ (ei − fi1 t1 − fi2 t2 − fi3 (Ts − t1 − t2 )) 2

= (ei − fi1 t1 ) + (ei − fi1 t1 − fi2 (Ts − 2t1 ))

2

(8)

2

+ (ei − fi1 t1 − fi2 (Ts − 2t1 ) − fi3 t1 ) , where ei = i⋆L (k + 1) − is0 is the current tracking error at the instant k, is0 is the measured current at the instant k, the currents is1 , is2 and is3 are all predicted values at the instant t1 , t1 + t2 and k + 1, respectively. In transient conditions, assuming the current will not reach its reference, the controller reach its saturation (t1 = t3 = 0.5 Ts and t2 = 0) in order to maintain the on-state during Ts . If necessary, a maximum current constraint can be easily implemented over iL (k + 1), specially if the prediction of is1 is larger than a predefined limit (iMAX s1 ). Techniques for handling system constraints have been reported [23]. The optimal time t1 is analytically derived by performing the following derivatives: dJ(k) =0. (9) dt1 Finally, the optimal times t1 , t2 and t3 in CCM can be calculated in real-time at each sampling period as: 4ei − 3Ts fi2 6(fi1 − fi2 ) t2 = Ts − 2t1 t3 = t1 . t1 =

(10)

Equation (10) can be used to calculate t1 , t2 and t3 in realtime when the prediction of the valley current is2 is larger than 0 A, but it can not be used if the DC-DC boost converter operates in DCM. In that case, the transition between CCM to DCM is implemented in the same way system constraints are implemented, i.e. if is2 = is0 + fi1 t1 + fi2 t2 is negative, that means the controller must change its operation mode to



DCM, and hence use a different expression to calculate t1 , t2 and t3 . Fig. 3 is used to analyze the evolution of the inductor current in DCM. The main idea is to force the area below fi1 , fi2 and fi3 to be equal to the area below i⋆L , then: i⋆L Ts = (fi1 t1 )t1 /2 + (is3 )t3 /2 + is0 t1 + is1 t4 /2 = (is0 + fi1 t1 )t1 + (is0 + fi1 t1 )t4 /2 ,

(11)

where t4 = −(is0 + fi1 t1 )/fi2 , yielding:

it will lead to a large peak inductor current and decreases the output voltage in the initial stage of the step-up voltage reference change. The proposed solution aims to design a suitable current reference which leads to a predefined slope in the voltage, especially at the beginning of transient conditions. Thus, an estimated voltage võ (k + 1) with a predefined derivative fv (k) is defined as: võ (k + 1) = vo (k) + fv (k)Ts .

fi2 (is0 + ρt ) fi1 (fi1 − fi2 ) t2 = Ts − 2t1

(14)

t1 = is0 +

t3 = t1 s

ρt =

The estimated input-side power can be obtained at the instant k + 1 using estimated values as follows:

2 − 2i⋆L (k + 1)Ts fi1 + 4fi2 i⋆L (k + 1)Ts fi1 + fi2 i2s0 . fi2 (12)

After t1 , t2 and t3 are calculated either in CCM or DCM, the optimal switching PWM sequence is implemented by simple comparison in each step, always considering the vector {1, 0, 1}. Notice that the formulas in DCM for the derived optimal times can also be used in CCM. However, considering that (12) is relatively more complex than equation (10) and the boost converter normally runs in CCM, (12) is mainly provided to attain smooth transitions from CCM to DCM. Although the current controller’s output is a time value t1 (k) (with a maximum unconstrained value equal to T2s ), it can be easily constrained with a time limit tMAX . This value is then 1 compared with the symmetrical carrier to generate a symmetrical PWM. This limit is designed based on semiconductor conduction losses and parasitic elements to prevent inherent unstable behaviour of the DC-DC boost converter, specially at high duty cycles. This is implemented by limiting t1 (k) by tMAX , and considering this limited value as a previous optimum 1 value for the next instant calculation. Thus, the estimated values for the predictions will use the applied and limited value for t1 (k). 2) Proposed dynamic current reference design: The previously mentioned large transient current during transients is referred to the condition that the current reference i⋆L (k + 1) is largely increased by the controller in order to improve the voltage transient response of vo . To solve this problem, [16] and [17] use a proportional term and a proportional-integral term to the voltage error respectively, i.e. vo⋆ − vo (k). This term is added to the steady-state inductor current reference i⋆LSS (k + 1), that is derived from the dynamic model (1) (neglecting internal resistors to simplify the computational complexity and assuming vin (k + 1) ≈ vin (k)) as: 2

vo⋆SS (k + 1) , i⋆LSS (k + 1) = Z vin (k)

(13)

where SS stands for steady-state. Both are simple and effective methods to improve the dynamic output voltage response by increasing the inductor current reference, but they also have few drawbacks: first, it is difficult to obtain the matched coefficients KP and KI to calculate a suitable current reference. Second, a large KP can improve the dynamic response but

P˜in (k + 1) = vin (k + 1)˜iL (k + 1) ,

(15)

while the estimated output-side power can be calculated as: Põut (k + 1) = võ (k + 1)(˜io (k + 1) + ˜ic (k + 1)),

(16)

where ˜io (k + 1) and ˜ic (k + 1) are the estimated values for the load current and capacitor current at k + 1, respectively. Then, a power balance (neglecting internal resistors to simplify the computational complexity ) i.e. P˜in (k + 1) = Põut (k + 1) yields: vin (k + 1)˜iL (k + 1) = võ (k + 1)(˜io (k + 1) + ˜ic (k + 1)) (17) Here, ˜ic (k + 1) and ˜io (k + 1) are calculated by: võ (k + 1) − vo (k) = Cf fv (k) , Ts ˜io (k + 1) = võ (k + 1)/Z .

˜ic (k + 1) ≈ Cf

(18) (19)

From (14), (17), (18) and (19) assuming vin (k + 1) ≈ vin (k), ˜iL (k + 1) is obtained. The later is redefined as the dynamic current reference, i⋆LD (k + 1), yielding: i⋆LD (k + 1) =

(vo (k) + fv (k)Ts )((vo (k) + fv (k)Ts ) + Cf fv (k)Z) vin (k)Z (20)

A constant voltage derivative reference fv⋆ for fv (k) can be chosen off-line to meet the requirements of DC-DC boost converter design. Thus, the predefined derivative fv (k) in every control period can be obtain as: fv (k) = fv⋆ sgn(vo⋆ (k + 1) − vo (k)) .

(21)

From (20) one can obtain (neglecting internal resistors): σ1 − σ2 fvMAX (k) = σ3 q 2 2 2 σ1 = Z Cf vo (k) + 4i⋆LMAX vin (k)(Z 2 Cf Ts + ZTs 2 ) σ2 = 2Ts vo (k) + Cf Zvo (k) σ3 = 2Ts (Ts + Cf Z) fvMIN (k) =

− vo (k) , Cf Z (22)



where fvMAX (k) is the maximum rate of change of voltage, fvMIN (k) is the minimum rate of change of voltage and i⋆LMAX is the maximum inductor current reference determined based on the converter ratings in (23). Basically, the maximum value that fv⋆ can take for generating i⋆D L (k + 1) is represented by a limiter i.e. [fvMIN (k), fvMAX (k)] as shown in Fig. 4. Notice that even though fv⋆ can be set too high with the aim to speedup the transient response, the current limit set as i⋆MAX will L also define fvMAX (k) as per (22). Since this limit is also achieved by the proposed controller, there is no need to update [fvMIN (k), fvMAX (k)] in real-time. Finally, a factor α to combine the steady-state current reference i⋆LSS (k+1) and dynamic current reference i⋆LD (k+1) is proposed and defined as: i⋆L (k

+ 1) =

αi⋆LD (k

+ 1) + (1 −

α)i⋆LSS (k

+ 1)∈

α ∈ [0, 1].

(26)

where u ¯(t) is the average input of the system, io (t) is the load current, iL (t) is the inductor current, and t2 is the optimal time calculated from (10) for CCM or (12) for DCM. The equivalent discrete-time model is expressed as: x(k + 1) = Ax(k) + B u ¯(k) + Ev y(k) = Cx(k) + Du¯(k) + F v u¯(k) = (Ts − t2 (k))/Ts

, (23)

(27)

with, (24)

Here, N ⋆ is a predefined coefficient used to increase the relative importance of i⋆LD (k + 1) over i⋆LSS (k + 1) during transients e.g. voltage step changes. From (24) one can obtain:  |vo⋆ (k + 1) − vo (k)| 1  α = 1, ∈ [ ⋆ , 1]  ⋆ vo (k + 1) N (25) 1 |vo⋆ (k + 1) − vo (k)|   0 6 α < 1, ) ∈ [0 , vo⋆ (k + 1) N⋆

|vo⋆ (k + 1) − vo (k)| varies vo⋆ (k + 1) from 0% to 100%. In most of the time under a dynamic response the controller wants α to be 1 as long as possible to make the whole current reference i⋆L (k + 1) to be equivalent to the dynamic current reference i⋆LD (k + 1). So N ⋆ should be chosen as N ⋆ > 1. If N ⋆ is set to 1 it means the factor α will never be set to 1 unless vo (k) = 0 V . For example, if N ⋆ = 10 it means when the normalized voltage error changes from 10% to 100%, then α will always be 1. But a too large N ⋆ will let the inductor current decrease very fast when the normalized voltage error becomes smaller which will lead to a voltage overshoot. In this way, the dynamic current reference will linearly increase in the step-up voltage reference change which means it will improve the voltage transient response without a large peak current. Moreover, the output voltage will also linearly increase by a predefined voltage slope. Last but not least, the value of α in (23) and (24) plays an important role to adjust the relative importance of the i⋆SS L (k + 1) and i⋆D L (k+1) when there is an output voltage error. When vo (k) is lower than vo⋆ (k), the α increases and the relative importance ⋆ of i⋆D L (k + 1) will also increase in (23). Finally, iL (k + 1) will ⋆D increase (close or equal to iL (k + 1)) to decrease the output voltage error, just like a standard PI outer voltage control loop. 3) Luenberger-Observer: So far, the load has been assumed to be time-invariant and known. However, in most applications the load typically varies in an unknown manner, resulting in parameter variation. In order to overcome this problem, usually, an observer is used to adjust the original control The normalized voltage error

1 1 1 dvc (t) iL (t) − iL (t)¯ u(t) − io (t) = dt Cf Cf Cf u¯(t) = (Ts − t2 )/Ts

[0, i⋆LMAX ]

where i⋆LMAX limits the inductor current reference and |vo⋆ (k + 1) − vo (k)| , α = N⋆ vo⋆ (k + 1)

references which means the parameter variation can be seen by the controller [24]–[27] . In this work, a standard Luenberger observer is considered to observe the output current to adjust the references [28]. The continuous-time average model is expressed as:

   −iL (k)Ts Ts 1 −  , A= Cf , B =  Cf 0 1 0   Ts − ZRc iL (k) Z C= , E =  Cf  , 0 , D= Z + Rc Z + Rc 0 

ZRc and v = iL (k), Z + Rc where u ¯(k) is the average input of the system, x(k) = [vc (k) io (k)]T , and y(k) = vo (k). The Luenberger observer is defined as: F =

xˆ(k + 1) = Aˆ x(k) + B u ¯(k) + Ev + Lobs [y(k) − yˆ(k)] yˆ(k) = C x ˆ(k) + Du¯(k) + F v (28) where xˆ(k) = [ˆ vc (k) îo (k)]T is the observer state value, yˆ(k) = vô (k) is the observer output value and Lobs = [L1 L2 ]T is the observer gain which is a 2 × 1 dimension constant matrix. If the observer error state is defined as e(k) = x ˆ(k) − x(k), then (27) and (28) yield: e(k + 1) = (A − Lobs C)e(k).

(29)

The observer is stable if matrix(A − Lobs C) in (29) is a Hurwitz matrix which means the absolute values of all its eigenvalues are less than 1 [29]. Then, the observer state îo (k) given by (28) is used to calculate the equivalent observer load impedance Zˆ instead of Z in the steady-state inductor current reference (13) and the dynamic inductor reference (20). Thus, both the steady-state and dynamic reference are rewritten as: îo (k)(vo⋆SS (k + 1))2 i⋆LSS (k + 1) = , (30) vô (k) vin (k) (vo (k) + fv (k)Ts )2îo (k) vin (k)ˆ vo (k) (31) (vo (k) + fv (k)Ts )Cf fv (k)ˆ vo (k) . + vin (k)ˆ vo (k) The block diagram of the overall proposed control scheme is shown in Fig. 4. i⋆LD (k + 1) =



vo⋆ (k

i⋆LSS (k

+ 1)

+ 1) ×

(30)

+

CCS-MPC Current Controller

i⋆MIN L i⋆MAX L

(1 − α) i⋆LD (k + 1)

α (24) vô (k)

N⋆ îo (k)

iL (k) S1

t1 t1 Ts

DC-DC Boost Converter

(21)

fvMAX (k)

îo (k)

fvMIN (k) i⋆MAX L

MAX vo (k) fv (k)

vô (k)

(22)

vo (k)

vo (k)

fv⋆

fv (k) fvMIN (k)

(31)

×

Gate Signal Generator

tmax iMAX iL (k) 1 s1

i⋆L (k + 1)

i⋆MIN L

Observer Fig. 4. Proposed control scheme for a DC-DC boost converter.

IV. S IMULATION R ESULTS

(a)

5 0 5 10 15 N⋆

A. Selection of fv⋆ and N ⋆ (b)

The start-up behaviour of vo is depicted in Fig. 6. A bypass diode can be used to avoid the inductor current from being uncontrolled since the output voltage has not been built up in the start-up transient. However, the initial output voltage vo (k) is set to be equal to the input voltage vin (k) at t = 0 ms. The current follows its reference and the voltage increases linearly until the factor α < 1 as required by i⋆L . In Fig. 6(a) the voltage vo reaches its desired value in about 2 ms without overshoot.

2

2

14 8⋆ fv [V/ms]

20

5 0 5 20

20

Fig. 5. Simulation based analysis for (a) overshoot and (b) output voltage settling time under step-change from 20 to 30 V.

30 [V]

(a)

vo⋆

20

vo

10 0 4 3

(b)

iL i⋆L

2 1 0

B. Start-up

20

14 8⋆ fv [V/ms]

15 10

10 15 N⋆

[A]

One of the key features of the proposed predictive controller is related to provide a fast voltage dynamic response with a predefined voltage slope fv⋆ . The coefficient N ⋆ in (23) is used to increase the relative importance of i⋆LD (k + 1) over i⋆LSS (k + 1) during transients e.g. voltage step changes. To see the voltage dynamic response performances based on different fv⋆ and N ⋆ , simulation results of the voltage overshoot and the settling time (s.t) under step-change from 20 to 30 V are presented in Fig. 5. The maximum inductor current reference i⋆LMAX was set to 10 A. First, all the points (pair of fv⋆ and N ⋆ ) inside an area that minimizes the overshoot are chosen. It is clear from Fig. 5 (a) that large values for fv⋆ will lead to an overshoot. Second, the fastest settling time is chosen from the pair fv⋆ and N ⋆ , which matches the ones decided in the first step. Notice that, except a very small N ⋆ , there is a range for N ⋆ > 10 where settling times are almost the same. Thus, a nearly minimum output voltage settling time and overshot is achieved by selecting fv⋆ equal to 8 V/ms and N ⋆ equal to 10.

1/vo⋆ [%]

10

s.t [ms]

The DC-DC boost converter was implemented using: L = 0.45 mH, RL = 0.3 Ω, Rc = 0.08 Ω, Cf = 220 µF , vin = 10 V, Z = 73 Ω. Notice that these parameters are same as used in [21]. A sampling period, Ts equal to 50 µs was considered which leads to the same switching frequency i.e. 20 kHz. For normal operation conditions, the converter works in CCM and vo⋆ = 20 V. The observer gain was set to Lobs = [0.3 − 0.1]T .

0

1 [ms]

2

3

Fig. 6. Simulation results for a start-up: (a) Output voltage vo and its reference vo⋆ and (b) inductor current iL and its reference i⋆L .

C. Step-up change in the output voltage reference The transient behaviour during a step-up change in the output voltage reference from vo⋆ = 20 V to 30 V at t = 1 ms is analysed. Fig. 7 compares the proposed CCS-MPC inner-loop controller with the aforementioned current reference design



vo⋆

0

[A]

iL P

5

vo⋆

vo PCMC

25

vo

20

vo ACMC

10

iL PI iL

2 [ms]

4

methods based on P and PI compensation terms. Both “P” and “PI” have been designed to reach their new references in about 5 ms. The peak current constraint (iMAX s1 ) was set to 10 A. In Fig. 7(b), the “P” and “PI” based reference designs show a large peak inductor current that reaches to 10 A and 7.5 A, respectively. The output voltage vo using the proposed method reaches its new desired level in about 2.7 ms, by following the predefined 8 V/ms slope and no overshot, as shown in Fig. 7(a) and 7(b). Notice that for the proposed method the 10 A maximum current limit is not reached, instead a lower current (6 A) is obtained for nearly same transient response. This means even the “P” and “PI” can be adjusted to have better transient response, no matter how fast is the inner controller, conventional current reference design will produce a larger current. Additionally, the fastness of the inner-loop is tested against both PCMC and ACMC as inner-loop in Fig. 8. For this case, the outer-loop is selected same as the previous “PI” based reference design. Notice that even though PCMC and ACMC are well-known by their inherent fastness, the total transient response is mainly driven by the design of the outer-loop. A better response may be achieved with a different tuning of the outer-loop, however this test aims to demonstrate that the combination between a suitable current reference and a constrained CCS-MPC still offers a transient behaviour under step-up changes in vo⋆ that is: i) similar with traditional cascade control structures, and ii) not affected by the constrained value of iL .

D. Step-down Change in the Output Reference Voltage The transient behaviour during a step-down change in the output voltage reference from vo⋆ = 20 V to 15 V at t = 1 ms is shown in Fig. 9. The dynamic current reference i⋆L instantly becomes to 0 A (see Fig. 9(b)), while the inductor current iL remains to be 0 A due to the unidirectional capabilities of the DC-DC boost converter. Since the voltage slope in the step-down period is now decided by the output capacitance and the load resistance, the controller maintains u(k) = 0. In this case, the voltage reaches its new steady-state operating point in about 5 ms.

iL PCMC

0

6

Fig. 7. Outer-loop simulation evaluation for a step-up change in the output voltage reference with P, PI and the proposed controller: (a) Output voltage vo and its reference vo⋆ and (b) inductor current iL .

iL ACMC

5

(b)

iL

2

0

[ms]

6

4

Fig. 8. Inner-loop simulation evaluation for a step-up change in the output voltage reference with ACMC, PCMC and the proposed controller: (a) Output voltage vo and its reference vo⋆ and (b) inductor current iL .

(a)

[V]

[A]

[V]

vo PI

10

0

(a)

vo

25 20

(b)

30

vo P

20 18

vo

16

vo⋆

1

(b)

[A]

(a)

[V]

30

iL

0.5

i⋆L

0 0

2

4 [ms]

6

8

Fig. 9. Simulation results for a step-down change in the output voltage reference: (a) Output voltage vo and its reference vo⋆ and (b) inductor current iL and its reference i⋆L .

E. Load Step Change A step-down change in the load resistance occurs at t ≈ 1 ms as shown in Fig. 10(a) and 10(b). With the converter operating at the previous operating point, the load resistance is reduced, i.e., from Z = 73 to 36.5 Ω. The observer adjusts the output voltage back to the voltage reference vo⋆ in about 2 ms with a small undershoot of 1.25%. F. Transition between CCM to DCM The transition behaviour of vo and iL changing from CCM to DCM and vice versa are depicted in Fig. 11. The load Z is changed to a very light condition 730Ω (10% load). In the start-up, the DC-DC boost converter changes from CCM to DCM at t = 1.7 ms. The voltage reference changes from 20 V to 30 V at t = 4 ms, and it can be seen that the controller changes from DCM to CCM to quickly adjust the inductor current to reach the new desired voltage level in about 3 ms. G. Sensitivity Analysis Finally, a sensitivity analysis for the steady-state error in the output voltage (errvo ) is shown in Fig. 12 and Fig. 13. As shown in Fig. 12, the voltage vo is tested under uncertainty on Z with and without the observer. The resistive load is varied from 50% to 200%. If load parameters change, then the observer implementation allows the converter to remain in the steady-state operating point, with no error, as shown by



[V]

(a)

1/vo⋆ [%]

vo⋆

20

vo

19.7

2 1.5 1 0.5

err vo err OBS vo

(b)

1.5 1

i⋆L

0.5 0

1

2 [ms]

[V]

6

DCM

[A]

CCM

DCM

CCM

4 i⋆L

2 0

f err C vo

0.04 err Lvo

0.02

100 1/L and 1/Cf and1/Rc[%]

120

vo

10 0

(b)

200

Fig. 13. Simulation results for system parameters L and Cf and Rc variation from 80% - 120%: steady-state error err vo (%)

vo⋆

20

150

c err R vo

0.06

80

30

1/Z[%]

4

3

Fig. 10. Simulation results for a step-down change in the load: (a) Output voltage vo and its reference vo⋆ and (b) inductor current iL and its reference i⋆L .

(a)

100

Fig. 12. Simulation results for a load resistance variation from 50% - 200%: steady-state error errvo (%)

iL

1/vo⋆ [%]

[A]

50

0

2

4 [ms]

iL

6

8

Fig. 11. Simulation results for a start-up and a step-up change in the output voltage reference in DCM: (a) Output voltage vo and its reference vo⋆ and (b) inductor current iL and its reference i⋆L .

err OBS in Fig. 12. In Fig. 13 the system parameters L, Cf vo and Rc are changed from 80% to 120%. It can be seen that the steady-state error errvo is always under 0.07%. Fig. 14 and Fig. 15 show how the controller performs in transient condition with changes on inductor and capacitor (+-20%). As shown in Fig. 14, the performance in transient condition is almost same when there is a inductor parameter L +-20% mismatch. In Fig. 15 the output voltage derivative is slower when the capacitor parameter Cf changes to 120%. However, the output voltage still reaches its new desired level in about 3 ms, considering that the settling time is 2.7 ms when there is no system parameter mismatches. V. E XPERIMENTAL RESULTS This section presents an experimental verification of same tests performed simulation. However, special attention is on the observer performance. The boost converter circuit was built using a IRF650B MOSFET as S1 , and the load using a KIKUSUI DC electronic load, model PLZ1004WH 1000W, set as constant power (CP) load. Passive component parameters, sampling frequency and observer’s gain are same as used in simulations. The proposed controller algorithm was implemented on a dSPACE DS1103 taking into consideration delay compensation and a Slave DSP PWM Generation to generate a 20 kHz symmetrical PWM. There are 3 ADCs

used to sense the input voltage, output voltage and inductor current. An interrupt at the beginning of every PWM period is generated by the Slave DSP PWM Interrupt. The number of multiplications, sums and divisions in the algorithm per Ts are: 23 multiplications, 18 sums and 5 divisions in CCM (normal condition), and 29 multiplications, 19 sums, 6 divisions and 1 square-root for DCM. Estimated values were calculated for k + 1 and predictions in k + 2, however a description of this step was intentionally omitted for brevity. A. Step-up change in the output voltage reference Fig. 16 replicates simulation results presented in Fig. 7. As can be seen from these figures, nearly same dynamic performance is achieved in Fig. 16(a), (b), and (c), however as the proposed method offers the inclusion of state constraints, e.g. iMAX equal to 5.0 A (see Fig. 16(d)), one can easily select s1 that limit with less effect on the dynamic performance. B. Step-down Change in the Output Reference Voltage The transient behaviour during a step-down change in the output voltage reference from vo⋆ = 30 V to 20 V is verified in the experimental setup. In this case, it is also confirmed that the fastest way to reduce the voltage is mainly due to the zero current operation point, which forces the system to follow its natural voltage discharge curve as shown in Fig. 17. C. Load Step Change A load step change test is used to verify the effect of uncertainties in the load on the voltage tracking capabilities. Since the model is based on Z, any change on it will introduce steady-state error. Thus, the observer plays an important role on its compensation. This is clearly verified when there is no observer and the load resistance is reduced from Z = 73 to 36.5 Ω, as shown in Fig. 18(a). Notice that, even knowing the load parameter value, the controller was set with the previous observed value, i.e. an equivalent 55 Ω load instead of the



30

vo (0.8L)

vo⋆

[V]

(a)

vo (1.2L)

10

(a)

[A]

20 V

vo P

2A 1 ms

6 (b)

30 V

8.6 A

2.5 V

20

iL (0.8L)

iL (1.2L)

iL P

4

0.75 A

2 0

2

0

4 [ms]

8

6

10.0 A 30 V

2.5 V

Fig. 14. Simulation results for a start-up and a step-up change in the output voltage reference with different L: (a) Output voltage vo and its reference vo⋆ with 80%L and 120%L (b) inductor current iL with 80%L and 120%L.

(b)

20 V

vo PI

2A 1 ms

iL PI

0.75 A

30 [V]

(a)

vo⋆

vo (0.8Cf )

20 vo (1.2Cf )

10

2.5 V

(c)

6 (b)

[A]

iL (0.8Cf )

30 V 20 V

6.4 A

vo

4 iL (1.2Cf )

2 0

2A 1 ms

0.75 A

iL 0

2

4 [ms]

6

8

Fig. 15. Simulation results for a start-up and a step-up change in the output voltage reference with different Cf : (a) Output voltage vo and its reference vo⋆ with 80%Cf and 120%Cf (b) inductor current iL with 80%Cf and 120%Cf . (d)

known 73 Ω. Then, same test is performed with the proposed controller but with the observer. Fig. 18(b) verifies that the observer adjusts the output voltage vo back to the voltage reference vo⋆ in about 1.5 ms with a undershoot of 2.5%. Two load step changes were performed on different operational points. Fig. 19 shows the whole process which also includes a voltage reference step-up change. In all cases fv⋆ was set to 4 V/ms to avoid large overcurrent. At t = 4.5 ms the load resistance is reduced from Z = 73 to 36.5 Ω, and the voltage remains to 20 V in 2 ms. Since fv⋆ was set less aggressive compared with Fig. 18(b) it is possible to see that vo takes a longer to settle on vo⋆ . Then, the voltage reference is changed to 30 V at t = 24.5 ms. The voltage vo reaches its new desired level in about 5.5 ms. The load resistance is changed back to 73 Ω at t = 36 ms, and the voltage remains to 30 V as expected with a 3% overshoot during 2.5 ms. D. Transition between CCM to DCM Finally, the transition behaviour of vo and iL changing from CCM to DCM and vice versa are depicted in Fig. 20. The load Z is changed to a very light condition 730Ω (10% load). The voltage reference changes from 20 V to 30 V at t = 1 ms, and it can be seen that the controller changes from DCM to

30 V

2.5 V 20 V

vo

5.0 A

2A 1 ms

iL

0.75 A

Fig. 16. Experimental results for a step-up change in the output voltage reference using (a) the “P” compensation term, (b) the “PI” compensation term and (c) proposed controller output voltage vo and inductor current iL , and (d) proposed controller with inductor current iL reaching a max current limit iMAX intentionally set as 5.0 A. s1

CCM to quickly adjust the inductor current to reach the new desired voltage level in about 3 ms. VI. C ONCLUSION A computational cost-effective MPC strategy for conventional DC-DC boost converters is proposed. The key novelty of this proposal is that the optimization problem is formulated to be solved using only a single-step prediction horizon. Thus, a suitable reference which is designed in terms of the inductor current and a pre-defined output voltage slope was proposed. The implementation of the proposed control strategy was carried out using a continuous control set MPC (CCS-MPC) formulation, which encompasses different operation modes



vo

30 V

vo 2.5 V 30 V

5V

20 V

20 V

1A

2A

iL 2 ms

0A

Fig. 17. Experimental results for a step-down change in the output voltage reference. Output voltage vo and inductor current iL .

20 V

iL

1.4 A

5 ms

Fig. 19. Experimental results including resistive load step-down change, voltage reference step-up change and resistive load step-up change. Output voltage vo and inductor current iL .

19.6 V

vo

CCM

DCM

DCM

5V

(a)

2.5 V

1A

20 V 5.6 A

vo

30 V

1 ms 0.75 A

iL

2A

iL 0A 20 V

20 V

Fig. 20. Experimental results for a step-up change in the output voltage reference in DCM. Output voltage vo and inductor current iL .

vo

(b)

0.5 ms

2.5 V

1A 1 ms

0.75 A

iL

Fig. 18. Experimental results for a step-down change in the load (a) without using the observer and (b) with observer. Output voltage vo and inductor current iL .

and provides a constant switching frequency. Compared with previously reported methods, the proposed method exhibits the ability to easily constraint either the reference or the prediction of inductor current or the maximum duty cycle. Other established methods such as peak current control can also limit the current when it reaches the limit, but the proposed CCS-MPC controller can also predict if the current reaches the limit at the next sampling period. This allows the controller to choose not to do this, which is a key difference and an important feature with practical relevance in high power converters. Thus, a fast voltage dynamic response with a peak-constrained inductor current is obtained. Moreover, an observer was used to dynamically modify the current reference and provides robustness to the proposed controller for system parameter uncertainties. Simulation and experimental results obtained from a relatively low frequency (20 kHz) DC-DC converter have verified the viability and effectiveness of the proposed CCS-MPC method. R EFERENCES [1] M. K. Kazimierczuk, Pulse-width Modulated DC-DC Power Converters. Wiley, 2008.

[2] J. Alvarez-Ramirez, I. Cervantes, G. Espinosa-Perez, P. Maya, and A. Morales, “A stable design of PI control for DC-DC converters with an rhs zero,” IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, vol. 48, no. 1, pp. 103–106, Jan 2001. [3] R. W. Erickson, S. Cuk, and R. D. Middlebrook, “Large-signal modelling and analysis of switching regulators,” in Power Electronics Specialists conference, 1982 IEEE, June 1982, pp. 240–250. [4] H. Rodriguez, R. Ortega, and G. Escobar, “A robustly stable output feedback saturated controller for the boost DC-to-DC converter,” in Decision and Control, 1999. Proceedings of the 38th IEEE Conference on, vol. 3, 1999, pp. 2100–2105 vol.3. [5] D. Seshachalam, R. K. Tripathi, and D. Chandra, “Practical implementation of sliding mode control for boost converter,” in APCCAS 2006 2006 IEEE Asia Pacific Conference on Circuits and Systems, Dec 2006, pp. 650–653. [6] G.-J. Jeong, I.-H. Kim, and Y.-I. Son, “Application of simple adaptive control to a dc/dc boost converter with load variation,” in ICCAS-SICE, 2009, Aug 2009, pp. 1747–1751. [7] R. W. Erickson and D. Maksimovic, Fundamentals of Power Electronics, 2nd ed. Wiley, 2001. [8] J. B. Hoagg and D. S. Bernstein, “Nonminimum-phase zeros - much to do about nothing - classical control - revisited part II,” IEEE Control Systems, vol. 27, no. 3, pp. 45–57, June 2007. [9] Jingquan Chen, A. Prodic, R. W. Erickson and D. Maksimovic, “Predictive digital current programmed control,” IEEE Transactions on Power Electronics, vol. 18, no. 1, pp. 411–419, Jan 2003. [10] S. P. Hsu, A. Brown, L. Rensink and R. D. Middlebrook, “Modelling and analysis of switching DC-to-DC converters in constant-frequency current-programmed mode,” in 1979 IEEE Power Electronics Specialists Conference, June 1979, pp. 284–301. [11] R. B. Ridley, “A new, continuous-time model for current-mode control [power convertors],” IEEE Transactions on Power Electronics, vol. 6, no. 2, pp. 271–280, Apr 1991. [12] B. Lehman and R. M. Bass, “Switching frequency dependent averaged models for pwm dc-dc converters,” IEEE Transactions on Power Electronics, vol. 11, no. 1, pp. 89–98, Jan 1996. [13] T. Kobaku, S. C. Patwardhan, and V. Agarwal, “Experimental evaluation of internal model control scheme on a DC-DC boost converter exhibiting nonminimum phase behavior,” IEEE Transactions on Power Electronics, vol. 32, no. 11, pp. 8880–8891, Nov 2017.



[14] M. Hejri and H. Mokhtari, “Hybrid modeling and control of a dcdc boost converter via extended mixed logical dynamical systems (EMLDs),” in Power Electronics, Drive Systems and Technologies Conference (PEDSTC), 2014 5th, Feb 2014, pp. 373–378. [15] S. K. Kim, J. S. Kim, C. R. Park, and Y. I. Lee, “Output-feedback model predictive controller for voltage regulation of a DC/DC converter,” IET Control Theory Applications, vol. 7, no. 16, pp. 1959–1968, November 2013. [16] T. G. P. Karamanakos and S. Manias, “Direct model predictive current control of dc-dc boost converters,” in Power Electronics and Motion Control Conference (EPE/PEMC), 2012 15th International, Sept 2012, pp. DS2c.11–1–DS2c.11–8. [17] H. P. Ren, Miao-Miao Zheng and Jie Li, “A simplified Mixed Logical Dynamic model and Model Predictive Control of Boost converter with current reference compensator,” in 2015 IEEE 24th International Symposium on Industrial Electronics (ISIE), June 2015, pp. 61–65. [18] T. Geyer, G. Papafotiou, R. Frasca, and M. Morari, “Constrained optimal control of the step-down dc-dc converter,” IEEE Transactions on Power Electronics, vol. 23, no. 5, pp. 2454–2464, Sept 2008. [19] P. Karamanakos, T. Geyer, and S. Manias, “Direct voltage control of DC-DC boost converters using model predictive control based on enumeration,” in Power Electronics and Motion Control Conference (EPE/PEMC), 2012 15th International, 2012. [20] P. Karamanakos, T. Geyer, N. Oikonomou, F. D. Kieferndorf, and S. Manias, “Direct model predictive control: A review of strategies that achieve long prediction intervals for power electronics,” IEEE Industrial Electronics Magazine, vol. 8, no. 1, pp. 32–43, March 2014. [21] P. Karamanakos and T. Geyer and S. Manias, “Direct Voltage Control of DC-DC Boost Converters Using Enumeration-Based Model Predictive Control,” IEEE Transactions on Power Electronics, vol. 29, no. 2, pp. 968–978, Feb 2014. [22] L. Cheng, P. Acuna, R. P. Aguilera, M. Ciobotaru, and J. Jiang, “Model predictive control for DC-DC boost converters with constant switching frequency,” in 2016 IEEE 2nd Annual Southern Power Electronics Conference (SPEC), Dec 2016, pp. 1–6. [23] S. Vazquez, R. P. Aguilera, P. Acuna, J. Pou, J. I. Leon, L. G. Franquelo, and V. G. Agelidis, “Model predictive control for single-phase npc converters based on optimal switching sequences,” IEEE Transactions on Industrial Electronics, vol. 63, no. 12, pp. 7533–7541, Dec 2016. [24] C. Zhang, J. Wang, S. Li, B. Wu, and C. Qian, “Robust control for pwm-based dc-dc buck power converters with uncertainty via sampleddata output feedback,” IEEE Transactions on Power Electronics, vol. 30, no. 1, pp. 504–515, Jan 2015. [25] J. A. Solsona, S. G. Jorge, and C. A. Busada, “Nonlinear control of a buck converter which feeds a constant power load,” IEEE Transactions on Power Electronics, vol. 30, no. 12, pp. 7193–7201, Dec 2015. [26] C. Buccella, C. Cecati, H. Latafat, P. Pepe, and K. Razi, “Observerbased control of llc dc/dc resonant converter using extended describing functions,” IEEE Transactions on Power Electronics, vol. 30, no. 10, pp. 5881–5891, Oct 2015. [27] H. Sira-Ramirez and M. A. Oliver-Salazar, “On the robust control of buck-converter dc-motor combinations,” IEEE Transactions on Power Electronics, vol. 28, no. 8, pp. 3912–3922, Aug 2013. [28] P. Karamanakos, G. Papafotiou, and S. Manias, “Model predictive control strategies for dc-dc boost voltage conversion,” in Power Electronics and Applications (EPE 2011), Proceedings of the 2011-14th European Conference on, Aug 2011, pp. 1–9. [29] G. C. Goodwin, M. M. Seron, and J. A. De Doná, Constrained control and estimation: an optimisation approach. Springer Science & Business Media, 2006.

Long Cheng was born in Liaoning, China. He received the B.S. degree in electrical engineering and the M.S. degree in control theory and control Engineering from China University of Mining and Technology, Beijing, China, in 2007 and 2011, respectively. He is currently working toward the Ph.D. degree at Beijing Jiaotong University, Beijing, China. His research interests include power electronic and energy storage system.

Pablo Acuna (M’12) received the B.Sc. degree in electronics engineering, the B.Eng. degree in electronics engineering, and the Ph.D. degree in electrical engineering from the University of Concepción, Concepción, Chile, in 2004, 2007, and 2013, respectively. From 2014 to 2017, he was a Research Associate in the University of New South Wales, Australia. He is currently a Lecturer in the School of Engineering, RMIT University, Melbourne, Australia. His research interests include electrical power conversion systems and their applications in industry, transportation, and utility.

Ricardo P. Aguilera (S’01–M’12) received the B.Sc. degree in electrical engineering from the Universidad de Antofagasta, Chile; the M.Sc. degree in electronics engineering from the Universidad Tecnica Federico Santa Maria, Chile; and the Ph.D. degree in electrical engineering from The University of Newcastle (UoN), Australia, in 2003, 2007, and 2012, respectively. From 2012 to 2013, he was a Research Academic at UoN, where he was part of the Centre for Complex Dynamic Systems and Control. From 2014 to 2016, he was a Senior Research Associate at The University of New South Wales, Australia, where he was part of the Australian Energy Research Institute. Since September 2016, he has been with the School of Electrical and Data Engineering, at the University of Technology Sydney, Sydney, Australia, where he currently holds a Lecturer position. His main research interests include power electronics, renewable energy integration, and theoretical and practical aspects on model predictive control.

Jiuchun Jiang (M’10-SM14) was born in Jilin Province, China. He received his B.S. degree in Electrical Engineering from Northern Jiaotong University in Beijing, China, in 1993, and the Ph.D. degree in Power System Automation at the same university in 1999. He is currently a professor with the School of Electrical Engineering, Beijing Jiaotong University, Beijing. His main interests are related to battery application technology, electric car charging stations and micro-grid technology. He received the National Science and Technology Progress 2nd Award for his work on EV Bus system, and the Beijing Science and Technology Progress 2nd Award for his work on EV charging system.



Shaoyuan Wei was born in Guangxi, China. He received the B.S. degree in electrical engineering and the M.S. degree in electronic engineering from Beijing Jiaotong University, Beijing, China, in 2014 and 2016, respectively. He is currently working toward the Ph.D. degree at Beijing Jiaotong University, Beijing, China. His research interests include power electronic and energy storage system.

John E. Fletcher (M’11 - SM’13) received the B.Eng. (with first class honors) and Ph.D. degrees in electrical and electronic engineering from HeriotWatt University, Edinburgh, U.K., in 1991 and 1995, respectively. Until 2007, he was a Lecturer at HeriotWatt University. From 2007 to 2010, he was a Senior Lecturer with the University of Strathclyde, Glasgow, U.K. He is currently a Professor with the University of New South Wales, Sydney, Australia. His research interests include distributed and renewable integration, silicon carbide electronics, pulsedpower applications of power electronics, and the design and control of electrical machines. Prof. Fletcher is a Charted Engineer in the U.K. and a Fellow of the Institution of Engineering and Technology.

Dylan D.C. Lu (M’04 – SM’09) received his B.E. and Ph.D. degrees from The Hong Kong Polytechnic University, Hong Kong, in 1999 and 2004 respectively. In 2003, he joined PowereLab Ltd. as a Senior Design Engineer and was responsible for industrial switching power supply projects. He was a full-time faculty member with The University of Sydney from 2006 to 2016. He now holds an honorary position at the University of Sydney. Since July 2016, he has been an Associate Professor at the School of Electrical and Data Engineering, University of Technology Sydney, Australia. His current research interest includes efficient and reliable power conversion for renewable sources, energy storage systems, and microgrids. He is a senior member of IEEE and a member of Engineers Australia. He was the recipient of the Best Paper Award in the category of Emerging Power Electronic Technique at the IEEE PEDS 2015. He presently serves as an Associate Editor of the IEEE Transactions on Circuits and Systems II and the IET Renewable Power Generation.
