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Monolithic Integration of Surface Plasmon Detector and Metal–Oxide–Semiconductor Field-Effect Transistors Volume 5, Number 4, August 2013 Takuma Aihara Masashi Fukuhara Ayumi Takeda Byounghyun Lim Masato Futagawa Yuya Ishii Kazuaki Sawada Mitsuo Fukuda

DOI: 10.1109/JPHOT.2013.2272779 1943-0655/$31.00 Ó2013 IEEE

IEEE Photonics Journal

Integration of Plasmon Detector and MOSFETs

Monolithic Integration of Surface Plasmon Detector and Metal–Oxide–Semiconductor Field-Effect Transistors Takuma Aihara, 1;2 Masashi Fukuhara, 1;2 Ayumi Takeda, 1 Byounghyun Lim, 1 Masato Futagawa, 3 Yuya Ishii, 1 Kazuaki Sawada, 1 and Mitsuo Fukuda 1 1

Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, Toyohashi 441-8580, Japan 2 JSPS Research Fellow, Japan Society for the Promotion of Science, Chiyoda, Tokyo 102-8472, Japan 3 Head Office for BTailor-Made and Baton-Zone[ Graduate Course, Toyohashi University of Technology, Toyohashi 441-8580, Japan DOI: 10.1109/JPHOT.2013.2272779 1943-0655/$31.00 Ó2013 IEEE

Manuscript received May 24, 2013; revised June 28, 2013; accepted June 30, 2013. Date of publication July 11, 2013; date of current version July 17, 2013. This work was supported in part by the Ministry of Education, Culture, Sports, Science and Technology, Japan, under Grant-in-Aid for Scientific Research (B) 22360142 and in part by the Japan Society for the Promotion of Science (JSPS) under a Grant-in-Aid for JSPS Fellows. Corresponding author: T. Aihara (e-mail: [email protected]).

Abstract: The monolithic integration of a silicon-based plasmonic detector with metal– oxide–semiconductor field-effect transistors (MOSFETs) was demonstrated. The plasmonic detector consisted of a gold film with a nanoslit grating on a silicon substrate and was operated at a free-space wavelength of 1550 nm. The structure of the nanoslit grating was optimized by using the finite-difference time-domain method. The output current from the plasmonic detector was amplified by 14 000 times using the monolithically integrated MOSFETs. In addition, dynamic operation of the integrated circuit was demonstrated by modulation of the intensity of a beam that was incident to the plasmonic detector. Index Terms: Surface plasmon polariton, Schottky barrier, diffraction grating, nano-slit, metal-oxide-semiconductor field-effect transistor.

1. Introduction The performance of microprocessors has been limited by several problems such as signal delay and power consumption by electrical wiring [1]. On-chip optical interconnections have the potential to overcome these limitations and achieve high-speed data processing [2]. Photodetectors are an important component of such interconnections, and silicon-based Schottky-type photodetectors have attracted attention for this role because of their operating photon energy, size, materials, and fabrication process [3]–[8]. A photocurrent is generated when light is incident to a Schottky junction, in which the excited electrons in the metal flow over the Schottky barrier into the semiconductor according to the internal photoemission effect (IPE) [9]–[11]. The photocurrent resulting from the IPE is allowed when the photon energy is more than the height of the Schottky barrier but less than the bandgap energy of the semiconductor, and can be obtained from the following equation: Iph ¼ C

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ðEph  B Þ2 Pin ; 2 Eph

(1)

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Integration of Plasmon Detector and MOSFETs

where Pin is the input light power, Eph is the photon energy, B is the Schottky barrier height, and C is the quantum efficiency coefficient [6]. The detector has sensitivity in a telecom wavelength (photon energy) of 1550 nm (0.80 eV), when a gold/silicon Schottky junction is formed [4], [12]. Light with a photon energy of 0.80 eV is hardly absorbed by silicon, and can be guided within the siliconbased circuits without requiring waveguides composed of specific materials. Although the quantum efficiency coefficient of Schottky-junction photodetectors is lower than that of pn-junction photodetectors because of light reflection by the metal and the short escape depth of electrons [13], the coefficient has been increased by confining the electromagnetic energy at the metal surface or metal/semiconductor interface as surface plasmon polaritons (SPPs). Miniaturization of the detector can also be achieved by exciting the SPPs because electromagnetic fields with an optical frequency are confined as SPPs at nano-scale regions beyond the diffraction limit [14]–[16]. To excite SPPs in the photodetectors, metal nanorods [17], nano-slit gratings [12], prisms [13], and end-fire arrangements [4] have been used. Use of a nano-slit grating has the advantage that SPPs can be excited by light with arbitrary wavelength, propagation direction, and polarization angle by tuning its structural parameters. Photodetectors involving SPP excitation (termed plasmonic detectors) have been investigated for on-chip optical interconnections [12], [18]; however, little research has yet been conducted into the monolithic integration of a plasmonic detector with electrical circuits. Because of the simple structure of Schottky-type plasmonic detectors, they can easily be integrated into a silicon-based circuit without the need for certain processes, such as epitaxial growth, annealing, or wafer bonding. Typically, the signaling properties of plasmonic devices have been measured using optical intensity signals. To transmit more information using the optical carrier wave in circuits, we have discussed the use of optical frequency signals [12], [19], which can transmit large-capacity signals with a single optical carrier (known as frequency-division multiplexing). This paper is organized as follows: In Section 2, the nano-slit grating in a plasmonic detector is described using the finite-difference time-domain (FDTD) method. The structure of the plasmonic detector and detection of optical frequency signals by the detector are discussed in detail in Section 3. Monolithic integration of the plasmonic detector with metal-oxide-semiconductor fieldeffect transistors (MOSFETs) and its operation are demonstrated in Section 4. We summarize our results and conclude this paper in Section 5.

2. Optimal Design of a Nano-Slit Grating 2.1. Calculation Conditions Profiles of the electric field intensity in the nano-slit grating were calculated using the FDTD method via electromagnetic wave analysis software (Fujitsu, Poynting for Optics). From the calculations, we designed a grating structure to have high electrical field intensity at an Au/Si interface as a SPP mode. The calculation model is schematically illustrated in Fig. 1(a). Structural parameters defining the geometry of the grating are also shown, where w is slit width, d is slit depth, and p is slit pitch. Au and Si were used as the device materials, and the slits generating the SPP at the Au/Si interface were positioned periodically. The refractive indices of Au and Si were assumed to be nAu ¼ 0:55 þ i11:5 and nSi ¼ 3:47644 at an incident light wavelength of 1550 nm [20]. In spectral analysis, the Drude model was used to estimate the frequency-dependent refractive index of Au. The linearly polarized plane wave was incident from the upper side of the Au film, where the electric field of light was parallel to the x axis. A first-order Mur absorbing boundary condition was used for the x and z directions, and a periodic boundary condition was used for the y direction. The mesh size was 5 nm in all directions.

2.2. Design of Slit Depth First, we calculated the electrical field intensity for different slit depths in a single 100-nm wide slit. The observation point was set at a distance of 3 m from the center of the slit and below the Au film.

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Fig. 1. (a) Schematic diagram of the calculation model of the nano-slit grating, (b) dependency of slit depth on electrical field intensity in a single 100-nm-wide slit, and (c)–(g) electrical field intensity distributions for different slit depths.

Fig. 1(b) shows the dependence of slit depth on the electrical field intensity for an incident-light wavelength of 1550 nm. The intensities were normalized relative to the intensity of incident light. The peak intensities were observed at slit depths of 300, 950, and 1575 nm, with periodicity. The period was approximately equal to the half-wavelength of the SPP mode inside the slit, slit =2 ¼ 650 nm; here, a single slit with sufficient depth was used to calculate the wavelength without reflecting the SPP from the edge of the slit. At the maximum slit depths, a standing wave was observed inside the slit. The node and antinode of the standing wave appeared at the bottom and top of the slit, respectively [Fig. 1(c), (e), and (g)], because of the relation of the reflective indices of nAir G nslit G nSi , where nAir is the reflective index of the free space, and nslit is the effective reflective index of the SPP mode inside the slit. The weaker electric field intensities inside the slit and Au/Si interface were also observed under nonresonance conditions, as shown in Fig. 1(d) and (f). These results indicate that the slit functions as a resonator of the SPP mode [21], [22], and that the high intensity SPP mode at the Au/Si interface is excited under resonance conditions.

2.3. Design of Slit Pitch Next, we calculated the electrical field intensity for different slit pitches and wavelengths in the nano-slit grating ðw ¼ 100 nm; d ¼ 300 nm; slit number ¼ 6Þ. The observation point was set at a distance of 5 m from the center of the slit and below the Au film. Fig. 2(a) shows the wavelength dependencies of the electrical field intensity for different slit periods. A peak at around 1550 nm with a full-width at half-maximum of 230 nm was observed for a slit pitch of 440 nm. The peak wavelength max could be tuned by changing the slit pitch. max can be predicted approximately from the dispersion relation of the SPP and phase matching condition in the diffraction grating as follows: rffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi "m "d max  p (2) "m þ "d

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Fig. 2. (a) Incident-light wavelength dependencies of the electrical field intensity for different slit periods ðw ¼ 100 nm; d ¼ 300 nm; slit number ¼ 6Þ and (b) electrical field intensity distribution ðw ¼ 100 nm; d ¼ 300 nm; p ¼ 440 nm; slit number ¼ 6Þ in a nano-slit grating.

Fig. 3. Schematic diagrams of the plasmonic detector with a nano-slit grating.

where "m and "d are the frequency-dependent permittivity of the metal and dielectric, respectively [23]. Fig. 2(b) shows the electrical field intensity distribution in the nano-slit grating ðw ¼ 100 nm; d ¼ 300 nm; p ¼ 440 nm; slit number ¼ 6Þ for incident light with a wavelength of 1550 nm. Confinement of the electromagnetic energy at the Au/Si interface as the SPP mode was observed. The electric field intensity of the SPP mode was increased by periodic placement of the slit. These results mean that the optimal slit pitch is mainly determined by the in-phase interference of the SPP generated by each slit.

3. Optical Frequency Signal Detection by Plasmonic Detector 3.1. Structure of Plasmonic Detector We then fabricated a plasmonic detector using the optimal designed grating. Schematic diagrams of the plasmonic detector are shown in Fig. 3. An n-type Si substrate with a surface orientation of (100) and resistivity of 3.63–4.08  cm was used. An oxide film was formed on Si by wet oxidation. To realize an Ohmic contact between Al and Si, Al was deposited on the high-dose arsenicimplanted Si, and then the contact was annealed at high temperature. A contact hole for the Au/Si Schottky diode was etched using buffered hydrogen fluoride (BHF). A bilayer resist pattern was formed around the contact hole, and a 300-nm-thick Au film was deposited and then lifted off. The optimal designed nano-slit grating was formed on the center of the Schottky diode by focused ion beam (FIB) milling.

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Fig. 4. (a) Experimental setup for optical heterodyning, (b) beat signal detected by the plasmonic detector, and (c) frequency of the beat signal detected by the plasmonic detector versus frequency difference of the two laser beams.

3.2. Detection of Optical Frequency Signals Optical frequency signals were detected in the fabricated plasmonic detector using the optical heterodyne method. The experimental setup for optical heterodyning is shown in Fig. 4(a). A tunable laser and a distributed feedback (DFB) laser were set at a lasing wavelength (frequency) of 1550.800 nm ðf1 ¼ 193:3147 THzÞ and 1550.784 nm ðf2 ¼ 193:3167 THzÞ, respectively. These wavelengths were within the spectral range of the spectrum for the excitation of SPPs [see Fig. 2(a)]. The polarization of the lasers was controlled by quarter- and half- wavelength plates. The polarized laser beams interfered at a fiber coupler. One output from the fiber coupler was input to an optical spectrum analyzer to monitor the wavelengths of the laser beams, or to a photodiode (Agilent, HP 70810B) and radio-frequency (RF) spectrum analyzer (labeled 2) to monitor the frequency difference between the two laser beams. Other output from the fiber coupler was input to the nano-slit grating of the plasmonic detector through a tapered polarization-maintaining fiber (PMF), where the electric field of light was perpendicular to the long axis of the slits. The detector was reverse-biased with V0 ¼ 20:0 V. The power of incident light to the nano-slit grating from the tunable and DFB lasers was 2.24 and 2.30 mW, respectively. The RF signals from the detector were monitored using a preamplifier and RF spectrum analyzer (labeled 1). Fig. 4(b) shows an electrical output observed by RF spectrum analyzer 1. Maximum intensity was observed at 2.0 GHz. The beat frequency fbeat of the two beams can be calculated using the equation fbeat ¼ jf1  f2 j. The calculated value of the beat frequency agreed with the experimental peak frequency. The relation between the frequency difference and peak frequency was measured [Fig. 4(c)]. The frequency difference, which was monitored by the normal photodiode and RF spectrum analyzer 2, agreed with the peak frequencies output from the plasmonic detector. These results indicate that our Schottky-type plasmonic detector that operates based on the IPE can detect both optical frequency and optical intensity signals.

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Fig. 5. (a) Optical micrograph of the top view of the monolithic integrated circuit composed of a plasmonic detector and MOSFETs and (b) circuit diagram of the integrated circuit.

4. Monolithic Integration of Plasmonic Detector and MOSFETs 4.1. Device Structure We integrated the plasmonic detector with n-channel MOSFETs on the same silicon substrate. The structure of the plasmonic detector is the same as that described in Fig. 3. An optical micrograph showing the top view and a circuit diagram of the fabricated device are shown in Fig. 5(a) and (b). The device was fabricated based on the 5-m design rule. MOSFETs with a channel length of 5 m and channel width of 100 m were formed on the p-type well region. After the MOSFETs were formed, a contact hole ð25 m  25 mÞ for the Schottky junction was etched using BHF. The Au was deposited in the contact hole to form the Schottky junction. The Au electrode was electrically connected to the drain electrode of MOSFET 1 and the gate electrode of MOSFET 2 using the Al wiring. The optimal designed nano-slit grating was carved into the center of the Au film by FIB milling. In this circuit, MOSFET 1 functions as a variable resistor for the output current from the plasmonic detector by controlling its gate-source voltage. The photocurrent generated at the plasmonic detector flows between the drain and source of MOSFET 1, generating the drain-source voltage of MOSFET 1. The drain-source voltage of MOSFET 1 is equivalent to the gate-source voltage of MOSFET 2. The bias conditions for the device were adjusted by using an external power supply at each terminal.

4.2. Circuit Operations We demonstrated the operation of the fabricated circuit composed of a plasmonic detector and MOSFETs. First, the characteristics of the plasmonic detector were measured at a substrate temperature of 20  C using terminals (i) and (ii). A laser beam with a photon energy (wavelength) of 0.80 eV (1550 nm) was used to irradiate the nano-slit grating of the detector through a tapered PMF and the photoresponses were measured for the transverse magnetic (TM; where the electric field is perpendicular to the long axis of the slits) and transverse electric (TE; where the electric field is parallel to the long axis of the slits) polarizations. The measured photoresponses are presented in Fig. 6. The photocurrents increased linearly with increasing input-light power, as described in equation (1). The photoresponses were depended strongly on the polarization angle of the incident beam; the values obtained for responsivity were 24.2 and 0.21 nA/mW for TM and TE polarizations, respectively. We confirmed that, as described in previous reports [12], the incident beam excites SPPs at the Au/Si interface for the TM polarization and most of the incident beam for the TE polarization is reflected at the Au surface without coupling to the SPPs. The photocurrent for the TE polarization was quite small and comparable to the case of the photocurrent under light incidence through the Si substrate [17]. The photoresponse was, therefore, intensified by about 115 times with the plasmonic effect using the nano-slit grating. The current-voltage characteristics showed that a

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Fig. 6. Photoresponses of the plasmonic detector for TM and TE polarizations.

Fig. 7. (a) Circuit diagram for measurement of the static characteristics of the fabricated device and (b) voltage and (c) current amplification characteristics of the device for both electrical and plasmonic input.

low dark current of 1.7 nA appeared under a reverse bias of 5.0 V. These results confirm the operation of the plasmonic detector in a circuit monolithically integrated with MOSFETs. Next, external devices in the form of power supplies and a resistor were added to the fabricated circuit to measure its static characteristics, as shown in Fig. 7(a). By adding resistance RD and applying a voltage VCC , a common-source amplifier based on MOSFET 2 was constructed. The laser beam that was used in the previous experiment to measure the responsivity of the plasmonic detector was used here to irradiate the nano-slit grating of the detector for TM polarization through the tapered PMF under the conditions of VP ¼ 5:0 V, VG1 ¼ 1:0 V, VCC ¼ 5:0 V, and RD ¼ 22 k . The gate-source voltage of MOSFET 2 VG2 (drain-source voltage of MOSFET 1) increased with increasing input light power (0 to 1.0 mW), and the drain-source voltage of MOSFET 2 VD2 changed with its VG2 , as shown in Fig. 7(b). The variation of VD2 was consistent agreed with the amplification characteristics (voltage amplification of five times at VG2 ¼ 2:0 V) measured by direct application of VG2 using an external power supply. This means that the output voltage from the plasmonic detector was amplified five times by the MOSFETs that were monolithically integrated with the plasmonic detector. The current-voltage characteristics of MOSFET 2 were also measured under the conditions VP ¼ 5:0 V, VG1 ¼ 1:4 V, and VD2 ¼ 2:0 V, where the resistance RD was removed. Here, VG2 increased with increasing input light power (0 to 6.5 mW), and the drain-source current of MOSFET 2 ID2 changed with VG2 , showing a threshold [Fig. 7(c)]. This result agrees well with the characteristics measured by direct application of VG2 . The response (drain-source current per unit of input-light power) of the integrated circuit was 342 A/mW above the threshold voltage. The photoresponse is about one-third of that of photodiode used in current optical systems and equipment. This means that the output current from the plasmonic detector (24.2 nA/mW) was amplified by 14000 times using the MOSFETs.

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Fig. 8. (a) Circuit diagram for measurement of the dynamic characteristics of the device and (b) power spectrum observed by the RF spectrum analyzer.

Finally, the fabricated device was dynamically operated with an intensity-modulated optical beam. An alternating current (AC) signal was observed in the integrated circuit using the system shown in Fig. 8(a). A DFB laser was set at a lasing wavelength of 1550 nm. The laser was modulated by a continuous sinusoidal wave with peak-to-peak current of 5 mW and frequency of 1.0000 MHz superimposed on a direct current of 50 mA. The frequency resolution of the signal generator used for the modulation was 1 Hz. The modulated beam was used to irradiate the nano-slit grating of the detector with TM polarization through the tapered PMF. VD2 was adjusted to 2.0 V by applying an external power supply of VCC . The values of VP and VG1 were 5.0 and 1.4 V, respectively. The AC signal between the drain and source of MOSFET 2 was monitored with the RF spectrum analyzer through coaxial cables and the preamplifier. Fig. 8(b) shows the power spectrum observed using the RF spectrum analyzer with a resolution bandwidth of 1 Hz. A clear peak was observed at 1.0000 MHz, corresponding to the modulation frequency. The signal disappeared when the modulated beam was not irradiating the plasmonic detector. These results indicate that AC operation of the fabricated device was also possible.

5. Conclusion We demonstrated a first monolithic integration of a plasmonic detector and MOSFETs on the same silicon substrate and its operation. The structure of the nano-slit grating of the plasmonic detector was optimized in terms of slit depth and pitch by FDTD calculations, which gave an optimal grating structure with a slit depth of 300 nm and slit pitch of 440 nm. This optimal structure resulted from the resonance effect of a SPP mode inside the slit and in-phase interference of the SPP mode generated by each slit. An Au/Si Schottky-type plasmonic detector with the optimal designed nanoslit grating was fabricated using the lift-off process and FIB milling after formation of the MOSFETs. The plasmonic detector monolithically integrated with MOSFETs was operated at a telecom wavelength of 1550 nm, which is hardly absorbed by silicon. The output signal from the plasmonic detector was amplified by the MOSFETs. AC operation was also demonstrated by modulation of the intensity of the beam that was incident to the plasmonic detector. Our results show that optical communication and data processing devices can be integrated on a single chip. Because plasmonic devices can be miniaturized beyond the diffraction limit, our prototype represents a step toward high-speed and large-capacity data-processing systems that follow to the scaling rule for integrated circuits.

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